Abstract: Composite printed circuit board substrates having fiber reinforcement in a polymer matrix are disclosed. The fibers may be thermotropic melt processable liquid crystal polymer fibers.

Abstract: The present invention relates to an electronic components mounting/connecting package characterized by using bump electrodes to connect electronic components such as semiconductors and the like with patterning electrodes of a circuit board.In order to prevent deterioration in connecting reliability due to deformation and the like of semiconductors and circuit boards, it is necessary to have some elasticity incorporated with bump electrodes. The composition of bump electrodes disclosed by the present invention is to have resin particles dispersed to high density in the metallic bump electrodes.According to this composition, even when there are some variations of distribution in circuit board warp and bump electrode height, it has become possible to absorb the variations through elasticity presented by the bump electrodes and to perform a low strain connection with a resultant enhancement in connecting reliability at high temperature.

Abstract: In the abstract No. 75-35061W of the WPI, Week 7521, Derwent P. L. London (citing JP-A-118906/1974) there is disclosed a paper with a cover coat applied by the cast coating process, for whose preparation first a prime coat is applied whose pigment composition consists of 30 wt. % of kaolin and 60 wt. % of a polystyrene pigment, and whose binding agent composition includes 10 weight-parts casein and 16 weight-parts of a carboxylated butadiene-styrene latex. After this prime coat has dried a mixture of 80 weight-parts of kaolin, 20 weight-parts of calcium carbonate, 10 weight-parts of casein and 8 weight-parts of a butadiene-styrene latex is applied and the applied composition is pressed at a temperature of 90.degree. C. against a chrome-lacquered surface.

Abstract: A field emission type emitter comprises: a conductive substrate; an insulating film formed on the conductive substrate; a cavity formed in the insulating film; a cathode formed on the conductive substrate in the cavity; and a gate electrode formed over the insulating film. The gate electrode is preferably made of refractory metal silicide. A polycrystalline silicon film is preferably formed between the gate electrode and the insulating film. The side walls of the insulating film in the portion of the cavity preferably have an inverse tapered shape.In the case where a glass substrate is used, a conductive film is formed on the glass substrate through an insulating film and the cathode is formed on the conductive film in the cavity. Manufacturing methods of the field emission type emitter are also disclosed.

Abstract: A printed circuit substrate with projected electrode and a connection method using the same are disclosed. The printed circuit substrate comprises an insulating substrate having formed on one surface or both surfaces thereof an electrically conductive circuit, wherein at least one projected electrode comprising a metallic substance is formed at the side of the end portion of the electrically conductive circuit.

Abstract: The instant invention discloses a process for producing a substrate for use in printed circuit which comprises: a vessel for containing a photo-curable resin; a masking means positioned above and in close proximity to the resin surface; a planar light for irradiating through the mask a thin layer of the photo-curable resin, means for moving the thin-layered cured product in the vertical direction, means for coating additional uncured resin on the cured product and irradiating the same to form a newly formed thin-layered cured product thereon, and means for successively coating and forming additional thin-layers of cured products. The second aspect of this invention relates to a substrate for use in printed circuit boards produced by the above-mentioned process and apparatus.

Abstract: Flexible printed circuits comprising copper circuitry electrolessly deposited on an activated ink coating prepared by heating a wet ink comprising a polymer, e.g. polyvinyl chloride or a butadiene polymer, and a Group 1B or 8 compound, e.g. palladium dichloride, which is adapted to drying at room temperature to a catalytically inert ink. Selective areas of the ink activated by application of heat or light, e.g. a laser, are catalytic to electroless deposition of copper.

Abstract: An electrically conductive cement having substantially stable conductivity and resistance characteristics under high humidity conditions comprises a mixture of two epoxy resins with the proportion of each epoxy resin adjusted to provide a volumetric shrinkage in the mixture in the 4 to 16% and a conductive silver particular filler including agglomerates having size and surface characteristics that maintain stable electrical contact with an electrical component lead. The epoxy mixture is preferably a combination of a high-shrinkage epoxy resin and a lower-shrinkage epoxy resin in the appropriate amounts of each so as to produce the desired volumetric shrinkage characteristic. The conductive particle filler is preferably an admixture of silver flakes, silver powder, and an effective amount of silver agglomerates.

Abstract: The disclosure describes a multilayer article of manufacture comprising a substrate having adhered to it a terminally unsaturated adhesive polyimide, where the surface of the adhesive opposite the substrate is adhered to a polyimide, the article further characterized in having one set or a plurality of alternating layers of the terminally unsaturated adhesive polyimide and the polyimide. In another embodiment, the article has at least one adhesive polyimide layer adhered to a metal substrate or an electrical circuit component such as an integrated circuit, or means for forming electrical connections in an electrical circuit such as metal conduits on the circuit or a wiring network embedded within a ceramic and/or polymer substrate.In manufacturing the article of manufacture, a surface treatment technique such as wet process or a plasma/optional silane coupling agent may be applied to either the substrate, adhesive polyimide film or polyimide film prior to the bonding operation.

Abstract: A composite transversely plastic interconnect for a microcarrier produces a carrier-to-substrate bond having low electrical resistance and high mechanical strength, significant bond height to mediate TCE mismatch between dissimilar carrier and substrate materials, and sufficient gap between the carrier and the substrate to permit effective post solder cleaning of the interconnect. A contact array consisting of solder balls is placed directly onto either of a carrier or a substrate interconnect surface with a stencil positioned to the chosen interconnect surface. The solder balls may have a selected melting temperature. Additionally, the solder balls may have a metallic coating, such as nickel or copper, or molten solder. The carrier and substrate are joined by mating an interconnect surface of each and applying heat. Solder paste may be applied to one of the interconnect surfaces to add additional height to the joint and compensate for lack of coplanarity between the carrier and the substrate.

Abstract: A microelectronics substrate assembly comprising: an advanced ceramics substrate having a top surface and a bottom surface; a first metallized distribution plane on said top surface and a second metallized distribution plane on said bottom surface; an electrical connection between said first and second distribution planes; at least one first metallized pad on said top surface electrically isolated from said first distribution plane and at least one metallized pad on said bottom surface, electrically isolated from said second distribution plane, wherein said distribution planes and said metallized pads are arranged substantially symmetrically with respect to a plane between and parallel to said top and said bottom surfaces.

Abstract: A multilayer interconnection substrate having, e.g., first to third power interconnections provided with first to third interconnection layers. A first insulating layer is provided between the first and second interconnection layers, and a second insulating layer is provided between the second and third interconnection layers. A plurality of first via holes are provided at said first insulating layer and connect the first and second power interconnections and a plurality of second via holes are provided at said second insulating layer with their position being shifted from that of the first via holes and connect the second and third power interconnection.

Abstract: A core for compressed core wound paper products such as toilet tissue and paper toweling is disclosed. The core is selectively cut and scored to form folding tab portions that fold radially inward when the core is in a generally flattened configuration. Upon rerounding of the core to a generally cylindrical configuration, the folding tab portions can be unfolded to form circular arcs conforming to the core inner and outer surfaces. The folding tab portions enable the core to reround to a generally cylindrical configuration that resists reflattening.

Abstract: A process of manufacturing a matrix printed board, comprising the steps of forming a first conductive layer on a substrate, forming an insulating layer on said first conductive layer, and forming a second conductive layer on said insulating layer by screen printing.

Abstract: A compressible, flexible, resilient wedge shaped sealing strip for maintaining conforming sealing engagement with opposing spaced walls of various structures and sealing joints therebetween has a flexible resilient hollow body with an outer layer of foam both made of a material having the ability to recover from a compressed state and thus continuously exert and force the sealing strip into sealing engagement with the opposing spaced walls of the structure.

Abstract: The present invention features a process and a resulting article in which copper-based multilevel interconnects are fabricated. The copper-based multilevel interconnect formed by the inventive process first includes the process step of depositing a pattern of copper lines upon or in an applicable substrate, such as silicon dioxide. The copper lines are approximately one micron thick. The lines are coated with approximately 50 to 100 nm of titanium by sputter deposition, and undergo subsequent annealing at approximately 300.degree. C. to 400.degree. C. in an argon ambient. The titanium and copper layers are annealed to provide a Cu.sub.3 Ti alloy at the copper/titanium junction. The unreacted titanium between the copper features is then stripped away by dry etching with fluorine-based etch. The remaining Cu.sub.3 Ti alloy is subsequently transformed into TiN(O) and copper by a rapid thermal annealing in an NH.sub.3 atmosphere at an approximate temperature of below 650.degree. C.

Abstract: A glass-fiber product having a textured surface thereon (and its process of manufacture) is disclosed wherein the textured surface is obtained by relieving the stress in pre-stressed polymeric chips that have been distributed throughout a polymeric layer superimposed on a glass-fiber sheet.

Abstract: A multi-level substrate (24) for mounting and interconnecting a number of integrated circuit chips (10) is formed of a stack of laminated sheets each comprising a conductive circuit layer (30,34,38,42,46) is laminated to a dielectric film (32,36,40,44,48). The sheets are formed by fully additive or semi-additive processes on a reusable mandrel and are interconnected to one another by raised features (78) on the circuit layer of one sheet that project through a hole (86) in the dielectric film of an adjacent sheet to contact a receiving area (88) of the circuit layer of the adjacent sheet. Integrated circuit chips (10) and other electrical components are mounted to the uppermost sheet and electrically connected thereto by means of wiring bonding (16) or a f lip-chip arrangement (150) in which chip pads (148) rest upon and contact raised features (146) of the circuit layer (140) of the uppermost sheet.

Abstract: A conductive pattern layer structure includes an insulating member containing polyimide, a patterned thin film formed on the insulating member, and a patterned conductive layer formed on the thin film. The patterned conductive layer contains copper. Further, the layer structure includes a patterned barrier layer covering an upper surface and side surfaces of the patterned conductive layer to prevent copper from being diffused into another insulating layer formed around the patterned barrier layer.

Abstract: Electromagnetic radiation shielding textile material comprising metal-coated fabric adapted to be applied with overlapping seams at least 4 cm wide to provide at least 80 dB of far-field shielding against electromagnetic radiation between 0.1 and 10 gigahertz. Fabric, e.g. non-woven nylon fabric, coated with at least one layer of electrolessly-deposited metal, e.g. at least 15 g/m.sup.2 copper, is useful as backing for wallpaper which can provide effective far-field shielding of electromagnetic radiation.