Abstract: At the surface of a semiconductor substrate a conductor film over a silicon comprising insulating film, and the first aluminium oxide film are formed. These films are patterned to form a plurality of lines and an aluminium oxide film mask covering the top faces of the lines. Over the whole surface, the second aluminium oxide film is formed and etched back to form aluminium oxide film spacers covering the side faces of the lines. Over the whole surface a silicon oxide comprising dielectric film is formed. Anisotropic dry etching of the dielectric film and the insulating film is performed with fluorocarbon comprising gas to form self-aligned contact holes extending down to the surface of diffused layers formed at the surface of the semiconductor substrate.

Abstract: A metal interconnect fabrication process for hybrid solid state systems such as thermal imaging system (50). A plurality of vias (62) are formed in a focal plane array (60) between the thermal sensors (20) to expose a corresponding array of contact pads (84) on a silicon processor (80) bonded to the focal plane array (60). A metal film layer (30) is disposed on the focal plane array (60) to fill the vias (62). Photoresist material (32) is patterned on the metal layer (30) to correspond with the desired sensor signal flow path. With the photoresist material (32) still in place, the metal layer (30) is dry etched to produce the desired metal interconnect pattern by removing portions of the metal layer (30) unprotected by the photoresist material (32).

Abstract: A method of chemical vapor depositing a layer on a semiconductor wafer includes: a) positioning a semiconductor wafer within a chemical vapor deposition reactor; b) providing an organometallic reductive elimination precursor source in a non-gaseous form, the non-gaseous organometallic precursor compound containing at least two ligands bonded to a linking atom; c) subjecting the non-gaseous organometallic reductive elimination precursor to temperature and pressure conditions which vaporize the non-gaseous organometallic reductive elimination precursor into a source gas, and providing the source gas into the chemical vapor deposition reactor having the semiconductor wafer positioned therein; d) subjecting the source gas to reactive conditions within the reactor effective to impart a reductive elimination reaction of the precursor which reduces the linking atom from the precursor and which oxidizes the ligands to generate gaseous molecules having all atoms in a closed shell, non-ionic configuration, with the gas

Abstract: Disclosed is a process for rapidly producing large diameter, high-purity polycrystalline silicon rods for semiconductor applications, while maintaining the purity of a highly refined monosilane gas inside the reactor. The equipment includes a reactor vessel which encloses powder catchers consisting of cylindrical water jackets. Also within the vessel is a cylindrical water jacket which concentrically surrounds the powder catchers and which defines multiple reaction chambers. Control is effected in such a way that the temperature distribution in different sections inside the reactor is as follows in the ascending order: the powder catcher walls, the walls of the water jacket which defines the reaction chambers, and the lower wall of the vessel cover.

Abstract: A process for producing silicon carbide-base complex is disclosed. In the process of this invention, a silicon carbide-base complex is produced by means of depositing carbon produced by means of pyrolysis of a gas comprising a hydrocarbon or a hydrocarbon halide on a porous synthesized silica glass body. As a result, the process of manufacture according to the present invention is capable of producing a high purity and a high strength silicon carbide-base material, which is useful as a jig for producing semiconductors, for example, a heat resistance jig material such as a process tube for wafer boats used for heat doping operation.

Abstract: This invention provides a method for manufacturing silica gels in a form of scales or needles having a pore volume and a specific surface area being relatively large and being controlled. Silicic acid sol is frozen, crystallized and deposited in gaps among crystal faces of crystals of solvent of the sol, thus obtaining the frozen silica hydrogels in the form of scales or needles. After unfreezing the frozen silica hydrogels, a hydrothermal polymerization is carried out. Subsequently, the silica hydrogels are dried, thus obtaining the silica gels in the form of scales or needles. Furthermore in the invention, by controlling the gelation time period of silica sol, the silica gels with their configuration controlled can result from even inexpensive silica sol. The invention has the advantage that a freeze-drying step is not required: just through freezing, unfreezing, washing and hydrothermal polymerization steps, the physical properties of the silica gels can be controlled.

Abstract: Processes to produce Silicon-On-Diamond (SOD) Structures. In one process, two epitaxial layers are grown on a seed silicon wafer. The first layer is an etch stop layer and the second layer is an undoped silicon layer. A CVD diamond is deposited on top of this substrate, and covered with a thin layer of polysilicon. This structure is now bonded to another silicon handle wafer. The seed silicon layer and the etch stop layer are removed by mechanical means and chemical etching. The substrate consists of a silicon substrate, a polysilicon layer, a diamond layer and an undoped silicon layer. In a second process a diamond layer is deposited onto a SIMOX Wafer and polysilicon is deposited upon the diamond layer. A silicon wafer is bonded to the polysilicon layer and the SIMOX wafer less the silicon overlayer on the buried oxide is removed by grinding and etching to obtain silicon-on-diamond structure.

Abstract: A method is described for making silica gel having a large active surface area suitable for use as an adsorbent-separator of gases and liquids in hermetically sealed acid accumulators and as a filler in the fabrication of rubber articles.The method produces silica gel having a large active surface area and, at the same time, a microgranular structure. The product is in the form of aggregates having a size which generally does not exceed 5 mm, so no additional grinding of the product is required. The silica gel exhibits a large pore volume.

Abstract: A method of heat-treating a semiconductor wafer comprises: heat-treating a semiconductor wafer in an atmosphere of an inert gas which does not absorb infrared rays in a specific infrared region to determine heat-treating conditions that heat the semiconductor wafer in a desired temperature profile; and heat-treating a semiconductor wafer in an atmosphere of a process gas according to the previously determined heat-treating conditions. Since the inert gas used in predetermining the heat-treating conditions does not absorb infrared radiation in the specific infrared region corresponding to the infrared absorption range of the process gas, the temperature of the semiconductor wafer can be accurately measured by a pyrometer to determine the heat-treating conditions. In the practical heat treatment of a semiconductor wafer, the temperature of a semiconductor wafer can be accurately controlled according to the predetermined heat-treating conditions.

Abstract: A suitable inert gas such as argon or a mixture of inert and reactive gases such as argon and hydrogen is introduced onto the backside of wafers being processed in a CVD reactor during the deposition of tungsten or other metals, metal nitrides and silicides, to avoid deposition of material on the backside of the wafers being processed. Each process station includes a gas dispersion head disposed over a platen. A vacuum chuck including a number of radial and circular vacuum grooves in the top surface of the platen is provided for holding the wafer in place. A platen heater is provided under the platen. Backside gas is heated in and about the bottom of the platen, and introduced through a circular groove in the peripheral region outside of the outermost vacuum groove of the vacuum chuck. Backside gas pressure is maintained in this peripheral region at a level greater than the CVD chamber pressure.

Abstract: Silicon carbide is produced by chemical vapor deposition at temperatures from 1340.degree.-1380.degree. C., deposition chamber pressures of 180-200 torr, H.sub.2 /methyltrichlorosilane ratio of 4-10 and deposition rate of 1-2 .mu.m/min. Furthermore, H.sub.2 supplied as a part of the gas stream contains less than about 1 part per million (ppm) O.sub.2 gas, and various means are provided to exclude particulate material from the deposition chamber. The silicon carbide is polishable to <5 .ANG. RMS as measured on a Talystep mechanical profiler and has a thermal conductivity of at least about 300 W/mk. The silicon carbide is particularly suitable for applications where high polishability and thermal conductivity is desired, such as hard disc drives and read/write heads of head-disc assemblies, and also optical apparatus which require a very high polish.

Abstract: A new method of planarizing an integrated circuit is described. A first coating of a silicate spin-on-glass material is applied to the surface of a patterned conductor layer to be planarized. The spin-on-glass material is applied under low relative humidity, filling the valleys of the irregular structure of the conductor layer. The first spin-on-glass layer is covered with a second coating of the spin-on-glass material also applied under low relative humidity. Then, both first and second spin-on-glass layers are cured. This method provides a uniform spin-on-glass dielectric layer upon which a second conductor layer may now be successfully applied.

Abstract: An integrated circuit having organic dielectric between interconnection layers eliminates damage caused by vapors outgassing from the organic dielectric by the use of a two-component organic layer having a breathable etch resistant organic layer above the main organic dielectric layer, both of the organic layers remaining in the final circuit. The etch resistant layer is resistant to the etchant used to pattern the layer of interconnect above the organic dielectric.

Abstract: A method of fabricating a semiconductor device, in particular of forming a polysilicon film on a step portion of an insulation film made by a trench or a contact hole is disclosed which includes the steps of depositing an amorphous silicon film on the step portion while doping impurities into the amorphous silicon film and carrying out heat treatment to convert the amorphous silicon film into a polycrystalline silicon film, thereby the polysilicon film on a step portion being formed.

Abstract: Silica sols having a high content of microgel and aluminum modified particles with high specific surface area. The sols can be prepared by a process comprising acidification of a water glass solution, alkalization at a certain dry substance content, particle growth and aluminum modification. The sols are particularly suitable for use as additives, in combination with cationic polymers, in papermaking.

Abstract: A modified amorphous silica is described which, apart from optionally present usual additives, comprises 40 to 85 wt-% silica and 60 to 15 wt-% paraffin, silicone or vegetable oil and/or ethylene glycol. The modified amorphous silica is prepared by bringing together, apart from optionally present usual additives, silica with such a quantity of paraffin, silicone or vegetable oil and/or ethylene glycol that the finished, modified silica has a paraffin, silicone or vegetable oil and/or ethylene glycol content of 60 to 15 wt-%. The modified amorphous silica is suitable as an anti-blocking agent, which can be advantageously prepared as concentrate (masterbatch). Surprisingly, upon preparing such a concentrate the melt-flow index hardly falls compared with the melt-flow index of the polyolefin which forms the basis of the concentrate. Thus it is possible to incorporate large quantities of the modified silica into the concentrate in very homogeneous distribution.

Abstract: A method of growing semiconductor in a vapor phase wherein a silicon oxide film on the surface of a semiconductor substrate wafer is removed, and a silicon layer is grown on the surface of the semiconductor substrate wafer in a vapor phase while rapidly rotating the wafer about a shaft substantially vertical to the wafer.

Abstract: Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Abstract: An improved process is described for forming planar tungsten-filled contacts to a silicon substrate in contact openings through an insulating layer which provides for the formation of titanium silicide in and on the silicon surface at the bottom of the contact openings to provide low resistance silicide interconnections between the silicon substrate and the tungsten. A titanium nitride layer is formed over the titanium silicide and on the surfaces of the insulation layer, including the top surface of the insulation layer and the sidewall surfaces of the contact openings through the insulating layer. This titanium nitride layer provides a nucleation layer which permits a good bond to form from the tungsten through the titanium nitride and titanium silicide in the contact openings to the silicon substrate; and from the tungsten through the titanium nitride layer to the insulator material such as silicon dioxide (SO.sub.2), resulting in the formation of low resistance and low defect density contacts.

Abstract: This invention is a process for the hydrothermal preparation of sodium disilicate with a molar ratio of Na.sub.2 O:SiO.sub.2 of 1:2 at an elevated temperature and a pressure corresponding to said temperature in a pressure vessel, characterized in that quartz sand and caustic soda solution and/or an aqueous solution of amorphous sodium disilicate at a total solids concentration of from 50 to 75% by weight are heated to at least 235.degree. C. in a first step, the concentration may be increased in an optional second step by removing water from the reaction mixture, in a third step, dependent on whether the second step has been carried out, the amount of water removed in the second step is completely or partially added again to the mixture during or immediately after same has been cooled to from 90.degree. C. to 130.degree. C., and then the obtained crystalline sodium disilicate is recovered.