Abstract: The present application relates to a configuration file generation method and apparatus, an electronic device, a medium and a program product. The method is applied to a shooting application and comprises: in response to a creation operation, displaying a creation interface, the creation interface comprising a preset material set used for generating a configuration file; in response to a material selection operation, selecting one or more raw materials from the material set; in response to an editing operation for the raw material(s), editing layer information of a layer corresponding to the raw material(s), rendering a generated first target material and displaying same; and, in response to a generation operation, on the basis of layer information of layer corresponding to the first target material, generating a first target configuration file used for image editing.

Abstract: Methods and systems for securing edge devices are disclosed. The edge devices may be secured by facilitating time synchronization of the edge devices through an edge orchestrator. The edge orchestrator may securely perform time synchronization with a trusted time server. The edge orchestrator may obtain a true time value from the trusted time server and verify the integrity of the true time value using security processes. Once the integrity of the true time value has been verified, then the edge devices may obtain the true time value from the edge orchestrator through secure communication channels. After the edge devices obtain the true time value from the edge orchestrator, the edge device may perform time synchronization.

Abstract: The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.

Abstract: An electronic card includes an electric storage device, a charging circuit, a wireless communication circuit, a processor, an electronic function circuit, a power management circuit, and a wakeup circuit configured to start the power management circuit upon receiving an external trigger. The power management circuit supplies, after being started by the wakeup circuit, power of the electric storage device to the processor and the electronic function circuit. The processor stores, before the start of wireless communication, an operation state or an output result of the electronic function circuit which is obtained by an operation with power of the electric storage device, and causes, after operation processing of the electronic function circuit, the wireless communication circuit to start the wireless communication.

Abstract: The present application relates to the technical field of computers. Disclosed are a starting method and apparatus for an Advanced RISC Machine (ARM) server, an ARM server, and a non-volatile computer-readable storage medium. The method includes: after a Basic Input Output System (BIOS) is started, setting a clock frequency of an Inter-Integrated Circuit (I2C) bus to a preset clock frequency by using the BIOS, where the preset clock frequency is a clock frequency at which a baseboard management controller (BMC) reads real-time clock (RTC) time through the I2C bus; initializing the I2C bus by using the BIOS, and starting and entering an operating system; reading the RTC time through the I2C bus by using the BIOS, and determining whether the BIOS successfully reads the RTC time; and if the BIOS successfully reads the RTC time, displaying, under the operating system, system time corresponding to the RTC time.

Abstract: Methods, systems, and devices for providing computer implemented services using managed systems are disclosed. To provide the computer implemented services, hardware components may be bundled into hardware bundles. The hardware bundles may be used to satisfy subscriptions for the services, and limit use of the hardware bundles when subscription limits are reached. The hardware bundles may include direct management hardware components and indirect management hardware components. The performance of the hardware bundles may be characterized to facilitate future selection for use of the hardware bundles in various processes.

Abstract: A method to provide flexible access to an internal data of an regulated system, the method comprising receiving, by a data access component of the regulated system, a loadable configuration file defining a set of triggering events and a set of memory, determining the occurrence of a single triggering event, accessing at least a subset of memory that contain the internal data of the avionics system to retrieve data associated with the one or more memory of the set of memory, and outputting the retrieved data to a receiving component.

Abstract: The present invention discloses a processor control method including: controlling a processor to execute a first operating system in a first state; when the processor executing the first operating system satisfies a predetermined condition, controlling the processor to switch from the first state to a second state; and controlling the processor to execute a second operating system in the second state, wherein an authority of the first state is higher than an authority of the second state.

Abstract: Systems and methods are provided for mapping arbitrary isolated quantum-mechanical systems to quantum processor registers on quantum computers that use available symmetry to maximize compactness. For example, embodiments of the present disclosure exploit existing symmetries in the simulated system to minimize the required number of quantum bits (qubits) in the quantum processor.

Abstract: A maintenance method for a power storage system wherein: in a bank in which multiple modules, each comprising multiple lithium-ion battery cells connected to each other, are serially connected, a voltage sensor measures voltage values of the cells; a module containing a cell having the lowest voltage value in the hank is identified; and the capacity of the identified module or of the cell having the lowest voltage value is measured.

Abstract: Optimizing configuration rules in a computerized system comprises accessing a set of configuration rules associated with one or more management domains, computing standardized configuration rules, and iteratively optimizing these rules. The optimization process involves computing a candidate set of optimized rules, comparing the candidate set of optimized rules to the original set using a distance metric, and accepting the optimized set if it meets a proximity threshold. System configuration values are then modified based on the optimized rules. The method enhances efficiency and security in identity management systems by reducing redundancies, updating outdated rules, and simplifying rule expressions.

Abstract: A method for programming an FPGA, wherein a library with elementary operations and a respective latency table for each of the elementary operations of the library are provided. a data path is defined. The latencies are recorded for a multiplicity of clock rates that are different from one another and these latencies are added for every clock rate so that a total latency for the data path results for this multiplicity of different clock rates. The ratio between the lowest total latency and the total latency at a respective clock rate is determined. A utilization of the FPGA for each clock rate is identified. The ratio between the lowest utilization of the FPGA and the utilization of the FPGA at a respective clock rate is determined. A quality factor for each clock rate while taking into account the total latency and the utilization of the FPGA is determined.

Abstract: A data processing unit required for the data processing is started and a data processing unit not required for the data processing is stopped to change a part of the data processing settings or to add a new data processing setting without stopping the multi-stage data processing, and when the multi-stage data processing is executed, a rear-stage data processing unit reads the tag assigned in a front-stage data processing unit to discriminate the data processing unit that executes the data processing.

Abstract: Systems, methods and products for associating arbitrary configuration tags to configuration item for a service so that items grouped by the tags can be unconfigured or manipulated as a group with minimal touchpoints. In one embodiment, a method is provided for managing the configuration of per-tenant features in a server system. The method includes identifying a configuration feature of the server system to be configured for a specific tenant. A configuration command is received to configure the configuration feature for the specific tenant, wherein the configuration command includes a configuration tag associated with the specific tenant. The configuration command is stored in a configuration of the server system and is applied to the server system. Tag-based commands are provided which are operable to modify a subset of configuration features corresponding to a designated configuration tag.

Abstract: An embodiment may involve receiving a signal indicative of an edge of a reference clock, wherein the reference clock has a fixed clock period, wherein a hardware clock signal generator ticks at a variable clock period, and wherein a local time value is increased by a local time increment on ticks of the hardware clock signal generator; reading the local time value and writing it to a memory as a current time value; determining a difference between the current time value and a previous time value that was written to the memory in response to receiving a previous signal from the reference clock; based on the difference, determining an adjustment to the local time increment so that the local time value increases at a rate that is closer to that of the reference clock; and modifying the local time increment by the adjustment.

Abstract: A computer program product, system, and computer implemented method for scalable specification and self-governance for autonomous databases, cluster databases, and multi-tenant databases in cloud and on-prem environments. The approach disclosed herein enables management of a consolidated databases using a template-based process that allows for the consolidated databases (CDBs) and pluggable databases (PBDs) to be reconfigured automatically. In some embodiments, the approach instantiates one or more monitoring modules and one or more CDB/PDB configuration managers. These elements can detect relevant changes in the conditions in which CDB instances and open PDBs operate and adjust the configurations thereof in response.

Abstract: Described herein are methods, systems, and computer-readable storage media for seamless offline-online execution of applications. Techniques include receiving at a server a request from a client device for execution of an application and then determining one or more subsets of a logic portion of the application. Technique further include distributing the determined one or more subsets of the logic portion of the application to the client device and receiving a set of operations from the client device and an updated state portion of the application. Technique further include authorizing each operation of the set of operations and finalizing the updated state portion of the application.

Abstract: System settings for an information handling system are updated based on the operating system version of an information handling system that is installed or updated on the information handling system. An operating system template to the version of the operating system is retrieved and staged to a shared memory access/partition accessible by a basic input/output system (BIOS) of information handling system. A system policy enforcer of the BIOS accesses configuration settings from the staged corresponding operating system template and applies the accessed accessing configuration settings to the information handling system.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed that implement an off-screen indication of battery charge in mobile platforms. In an example, the apparatus includes a keyboard, an interface circuitry, and a processor circuitry. The example processor circuitry to instantiate remaining state of charge (RSOC) controller circuitry to detect a battery charge level display event on a mobile device, the mobile device in a pre-boot state. The example processor circuitry additionally to instantiate fuel gauge circuitry to determine a charge level of a battery of the mobile device and keyboard display circuitry to, after the battery charge level display event, cause a display of the charge level of the battery in the pre-boot state with ones of backlights of a second ones keys on the keyboard.

Abstract: A system, method and apparatus for configuring a person detection sensor. The person detection sensor may limit its transmissions in accordance with a pre-configured dwell time. The person detection sensor may receive a new dwell time from a personal communication device. When the new dwell time is received, it is stored in memory and is then used to regulate the number of transmissions of the person detection sensor in accordance with the new dwell time.