Patents Examined by Keshab R Pandey
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Patent number: 11934248Abstract: Power management in a computing device. A driver is registered with an operating system (OS) executing on the computing device to receive information about a position of a user interface control. If the user interface control is moved, the driver receives a notification of the user interface control position and determines a power management intervention based on the position The driver transmits the power management intervention to power control circuitry which sets a power setting of the computing device based on the intervention.Type: GrantFiled: September 27, 2021Date of Patent: March 19, 2024Assignee: ATI Techologies ULCInventors: Alexander S. Duenas, Omer Irshad, Sishanthy Balachandran, Arpit Nitinbhai Patel, Andrew Savio D'Souza, Oleksandr Khodorkovsky
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Patent number: 11927983Abstract: Provided for herein are systems, methods, apparatus and software configured synchronize clocks across two or more processing devices. The techniques of the present disclosure include: obtaining, at a processing device, indications of clocks, wherein the indications comprise an indication for a clock for each of a plurality of processing devices; determining, from the indications, whether a clock of the processing device leads or lags a majority of clocks of the plurality of processing devices; and adjusting the clock of the processing device in a direction of the majority of the clocks of the plurality of processing devices.Type: GrantFiled: December 6, 2021Date of Patent: March 12, 2024Assignee: L3Harris Technologies, Inc.Inventor: Matthew Jarvis
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Patent number: 11921562Abstract: Power supply efficiency may be provided. First, a total power supply capacity may be determined comprising a sum of a plurality of supply capacities respectively corresponding to a plurality of power supplies serving a plurality of components. Next, a load value corresponding to the plurality of components may be determined. A number of the plurality of power supplies may then be powered down. The number of power supplies powered down may comprise a value that may cause a remaining number of the plurality of power supplies serving the plurality of components to operate within an efficiency range.Type: GrantFiled: January 26, 2023Date of Patent: March 5, 2024Assignee: Cisco Technology, Inc.Inventors: Torsha Das, Jay Yoo, Tuchih Tsai, Kabiraj Sethi
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Patent number: 11914446Abstract: An electronic device control method, apparatus, and an electronic device, where the electronic device control method includes determining a running mode of a current running application in an electronic device, and controlling, based on the running mode, a component in the electronic device to execute an operation corresponding to the running mode, where the component includes a component employed for running the current running application.Type: GrantFiled: March 23, 2022Date of Patent: February 27, 2024Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Xiaoxiao Chen, Yungao Pan
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Patent number: 11914447Abstract: A computing methodology in digital systems for performing computationally expensive operations while lowering the required computing resources, the power consumed to accomplish the computation, and maximizing the system throughput. Intermediate computations within the operation may be analyzed and those that have low gain values are identified and may be either removed from the computation or calculated with lower precision.Type: GrantFiled: November 20, 2020Date of Patent: February 27, 2024Assignee: MENTIUM TECHNOLOGIES INC.Inventor: Farnood Merrikh Bayat
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Patent number: 11915014Abstract: When a configuration is generated in a distributed computing system, a first group of nodes is selected for validating the configuration and the configuration is deployed on the first group of nodes. When the first nodes in the group of nodes validate the configuration, the nodes sign the configuration with a signature. When a subsequent node is to implement the configuration, the subsequent node validates the signature on the configuration to ensure that the nodes in the first group of nodes validated the configuration. If the signature is validated, the subsequent node deploys the configuration.Type: GrantFiled: August 18, 2021Date of Patent: February 27, 2024Assignee: Microsoft Technology LicensingInventor: Amarjyoti Deka
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Patent number: 11907728Abstract: A Basic Input Output System (BIOS)-based multi-user management method and system. The method includes: identifying states of multiple users of a current BIOS to find a user whose state is an enable state; finding a Non-Volatile Random Access Memory (NVRAM) corresponding to the user in the enable state, and reading BIOS configuration parameter information of the user in the enable state; monitoring a hot key boot phase of a BIOS startup process to determine whether there is a key action at the hot key boot phase; and when there is no key action, performing a manipulation to configure the current BIOS with the read BIOS configuration parameter information of the user in the enable state, thereby effectively configuring the BIOS for the multiple users, and retaining more customized parameters in BIOS information. Therefore, a server becomes a diversely used terminal device more easily.Type: GrantFiled: October 27, 2020Date of Patent: February 20, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Shuaishuai Jia, Daotong Li
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Patent number: 11899513Abstract: A power management controller is disclosed. Broadly speaking, the controller may, in response to receiving a timing signal, monitor a temperature of an integrated circuit including multiple processor clusters. The controller may generate a comparison of the temperature and a threshold value, and in response to a determination that the comparison indicates that the temperature is less than the threshold value, transition a particular processor cluster to a new power state.Type: GrantFiled: January 9, 2023Date of Patent: February 13, 2024Assignee: Oracle International CorporationInventors: Yifan YangGong, Sebastian Turullols
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Patent number: 11894772Abstract: An information handling system includes a DDR5 DIMM and a voltage regulator. The voltage regulator provides a voltage rail to the DDR5 DIMM. In a first mode, the voltage rail is based upon a pulse frequency modulation, and in a second mode, the voltage rail is based upon a forced continuous conduction mode). Selection of one of modes is based upon an input to the voltage regulator. When the information handling system is in a first state, the information handling system provides an input signal to the input to direct the voltage regulator to operate in the first state, and when the information handling system is in a second state associated with a sleep mode of the information handling system, the information handling system provides the first input signal to the first input of the voltage regulator to direct the voltage regulator to operate in the second state.Type: GrantFiled: May 25, 2022Date of Patent: February 6, 2024Assignee: Dell Products L.P.Inventors: Isaac Qin Wang, Andy ChinJui Liu
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Patent number: 11847474Abstract: Multiple windows can be simultaneously shared via a collaboration application. A multiple window sharing controller can be employed on an end user device to enable the user to create an aggregated window that includes windows of multiple applications running on the end user device. The multiple window sharing controller can cause this aggregated window to appear as an active window on the end user device. Therefore, when a collaboration application presents windows that the user can select to be shared during a meeting, the aggregated window will be included.Type: GrantFiled: August 2, 2021Date of Patent: December 19, 2023Assignee: Dell Products L.P.Inventors: Shashank Shekhar, Kanika Bhatia
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Patent number: 11836030Abstract: A system, method and apparatus for configuring a person detection sensor. The person detection sensor may limit its transmissions in accordance with a pre-configured dwell time. The person detection sensor may receive a new dwell time from a personal communication device. When the new dwell time is received, it is stored in memory and is then used to regulate the number of transmissions of the person detection sensor in accordance with the new dwell time.Type: GrantFiled: October 11, 2022Date of Patent: December 5, 2023Assignee: Ecolink Intelligent Technology, Inc.Inventors: Brandon Gruber, George Seelman
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Patent number: 11829781Abstract: A method of remotely modifying a basic input/output system (BIOS) configuration setting includes steps of: transmitting, by a remote computer, a modification instruction to a cloud server; transmitting, by the cloud server to a POS system, a new configuration value of the BIOS configuration setting contained in the modification instruction; determining, by an embedded controller of the POS system, whether the new configuration value is identical to an original configuration value of the BIOS configuration setting; and by the embedded controller when a result of the determination is negative, updating the BIOS configuration setting and transmitting a response instruction to the remote computer.Type: GrantFiled: October 6, 2021Date of Patent: November 28, 2023Assignee: FLYTECH TECHNOLOGY CO., LTD.Inventors: Li-Chun Chou, Shui-Chin Tsai, Ting-You Liou, Chien-Lin Su
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Patent number: 11829779Abstract: A computer program product, system, and computer implemented method for scalable specification and self-governance for autonomous databases, cluster databases, and multi-tenant databases in cloud and on-prem environments. The approach disclosed herein enables management of a consolidated databases using a template-based process that allows for the consolidated databases (CDBs) and pluggable databases (PBDs) to be reconfigured automatically. In some embodiments, the approach instantiates one or more monitoring modules and one or more CDB/PDB configuration managers. These elements can detect relevant changes in the conditions in which CDB instances and open PDBs operate and adjust the configurations thereof in response.Type: GrantFiled: July 1, 2021Date of Patent: November 28, 2023Assignee: Oracle International CorporationInventors: Rohan Ankalikar, Nagarajan Muthukrishnan, Ravi Shankar Thammaiah, Sandeep Kumar Samudrala
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Patent number: 11822377Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.Type: GrantFiled: January 11, 2022Date of Patent: November 21, 2023Assignee: Waymo LLCInventors: David Sobel, Pieter Kaspenberg, Pierre-Yves Droz, Srikanth Muroor
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Patent number: 11822937Abstract: Described herein are methods, systems, and computer-readable storage media for seamless offline-online execution of applications. Techniques include receiving at a server a request from a client device for execution of an application and then determining one or more subsets of a logic portion of the application. Technique further include distributing the determined one or more subsets of the logic portion of the application to the client device and receiving a set of operations from the client device and an updated state portion of the application. Technique further include authorizing each operation of the set of operations and finalizing the updated state portion of the application.Type: GrantFiled: March 21, 2023Date of Patent: November 21, 2023Assignee: Appian CorporationInventors: Andrew Radcliffe, Antonio Andrade Garcia, Marco Pescosolido, Matt Hilliard
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Patent number: 11817697Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.Type: GrantFiled: April 5, 2022Date of Patent: November 14, 2023Assignee: International Business Machines CorporationInventors: Adam Benjamin Collura, Michael Romain, William V. Huott, Pawel Owczarczyk, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Alper Buyuktosunoglu, Tobias Webel, Michael Joseph Cadigan, Jr., Paul Jacob Logsdon, Sean Michael Carey, Stefan Payer, Karl Evan Smock Anderson, Mark Cichanowski
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Patent number: 11789746Abstract: Methods and apparatuses associated with rebooting a computing device are described. Examples can include receiving at a processing resource of a computing device first signaling associated with boot programs of the computing device and second signaling associated with a boot sequence of the computing device. Examples can include writing from the processing resource to a memory resource data that is based at least in part on the first and the second signaling and writing from the processing resource to the memory resource data representative of activity of the computing device. Examples can include identifying data representative of a boot process for the computing device and rebooting the computing device in a particular sequence including the monitored activity, based at least in part on the data representative of the boot process responsive to a shutdown, restart, or both, of the computing device.Type: GrantFiled: September 28, 2022Date of Patent: October 17, 2023Assignee: Micron Technology, Inc.Inventors: Brenda D. Kraus, Yifen Liu
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Patent number: 11789507Abstract: The present disclosure provides systems and methods for managing a temperature of a battery energy storage system (“BESS”). A method may comprise obtaining a charge/discharge schedule for a battery energy storage system (BESS) for a first time period; identifying, from the charge/discharge schedule, a charge or discharge time period of the BESS within the first time period; calculating a beginning time of a temperature control time period in which equipment operates to control a temperature of the BESS to reach a target temperature by a beginning time of the charge or discharge time period; and controlling the equipment operating to control the temperature of the BESS for the temperature control time period such that the temperature of the BESS reaches the target temperature by the beginning time of the charge or discharge time period.Type: GrantFiled: March 1, 2023Date of Patent: October 17, 2023Assignee: 8ME NOVA, LLCInventors: Lukas Hansen, Nadim Kanan
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Patent number: 11789488Abstract: A parallel bus phase correction method and a device are provided. The method comprises: correcting a data bus, respectively performing phase correction tests on a clock line; determining a first optimal window of the clock line according to the clock test results; correcting the clock line by using a median value of the first optimal window, respectively performing phase correction tests on the data bus according to the multiple second phase adjustment values, and recording corresponding data test results; determining a second optimal window of the data bus according to the data test results; and performing phase correction on normal data transmission on the basis of the median value of the first optimal window and the median value of the second optimal window. The method achieves phase correction and ensures the correctness and accuracy of data transmission, even if a small clock offset is present.Type: GrantFiled: May 28, 2020Date of Patent: October 17, 2023Assignee: Inspur Suzhou Intelligent Technology Co., Ltd.Inventor: Hongtao Man
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Patent number: 11782729Abstract: A data processing system comprises a pool of reconfigurable data flow resources and a runtime processor. The pool of reconfigurable data flow resources includes arrays of physical configurable units and memory. The runtime processor includes logic to receive a plurality of configuration files for user applications. The configuration files include configurations of virtual data flow resources required to execute the user applications. The runtime processor also includes logic to allocate physical configurable units and memory in the pool of reconfigurable data flow resources to the virtual data flow resources and load the configuration files to the allocated physical configurable units. The runtime processor further includes logic to execute the user applications using the allocated physical configurable units and memory.Type: GrantFiled: August 18, 2020Date of Patent: October 10, 2023Assignee: SambaNova Systems, Inc.Inventors: Gregory Frederick Grohoski, Manish K. Shah, Raghu Prabhakar, Mark Luttrell, Ravinder Kumar, Kin Hing Leung, Ranen Chatterjee, Sumti Jairath, David Alan Koeplinger, Ram Sivaramakrishnan, Matthew Thomas Grimm