Patents Examined by Kevin J. Teska
  • Patent number: 7260508
    Abstract: A method and system are disclosed for high-resolution modeling of a well bore in a reservoir. An embodiment of the present disclosure comprises the steps of constructing a first unstructured mesh having a plurality of n-dimensional simplices corresponding to a first modeled system (space), defining a surface bounding a second modeled space, identifying a subset of the plurality of n-dimensional simplices of the first mesh that are intersected by the surface, and modifying the subset of simplices so as to adapt the first mesh such that it comprises a second mesh and a third mesh, wherein the second mesh comprises a set of simplices located entirely interior to the surface and wherein the third mesh comprises another set of simplices located entirely exterior to said surface.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: August 21, 2007
    Assignee: Object Reservoir, Inc.
    Inventors: Kok-Thye Lim, Steven B. Ward, Stephen R. Kennon
  • Patent number: 7076405
    Abstract: The present invention is related to a method for estimating power consumption and noise levels of an integrated circuit which is composed of logic gates connected in the form of a plurality of stages.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: July 11, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Taku Uchino
  • Patent number: 7072818
    Abstract: Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the invention enables the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: July 4, 2006
    Assignee: Synplicity, Inc.
    Inventors: John Mark Beardslee, Nils Endric Schubert, Douglas L. Perry
  • Patent number: 7031897
    Abstract: A method of efficiently simulating logic designs comprising signals that are capable of having more than two unique decimal values and one or more unique drive states, such as designs based upon the new N-nary logic design style, is disclosed. The present invention includes a signal model that models N-nary signal value, drive strength, and signal definition information in a specific format that supports the ability of the simulator to simulate the operation of the N-nary logic gates such as adders, buffers, and multiplexers by arithmetically and logically manipulating the unique decimal values of the N-nary signals. The simulator comprises an input logic signal model reader, an arithmetic/logical operator, an output logic signal model generator, and an output message generator that generates one or more output- or input-signal-specific output messages that pack relevant simulation data into a format optimized to the architecture of the simulation host.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: April 18, 2006
    Assignee: Intrinsity, Inc.
    Inventors: James S. Blomgren, Fritz A. Boehm
  • Patent number: 7027964
    Abstract: Systems and methods for solving finite element models, wherein the matrix that governs the solution is modified by adjusting the weighting coefficients of the matrix so that the elements which lie on the diagonal of the matrix are non-negative and the elements which are off the diagonal are non-positive. In one embodiment, a system is discretized on a finite element mesh with the contribution of each node to the discretization being weighted based upon the direction of fluid flow across each element. The nodes which are upstream from the other nodes of the respective elements are weighted more heavily to cause the resulting matrix to be substantially diagonal. This matrix is solved using traditional techniques.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: April 11, 2006
    Assignee: Object Reservoir, Inc.
    Inventor: Stephen R. Kennon
  • Patent number: 7024342
    Abstract: A numerical procedure for simulating the behavior of incompressible, viscous fluid in a casting/molding process. The method is based on classical fluid dynamic equations and uses control volume-finite element and numerical techniques to solve the momentum and energy equations to obtain solution for the variable parameters. The method incorporates five additional modules which simulate fluid flow in the shot sleeve, heat transfer between the die and the heat transfer fluid, die cooling by lubricant, formation of mend line. These additional simulation modules produce realistic boundary conditions, and replace many of the assumptions that would have to be made, to solve the governing equations. These added improvements ensure a faster convergence of the numerical solution and a more realistic simulation of the die casting process.
    Type: Grant
    Filed: July 1, 2000
    Date of Patent: April 4, 2006
    Assignee: Mercury Marine
    Inventors: David Marc Waite, Shaupoh Wang, Jenn-Yeu Nieh
  • Patent number: 6999913
    Abstract: A read-write hard disk drive is emulated using a hard disk drive image file on a protected medium such as a CD-ROM, a written disk sector database, and file system filters. A file system filter intercepts file I/O requests from the operating system. Initial read requests are serviced from the hard disk drive image file. Write operations are directed to a database, such as in RAM. Subsequent read requests for previously written data are serviced from the database. Another file system filter monitors attempts to alter the file access attributes, and prevents pre-existing read-only files on the emulated drive from being written or deleted. The maximum size of the written disk sector database is the sum of sectors on the hard disk drive image file allocated to read-write files and free space. The emulated read-write hard disk drive allows for the execution of programs requiring a read-write native media.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: February 14, 2006
    Inventor: John Alan Hensley
  • Patent number: 6996506
    Abstract: A Process and device for displacing a moveable unit on a base. The process includes: a) a force (F) is determined which, applied to the moveable unit (4), produces a combined effect, on the one hand, on the moveable unit (4) so that it exactly carries out the envisaged displacement on the base (2), especially as regards the prescribed duration and prescribed distance of the displacement, and, on the other hand, on the elements (MA1, MA2, MA3, 4) brought into motion by this displacement so that all these elements are immobile at the end of said displacement of the moveable unit (4); and b) the force (F) thus determined is applied to the moveable unit (4).
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: February 7, 2006
    Assignee: Newport Corporation
    Inventors: Van Diep Nguyen, Jean Levine
  • Patent number: 6993461
    Abstract: A method and apparatus of modeling a swept volume for a computer simulated object by generating a polyhedral representation of the object and representing motion of the object with a set of position matrices. A subset of free neighborhood entities can be determined for each matrix and traces of the motion of the free neighborhood entities can be generated. A representation of the swept volume from the traces is constructed. Free neighborhood entities can include for example, an edge or a triangle. A free neighborhood can be represented by an angular portion for different types of entities comprising the boundary of the polygon, a material zone represented by a half sphere containing material of the object and delimited by a plane of a triangle, or a free neighbor hood including a tangent zone represented by two portions of a sphere, wherein the two portions of the sphere are delimited by planes of adjacent triangles.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: January 31, 2006
    Assignee: Dassault Systemes
    Inventors: Stephane Boussac, Denis Capot-rey, Laurent Juge
  • Patent number: 6988060
    Abstract: An alignment simulation method simulates the signal waveform for an alignment mark using various alignment methods as well as the signal strength for an alignment mark, which is useful in optimizing the thickness of one or more layers as well as the geometry of the mark. The simulation of signal strength is also useful in optimizing the thickness of a layer for artifact wafers. The alignment simulation method includes accurately modeling the alignment mark, including one or more layers of various thicknesses and materials. The accurate modeling of the alignment mark includes such things as smoothing regions of the alignment mark and generating lateral shifts of the layers. The model of the alignment mark is a series of small pixels, each including the thickness of the layers and the layers indices of refraction. Using scalar diffraction, a complex reflectivity is generated for each pixel and a fast fourier transform is performed on the series of pixels.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: January 17, 2006
    Assignee: Nikon Corporation
    Inventors: Paul Derek Coon, Henry Kwok Pang Chau, Arun Ananth Aiyer
  • Patent number: 6978232
    Abstract: Methods and systems for demonstrating a service that provides a computerized transaction to a client via a server coupled to a computer network. One aspect of the invention is a method for demonstrating a virtual server service using a host server system over a computer network. A particular embodiment of the method can comprise receiving a first request from a prospective client via a prospective client system to demonstrate the virtual server service. This embodiment of the method can include sending a simulated control window of the virtual server service via a host server system to the prospective client system in response to the first request. The simulated control window can have a plurality of demonstration components that simulate corresponding system administration components of an active control window that active clients use to configure the virtual server service.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 20, 2005
    Assignee: Interland, Inc.
    Inventor: David L. Tobler
  • Patent number: 6975972
    Abstract: In simulating a physical circuit or system including analog and mixed signal digital-analog components, a computer models the physical circuit or system as a system of simultaneous equations. Conditional equations with associated conditions that can be true or false at different analog solution iterations result in a system of simultaneous equations that can change during the simulation. Rather than reformulating the system of simultaneous equations at each analog solution iteration, the system of simultaneous equations includes slots that are associated with conditional equations as the conditional equations become active. At a given point during the simulation, the conditions associated with the conditional equations are evaluated to determine which conditional equations are active. The values of the active conditional equations are placed in the slots in the system of simultaneous equations. System variables are associated with active conditional equations.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: December 13, 2005
    Assignee: Synopsys, Inc.
    Inventors: Gordon J. Vreugdenhil, Ernst Christen, Martin Vlach
  • Patent number: 6975980
    Abstract: An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE Standard 1149.1. Access to and control of these ports is though a test linking module. The test access ports on an integrated circuit can be arranged in a hierarchy with one test linking module controlling access to plural secondary test linking modules and test access ports. Each secondary test linking module in turn can also control access to tertiary test linking modules and test access ports. The test linking modules can also be used for emulation.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: December 13, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Patent number: 6973417
    Abstract: A method and system for simulating the execution of a software program on a simulated hardware system. An instrumented software program is divided into program segments delineated by tags and is then analyzed for data describing the program segments. The data is tabulated and indexed in a function data table according to the program segments. Hardware parameters that at least define a portion of the simulated hardware system are tabulated in a hardware configuration file. The software program is executed on a host system, and when a tag is executed, data indexed in the function data table under the program segment corresponding to the executed tag and hardware parameters tabulated in the hardware configuration file are used to calculate an estimated execution time for the program segment corresponding to the executed tag. The estimated execution time for the program segment is added to a running total for the overall execution time of the software program.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: December 6, 2005
    Assignee: Metrowerks Corporation
    Inventors: Sidney Richards Maxwell, III, Michael Louis Steinberger
  • Patent number: 6973419
    Abstract: A method and system for designing an impingement film floatwall panel system for a combustion chamber for a gas turbine engine comprising the steps of creating an impingement film floatwall panel knowledge base of information. The knowledge base has a plurality of design rule signals with respect to a corresponding plurality of parameter signals of associated elements of impingement film floatwall panels for a combustion chamber, wherein the knowledge base comprises at least one data value signal for each one of the plurality of design rule signals. The steps also include entering a desired data value signal for a selected one of the plurality of parameter signals of an associated element of the impingement film floatwall panels and comparing the entered desired data value signal for the selected one of the plurality of parameters with the corresponding at least one data value signal in the knowledge base for the corresponding one of the plurality of design rule signals.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: December 6, 2005
    Assignee: United Technologies Corporation
    Inventors: Thomas B. Fortin, Gregory E. Chetta, David W. Leung, Duncan C. Meyers, Keith C. Belson, John V. Diaz, Thomas E. Holladay, Scott A. Ladd, Randall G. McKinney, Sergio Rinella, Andreas Sadil, George F. Titterton, III
  • Patent number: 6970816
    Abstract: A method and system for efficiently generating parameterized bus transactions for verification of a design-under-test (DUT) comprises providing a configuration file for the DUT to a generator program. The configuration file defines possible parameter combinations for bus transactions executable by the DUT, and the generator program systematically enumerates all the possible combinations to produce a test case for verifying the DUT. Rules specified within the configuration file can include or exclude selected parameter combinations to tailor the test case to a specific DUT-to-bus interface.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: November 29, 2005
    Assignee: International Business Machines Corporation
    Inventors: Paul David Bryan, Richard Gerard Hofmann, Peter Dean LaFauci, William Robert Lee, Rhonda Gurganious Mitchell, Timothy Patrick Oke
  • Patent number: 6968304
    Abstract: The disclosure relates to a method for calculating electromagnetic radiation emitted by a computer system. The method models the characteristic radiation from a central processing unit as a modulated Gaussian pulse. The method solves Maxwell's equation using finite differences in the time domain. After solving Maxwell's equation the method determines if the radiation emitted by the heat sink is capacitively coupled to the radiation emitted by the remaining components of the computer system. The method also determines whether radiation emitted by the heat sink is inductively coupled to the radiation emitted by the remaining components of the computer system. Finally, the method uses a fast Fourier transform to translate time domain data to the frequency domain. The method also teaches using a computer system, with instructions coded on a computer readable medium to make the calculations described.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: November 22, 2005
    Assignee: Dell Products L.P.
    Inventors: Lan Zhang, Ray Wang
  • Patent number: 6968305
    Abstract: A method and apparatus for creating a memory model for use in modeling a physical memory of an electronic circuit design. Memory write operations to the physical memory and memory read operations are modeled in a lookup table. The number of entries in the lookup table is limited by an upper bound representing a total number of memory operations that can occur over a given number of clock cycles.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: November 22, 2005
    Assignee: Averant, Inc.
    Inventor: Adrian J. Isles
  • Patent number: 6968297
    Abstract: The invention relates to a method of viewing a garment made up of garment pieces and having seam lines on a dummy model. The method comprises: a step of placing the garment pieces (38, 40) on the surface of the dummy (32) or on a surface derived from the surface of the dummy; joining together the garment pieces along their seam lines; and relaxing each garment piece from its position on the surface of the dummy to its equilibrium position on the dummy. The invention also relates to apparatus for implementing the method.
    Type: Grant
    Filed: October 9, 2000
    Date of Patent: November 22, 2005
    Assignee: Lectra SA
    Inventors: Michel Ziakovic, Ramon Yepes Segovia
  • Patent number: 6968307
    Abstract: A node on a serial bus, preferably a device such as a personal computer (PC), can emulate other devices using virtual device drivers. A PC connected to a 1394 bus exposes its CROM on the bus which presents an image to other nodes on the 1394 bus and describes the functional units supported by the node. The CROM can be changed dynamically by adding unit directories to the CROM detailing peripherals connected to the PC. The PC can then be enumerated as the connected device by other PCs on the bus. The PC can emulate or morph itself into any desired device or even multiple devices at the same time. The invention also allows a PC to create devices that don't yet exist on the bus. The invention allows a user to create virtual device objects with device properties to have just in case a user plugs the particular device in to the PC.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: November 22, 2005
    Assignee: Microsoft Corporation
    Inventor: Georgios Chrysanthakopoulos