Abstract: A radio frequency (RF) circuit includes a power supply configured to generate a plurality of voltages, a plurality of power amplifiers, each having an RF output port and a power supply input port, a switch network having a plurality of input ports coupled to the power supply and a plurality of switch network output ports coupled to the power supply input ports of the plurality of power amplifiers, wherein the switch network is configured to output selected ones of the plurality of voltages from the plurality of switch network output ports, at least two of the switch network output port voltages capable of being different ones of the plurality of voltages, and an RF power combiner circuit having a plurality of input ports coupled to RF output ports of the plurality of power amplifiers and an output port at which is provided an output signal of the RF circuit.

Abstract: A differential amplifier circuit includes: P-type and N-type differential input units outputting respectively first and second outputs in response to first and second input voltages; a P-type current mirror circuit driven by the second output; an N-type current mirror circuit driven by the first output; an output unit outputting an output voltage in response to control outputs from the P-type and N-type current mirror circuits; a first sub-current source including first and second P-type transistors connected in series; and a second sub-current source including first and second N-type transistors connected in series. Control ends of the second P-type and second N-type transistors receive the control outputs from the P-type and N-type current mirror circuits, respectively. Control ends of the first P-type and first N-type transistors are coupled to a common node between the first and second P-type transistors, and a common node between the first and second N-type transistors, respectively.

Abstract: A circuit and a method are provided for suppressing the pop and click noise during the power on and power off of Class D amplifiers. The technique also suppresses pops and clicks when the Class D amplifier enters or exits standby mode. A duplicate feedback network is used to establish the stable operating points, including offsets in the Class D circuit without turning on the outputs. The technique works by gradually propagating or dissipating the offset through the signal path of a Class D amplifier by swapping the differential outputs using switches to suppress pops and clicks when starting up and shutting down the amplifier.

Abstract: A wireless communications system includes a first multiplexer distribution network fed by a radio frequency input; a plurality of multi-stage power amplifiers fed by the first multiplexer distribution network, wherein each one of the multi-stage power amplifiers includes: a pre-distortion linearizer fed from the first distribution network; a first combiner receiving input from the pre-distortion linearizer; a second combiner; a plurality of power amplifier cells fed by the first combiner and feeding the second combiner; and a second multiplexer distribution network, wherein the second multiplexer distribution network is fed by the second combiner and feeds a radio frequency output.

Abstract: An amplifier circuit operating at a fundamental angular frequency •0, includes: a transistor which is represented by an equivalent circuit which includes: an equivalent output current source, a drain-source capacitor as a parallel parasitic capacitor to an output node of the equivalent output current source, and a drain inductor as serial parasitic inductor connected between the equivalent output current source and a drain output node; a harmonic frequency processing circuit which includes an input node connected with the drain output node and an output node; a resonant circuit section provided between the output node of the harmonic frequency processing circuit and a ground node and comprising (2n+1) resonators which have resonance frequencies different from each other; and a load resistance provided in a back stage of the harmonic frequency processing circuit.

Abstract: A processing device including a control unit and a power amplifier is disclosed. The control unit generates a plurality of control signals according to an input signal. The power amplifier includes a plurality of switches. The control signals control the switches to turn on or off such that a short through current does not occur in the power amplifier.

Abstract: An error amplifier expected to exhibit rail-to-rail operation, high bandwidth, and high slew rate, is described, the error amplifier comprising a first stage to receive an input differential voltage and to provide transconductance gain, an intermediate stage to provide current gain, and an output stage to drive a load.

Abstract: There is provided a circuit to make a bias for adjusting a threshold voltage of MOS devices available in a wide range, to extend the amplitude range of the input voltage range of a semiconductor differential amplifier from a power supply potential to a ground potential, and automatically to ensure an operation of a differential pair in the saturation region as rejecting the common-mode signal in the entire voltage range. The semiconductor differential amplifier is configured by the first gates of two four-terminal fin type FETs serving as an input terminal of differential pair, and in that the second gates of the four-terminal fin type FETs interconnected with each other, wherein a signal decreasing monotonously along with the increase in the input common-mode component is input.

Abstract: Recently, there has been an increased desire to measure load currents of class-D amplifiers to improve performance. The traditional solution has been to include one or more discrete components in series with the load, but this degrades performance. Here, however, circuit is provided (which includes sample-and-hold circuit) that accurately measures load currents without inhibiting performance and that is not inhibited by the phase differences between the load voltage and load current.

Abstract: A switched mode amplifier includes a voltage source, a switched amplifier, a controller and a feedback unit. The switched amplifier sources or sinks a current to or from a load. The load and the current define a voltage over the load. The controller generates control signals for the switched amplifier in response to an input signal and a feedback signal. The feedback unit is connected to the controller and the load, and generates the feedback signal from the voltage over the load.

Abstract: At initialization of an ANR circuit (i.e., at so-called boot time), attempts are made to alternately obtain ANR settings from an external storage device by operating the ANR circuit as a master of a bus and from an external processing device by operating the ANR circuit as a slave of the bus. Such alternating attempts may be repeated until the ANR settings are loaded.

Abstract: The present invention relates to a method of attaching an active film (5) onto a flexible package comprising the steps of heating a foil (2); applying an active film (5) to the foil (2); and applying sufficient pressure to the active film (5) and foil (2) combination and sufficient heat to the foil (2) so that active film (5) adheres to the foil (2). In one example, the active film (5) comprises two components and wherein the two components are an active agent and a polymer. In another example, the active agent is an absorbing material.

Abstract: Several push-pull linear hybrid class H amplifiers are disclosed. A split power rail provides a positive supply rail and a negative supply rail in response to a power supply control voltage. A push-pull amplifier stage is powered by the positive and negative supply rails. The amplifier stage receives an input signal and provides a corresponding amplified output signal. A power supply control circuit provides the power supply control voltage in response to the smaller of the positive and negative supply rails, and the input signal.

Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.

Abstract: Class D amplifier is provided. The class D amplifier includes at least a block; each block includes an input circuit, an integrator, a comparator, a driving circuit and two feedback circuits. The input circuit receives a digital input to provide a differential pair of a positive and a negative input signals. The integrator receives the positive and negative input signals and a pair of positive and negative feedback signals for providing a positive error signal according to the positive input signal and the negative feedback signal, and providing a negative error signal according to the negative input signal and the positive feedback signal. The comparator compares between the positive and the negative error signals such that the driving circuit generates a driving output signal according to comparison result. The two feedback circuits respectively providing said positive and negative feedback signals according to the driving output signal.

Abstract: In order to realize a wider bandwidth of a frequency characteristic of a power amplification circuit, outputs of differential push-pull amplifiers which are matched at respectively different frequencies are combined together by secondary inductors, and the combined signal is outputted.

Abstract: A class AB operational amplifier includes: a first transistor, for generating a first current; a second transistor, where a second source voltage of the second transistor is equal to a first source voltage of the first transistor, for generating an output stage quiescent current; and an output stage quiescent current controller, coupled to a gate and a source of the first transistor, for controlling a first drain-to-source voltage of the first transistor to be equal to a second drain-to-source voltage of the second transistor. A ratio of the output stage quiescent current to the first current is equal to a ratio of a second W/L ratio of the second transistor to a first W/L ratio of the first transistor.

Abstract: A rail-to-rail amplifier includes an NMOS type amplification unit configured to perform an amplification operation on differential input signals in a domain in which DC levels of the differential input signals are higher than a first threshold value, a PMOS type folded-cascode amplification unit configured to perform an amplification operation on the differential input signals in a domain in which the DC levels of the differential input signals are lower than a second threshold value which is higher than the first threshold value, the PMOS type folded-cascode amplification unit being cascade-coupled to the NMOS type amplification unit, and an adaptive biasing unit configured to interrupt a current path of the PMOS type folded-cascode amplification unit in a domain in which the DC levels of the differential input signals are higher than the second threshold value in response to the differential input signals.

Abstract: An RF power amplifier includes a first amplifier module comprising a first push-pull amplifier including a first plurality of field effect transistors and a first output transformer. An output impedance of the first amplifier module is 25 ohms. A second amplifier module includes a second push-pull amplifier including a second plurality of field effect transistors and a second output transformer. An output impedance of the second amplifier module is 25 ohms. A combiner is connected to the first amplifier module and the second amplifier module. The combiner combines an output from the first amplifier module and an output from the second amplifier module into a combined signal. An output impedance of the combiner is 50 ohms.

Abstract: A method and attendant circuitry reduces the number of regulatory and switching devices in a multi-reference switching amplifier. In the preferred embodiment, multiple independently-modulated effective references are summed at a load through use of both linear and switched control of switching devices.