Abstract: A power amplifier module includes a first power amplifier that amplifies an input signal and outputs a first transmission signal; a first switch circuit that receives input of the first transmission signal and performs switching to, of a plurality of signal paths, a signal path through which the first transmission signal passes; and a second switch circuit that receives input of the first transmission signal output from the first switch circuit through the signal path to which the first switch circuit has performed switching and switches between signal paths to an antenna terminal. The second switch circuit includes a power supply circuit that supplies a reference voltage to the first switch circuit and the second switch circuit.

Abstract: An integrated circuit for measuring current while receiving wireless power is described. The integrated circuit measures a current across a resistor by an amplifier. A gain of the amplifier is based on a pair of matched upstairs resistors and a pair of matched downstairs resistors. The pair of matched upstairs resistors may include an offset in resistance. The integrated circuit includes a switch matrix with switches coupled between the integrated resistor and the pair of matched upstairs resistors. The offset for the pair of matched upstairs resistors may be measured by selectively controlling the switches.

Abstract: A power amplifier includes: plural amplifiers; a tournament-tree-shaped circuit connected with the plural amplifiers and including plural transmission lines arranged in a tournament-tree shape; and plural difference frequency short circuits shunt-connected with plural nodes of the tournament-tree-shaped circuit, wherein each of the plural difference frequency short circuits includes an inductor and a capacitor connected in series, resonant frequencies of the plural difference frequency short circuits become lower as the plural difference frequency short circuits are more separated from the plural amplifiers, and the difference frequency short circuits having equivalent resonant frequencies are connected with plural nodes in the same stage among the plural nodes.

Abstract: The present invention discloses a matching circuit with switchable load lines, a load line switching method and a power amplifier. The matching circuit matches the output impedance of the power amplifier, which amplifies an input signal and outputs an amplified signal. The matching circuit comprises a filter circuit and a switch group for load line selection, the output end of the filter circuit is connected to the switch group. The switch group comprises at least two independent switches, each switch independently constitutes a signal line, and each switch is configured with an external control signal to control on/off. The matching circuit provided by the invention adopts a switch group composed of at least two independent switches, and each independent switch forms a signal line to connect loads, so that multiple loads can be connected at the same time.

Abstract: An amplifier with temperature compensation where the amplifier has transistors configured to amplify a received signal to create an amplified signal. The amplifier gain changes over temperature. A gain control circuit, connected to the amplifier, that adjusts the amplifier gain responsive to a gain control signal. A temperature compensation circuit includes numerous elements. A constant current source that generates a constant current which is used to create a constant voltage. A temperature dependent current source that generates a temperature dependent current which is used to create a temperature dependent voltage, such that the temperature dependent current source has an inverse temperature dependance as compared to the amplifier. An operational amplifier compares the constant voltage to the temperature dependent voltage and generates an offset signal which varies over temperature. A gated buffer is configured to receive the offset signal and responsive thereto, selectively modify the gain control signal.

Abstract: A class-D RF power amplifier (PA) architecture with duty cycle control has improved power efficiency while suppressing even-order harmonics. An inductor and capacitor (LC) low pass filter (LPF) can also be integrated on-chip to further suppress harmonics and provide impedance transformation between the PA and load. This eases the design for customers and reduce their bill of materials cost. The LPF can also match the PA to the load impedance to improve efficiency. The harmonic levels can also be controlled by adjusting the duty cycle of the PA output.

Abstract: A balanced amplifier system having input and output quadrature couplers or equivalents thereof and two amplifiers there between. An RF signal is presented to a first input of an input quadrature coupler such that an amplified RF signal is output at a first output of the output quadrature coupler. A RF control signal is presented to a second input of the quadrature coupler such that an amplified control signal is outputted at the other output of the output quadrature coupler. The system is configured to reflect the amplified signal back into the second port of the output quadrature coupler in order to vary an impedance seen by the amplifiers of the balanced amplifier.

Abstract: A cryogenic integrated circuit or integrated module includes a travelling wave parametric amplifier or a Josephson parametric amplifier. The cryogenic integrated circuit or integrated module also includes an oscillator, a signal input, a biasing input, and a signal output. The oscillator is connected to an input of the amplifier and is configured to produce an oscillating drive signal. The signal input couples input signals into the amplifier. The biasing input couples biasing signals into the oscillator. The signal output conveys output signals from the amplifier out of the cryogenic integrated circuit or integrated module.

Abstract: A phased array element includes a transmit portion having a plurality of amplifier paths, each amplifier path having a driver amplifier and a power amplifier, a first transformer coupled to the power amplifier of a first amplifier path of the plurality of amplifier paths and a second transformer coupled to the power amplifier of a second amplifier path of the plurality of amplifier paths, a secondary winding of each of the first transformer and the second transformer coupled together by a common transformer segment, a transmit phase shifter switchably coupled to the plurality of amplifier paths, a receive portion coupled to the second transformer, the receive portion having a receive path having a low noise amplifier (LNA), and a receive phase shifter coupled to the LNA.

Abstract: The invention discloses a dual-mode power amplifier with switchable working power and a mode switch method. The power amplifier adopts a multi-tap input transformer, and realizes the switching between preload line and output load line by controlling the on/off of the intermediate switch connected with taps, so as to achieve the best power conversion efficiency under different maximum output powers. By using the change-over switch to control the capacitance value of the matching capacitor, it is easier to adjust the load line, thus further ensuring the performance of the power amplifier provided by the invention. The intermediate switch and change-over switch are integrated on an independent chip by CMOS/phemt/bihemt/SeGe/SOI,etc, or on a power amplifier chip by CMOS/phemt/bihemt/SeGe/SOI, etc, which is easy to realize.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to generate a modulation protocol to output audio. An example apparatus includes a modulation circuit including a first input, a second input, a first output, and a second output; a first gate coupled to the first output of the modulation circuit; a second gate coupled to the second output of the modulation circuit; a first multiplexer including a first input coupled to the first output of the modulation circuit, a second input coupled to the output of the second gate, and an output coupled to a first switch; and a second multiplexer including a first input coupled to the second output of the modulation circuit, a second input coupled to the output of the first gate, and an output coupled to a second switch.

Abstract: A chopper amplifying circuit employing a negative impedance compensation technique, including a differential input end, a first-level chopper switch, a first-level amplifying circuit, a second-level chopper switch, a second-level amplifying circuit, a negative impedance converting circuit, a negative feedback unit, an input capacitor, and a differential output end, is provided. The differential input end is connected to the first-level chopper switch. An output terminal of the first-level chopper switch is connected to the first-level amplifying circuit through the input capacitor. The first-level amplifying circuit is connected to the second-level chopper switch, which is connected to the second-level amplifying circuit. The second-level amplifying circuit is connected to the differential output end, and is also connected to a feedback input end of the first-level amplifying circuit through the negative feedback unit.

Abstract: A high-frequency power transistor comprises a transistor, at least one capacitor and a housing, which at least partially encloses the transistor and the capacitor. A first port for a high-frequency input and a gate DC voltage supply are connected to a gate contact of the transistor. A second port is connected to a drain contact of the transistor for a high-frequency output and drain DC voltage supply. A third port and fourth port are connected to a source contact of the transistor. All ports lead out of the same housing. The third port is connected via the capacitor to the source contact, and the fourth port is connected via at least one inductive element to the source contact, so that the third port provides a high-frequency ground, and the fourth port provides a floating low-frequency ground and source DC voltage supply.

Abstract: A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

Abstract: Techniques for setting a gain of an amplifier circuit in which the external resistor of the amplifier circuit is used to determine an internal gain setting to select. A voltage across the external resistor can be compared to an on-chip reference, and then used to program the desired gain. The techniques can mitigate or eliminate the need for a high-accuracy external resistor and can allow substantial improvements in initial gain accuracy and gain drift for existing boards and/or systems with only a bill of material change.

Abstract: A stacked amplifier circuit includes an input stage having first and second input ports respectively defined by inputs of first and second transistors. A transformer arrangement includes first and second primary windings and first and second secondary windings. The first secondary winding is connected to an output of the first input transistor and the second secondary winding is connected to an output of the second input transistor. Portions of the magnetic fields generated by the primary windings couple to their respective secondary windings. An output stage is AC coupled to the first and second secondary windings and has an output connected to the first and second primary windings. The input stage and the output stage are arranged in a stacked configuration such that a bias current of the output stage is reused as bias current for the input stage.

Abstract: A power amplifier circuit is a Doherty type. A peak amplifier has a first transistor and a second transistor. A first source terminal is connected to a first constant potential line. A first drain terminal and a second source terminal are connected to a first node. A second drain terminal is connected to a second constant potential line having a higher potential than the first constant potential line. A first control terminal is connected to a first bias voltage application circuit, and an input signal is input to the first control terminal via a first alternating current coupling circuit. A second control terminal is connected to a second bias voltage application circuit and is connected to the first node via a second alternating current coupling circuit. The first node is connected to the first constant potential line via a third alternating current coupling circuit.

Abstract: A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.

Abstract: In examples of a chopper operational amplifier, a current control circuit comprises a pair of voltage sources, each of which may be varied to generate a voltage signal of a particular value, and multiple inverters, each of which is configured to receive either a clock signal or its complement signal and one of the voltage signals. Based on these inputs, each inverter generates a control signal that is delivered to a corresponding switch in the input stage of the chopper operational amplifier to control the gate voltage of that switch. Based on the difference between the values of the voltage signals, the current control circuit operates to reduce the amplitudes of base currents induced by charge injection at the input terminals of the chopper operational amplifier.

Abstract: Embodiments are directed to a modular multi-level DC/DC power electronic converter for transferring power from or between a higher-voltage DC network and a lower-voltage DC network. The power electronic converter features a series connection of low-voltage voltage source modules (VSM) and a current source module (CSM). The series connection of the sub-module elements forms a string. The higher-voltage DC network is interfaced to the converter by connecting across the outer terminals of the string. The lower-voltage DC network is interfaced to the converter through the CSM.