Patents Examined by Khanh V. Nguyen
  • Patent number: 11909360
    Abstract: A radio frequency circuit includes a power amplifier configured to selectively amplify one of a first radio frequency signal and a second radio frequency signal that have different bandwidths, and when the first radio frequency signal is input to the power amplifier, a first bias signal is applied to the power amplifier, and when the second radio frequency signal is input to the power amplifier, a second bias signal different from the first bias signal is applied to the power amplifier.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: February 20, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomohiro Sano, Hirotsugu Mori
  • Patent number: 11909366
    Abstract: Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.
    Type: Grant
    Filed: December 19, 2021
    Date of Patent: February 20, 2024
    Assignee: GM CRUISE HOLDINGS LLC
    Inventors: Kamel Benboudjema, Richard Kalantar Ohanian, Aram Garibyan, Abdelkrim El Amili, Scott Singer
  • Patent number: 11901868
    Abstract: There are an amplifier circuit which includes a first current source that is connected to a power supply line to which a first electric potential is supplied, a differential input circuit that is connected between the first current source and a first node and configured to receive a differential input signal, a second current source that is connected between a power supply line to which a second electric potential is supplied and the first node, and a load circuit that is connected between a power supply line to which the first electric potential is supplied and a second node, and an inductor circuit is further connected between the first node and the second node. Thereby, the amplifier circuit achieves both lower voltage and linearity.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: February 13, 2024
    Assignee: SOCIONEXT INC.
    Inventor: Hideki Kano
  • Patent number: 11901870
    Abstract: An amplifier includes an amplifier circuit and a gain adjusting circuit. The amplifier circuit has a design gain and a real gain and is configured to output an output signal according to an input signal and the real gain. The gain adjusting circuit is coupled to the amplifier circuit and is configured to receive the input signal to compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjusting circuit increases the real gain of the amplifier circuit, so that the real gain approach the design gain.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Hui Tung, Shawn Min
  • Patent number: 11894813
    Abstract: A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: February 6, 2024
    Assignee: Omni Design Technologies Inc.
    Inventor: Hae-Seung Lee
  • Patent number: 11888453
    Abstract: A wideband amplifier includes a first stage and a second stage. The first stage includes a transconductance transistor driven by an input signal through an input transformer. The transconductance transistor couples to a cascode transistor forming an output node for the first stage. The second stage couples the output node from the first stage through an output transformer to drive an output transistor.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, Francesco Gatta
  • Patent number: 11888451
    Abstract: An amplifier is presented with a sample and average common mode feedback resistor. The amplifier circuit includes a feedback capacitor and a feedback resistor in parallel with the feedback capacitor, where the feedback capacitor and the feedback resistor form part of the negative feedback path for the amplifier. Of note, the feedback resistor is comprised of a low pass filter in series with a switched capacitor resistor, such that the low pass filter is electrically coupled to the output of the amplifier circuit and the switched capacitor resistor is electrically coupled to the inverting input of the amplifier circuit. The amplifier circuit further includes a control circuit interfaced with switches of the switched capacitor resistor. The high pass corner of the switched capacitor resistor is preferably lower than corner of the low pass filter.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 30, 2024
    Assignee: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Rohit Rothe, Sechang Oh, Kyojin Choo, Seok Hyeon Jeong, Dennis Sylvester, David T. Blaauw
  • Patent number: 11888447
    Abstract: A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 30, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Munaf Hussain Shaik, Srinivas Kumar Pulijala, Vadim Valerievich Ivanov
  • Patent number: 11881822
    Abstract: A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: January 23, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiroshi Okabe
  • Patent number: 11870403
    Abstract: A half duplex amplifier for a cable network.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: January 9, 2024
    Assignee: ARRIS Enterprises LLC
    Inventors: Zoran Maricevic, Marcel F. C. Schemmann, Zhijian Sun, Shodhan K. Shetty, Dean Painchaud, Brian J. Solomon
  • Patent number: 11870404
    Abstract: An apparatus is disclosed for gain stabilization. In an example aspect, the apparatus includes an amplifier and a gain-stabilization circuit. The amplifier has a gain that is based on a bias voltage and an amplification control signal. The gain-stabilization circuit is coupled to the amplifier and includes a replica amplifier. The replica amplifier has a replica gain that is based on the bias voltage and the amplification control signal. The gain-stabilization circuit is configured to adjust at least one of the bias voltage or the amplification control signal based on a gain error associated with the replica amplifier.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: January 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kentaro Yamamoto, Aram Akhavan, Ganesh Kiran, Lei Sun, Elias Dagher, Dinesh Jagannath Alladi
  • Patent number: 11863127
    Abstract: An amplifier device includes a regulator circuit, a first voltage converting circuit, a first control circuit, and an amplifier circuit. The regulator circuit is configured to output a first driving voltage. The first voltage converting circuit is coupled to the regulator circuit, and is configured to output one of the first driving voltage and at least one first voltages related to the first driving voltage, as a first operating voltage. The first control circuit is coupled to the first voltage converting circuit through a first node, and is configured to receive the first operating voltage and generate a first operating signal according to the first operating voltage and a first control signal. The amplifier circuit is coupled to the first control circuit and the regulator circuit, and is configured to receive the first driving voltage, and is controlled by the first operating signal to generate an output voltage.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: January 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yang Chang, Kuan-Yu Shih, Chia-Jun Chang, Ka-Un Chan
  • Patent number: 11863142
    Abstract: Methods and apparatus to determine automated gain control parameters for an automated gain control protocol are disclosed. An example apparatus includes a first tuner to amplify an audio signal. Disclosed example apparatus also include a second tuner to amplify the audio signal. Disclosed example apparatus also include a first controller to tune the first tuner to apply a first gain representative of a first range of gains to the audio signal to determine a first amplified audio signal and tune the second tuner to apply a second gain representative a second range of gains to the audio signal to determine a second amplified audio signal, the second range of gains lower than the first range of gains. Disclosed example apparatus also include a second controller to select the first range of gains to be utilized in an automated gain control protocol when the first gain results in clipping of the first amplified audio signal and the second gain does not result in clipping of the second amplified audio signal.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: January 2, 2024
    Assignee: NIELSEN COMPANY (US) LLC
    Inventors: John T. Livoti, Rajakumar Madhanganesh, Stanley Wellington Woodruff, Ryan C. Lehing, Charles Clinton Conklin
  • Patent number: 11855590
    Abstract: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Garming Liang, Simon Chai, Tzu-Jin Yeh, En-Hsiang Yeh, Wen-Sheng Chen
  • Patent number: 11855588
    Abstract: In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: December 26, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Edoardo Marino, Alessio Vallese, Alessio Facen, Enrico Mammei, Paolo Pulici
  • Patent number: 11848646
    Abstract: An amplifier circuit includes a voltage-to-current conversion circuit and a current-to-voltage conversion circuit. The voltage-to-current conversion circuit generates a current signal according to an input voltage signal, and includes an operational transconductance amplifier (OTA) used to output the current signal at an output port of the OTA. The current-to-voltage conversion circuit generates an output voltage signal according to the current signal, and includes a linear amplifier (LA), wherein an input port of the LA is coupled to the output port of the OTA, and the output voltage signal is derived from an output signal at an output port of the LA.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: December 19, 2023
    Assignee: MEDIATEK INC.
    Inventors: Shih-Hsiung Chien, Sung-Han Wen, Kuan-Ta Chen
  • Patent number: 11838000
    Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: December 5, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Todd Morgan Rasmus, Shih-Wei Chou
  • Patent number: 11830917
    Abstract: A collector layer is disposed on a substrate. The collector layer is a continuous region when viewed in plan. A base layer is disposed on the collector layer. An emitter layer is disposed on the base layer. An emitter mesa layer is disposed on the emitter layer. Two base electrodes are located outside the emitter mesa layer and within the base layer when viewed in plan. The two base electrodes are electrically connected to the base layer. Two capacitors are disposed on or above the substrate. Each of the two capacitors is connected between a corresponding one of the two base electrodes and a first line above the substrate. Two resistance elements are disposed on or above the substrate. Each of the two resistance elements is connected between a corresponding one of the two base electrodes and a second line on or above the substrate.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: November 28, 2023
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yasunari Umemoto, Shaojun Ma, Shigeki Koya
  • Patent number: 11824391
    Abstract: A device includes an amplifier having inverting and non-inverting inputs and an output. The device includes a capacitor coupled to a first node and to ground, a resistor coupled to the first node and the amplifier output, and a first switch coupled to the first node and a current sink, which is coupled to ground. The device includes AND gate having inputs and an output coupled to control terminal of first switch. The device includes a first comparator having non-inverting and inverting inputs and an output coupled to an AND gate input; a second comparator having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack, and an output coupled to an AND gate input; and a second switch coupled to the transistor stack and to a current source, the second switch having a control terminal coupled to the first comparator output.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 21, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hakan Oner, Kevin Scoones
  • Patent number: 11824506
    Abstract: An amplifier circuit comprises a first gain circuit path configured to provide a first signal gain to an input signal, a second gain circuit path configured to provide a second signal gain to an input signal, an auxiliary gain circuit path configured to provide an auxiliary signal gain to an auxiliary input signal, wherein the auxiliary signal gain is equal to the first signal gain minus the second signal gain, a summing circuit configured to sum the second gain signal path and the auxiliary signal path, and logic circuitry configured to change an output of the circuit between the first gain circuit path and the sum of the second gain signal path and the auxiliary signal path, and set the auxiliary input signal equal to the input signal before the changing.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: November 21, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Anthony Eric Turvey, Michael E. Harrell, Murat Demirkan