Abstract: A semiconductor device package includes a plurality of input leads, a plurality of transistor amplifier dies having inputs respectively coupled to the plurality of input leads, and a combined output lead configured to combine output signals received from the plurality of transistor amplifier dies and output a combined signal.

Abstract: A power amplifier circuit is a Doherty type. A peak amplifier has a first transistor and a second transistor. A first source terminal is connected to a first constant potential line. A first drain terminal and a second source terminal are connected to a first node. A second drain terminal is connected to a second constant potential line having a higher potential than the first constant potential line. A first control terminal is connected to a first bias voltage application circuit, and an input signal is input to the first control terminal via a first alternating current coupling circuit. A second control terminal is connected to a second bias voltage application circuit and is connected to the first node via a second alternating current coupling circuit. The first node is connected to the first constant potential line via a third alternating current coupling circuit.

Abstract: In examples of a chopper operational amplifier, a current control circuit comprises a pair of voltage sources, each of which may be varied to generate a voltage signal of a particular value, and multiple inverters, each of which is configured to receive either a clock signal or its complement signal and one of the voltage signals. Based on these inputs, each inverter generates a control signal that is delivered to a corresponding switch in the input stage of the chopper operational amplifier to control the gate voltage of that switch. Based on the difference between the values of the voltage signals, the current control circuit operates to reduce the amplitudes of base currents induced by charge injection at the input terminals of the chopper operational amplifier.

Abstract: Embodiments are directed to a modular multi-level DC/DC power electronic converter for transferring power from or between a higher-voltage DC network and a lower-voltage DC network. The power electronic converter features a series connection of low-voltage voltage source modules (VSM) and a current source module (CSM). The series connection of the sub-module elements forms a string. The higher-voltage DC network is interfaced to the converter by connecting across the outer terminals of the string. The lower-voltage DC network is interfaced to the converter through the CSM.

Abstract: A biasing circuit with high current drive capability for fast settling of a biasing voltage to a stacked cascode amplifier is presented. According to a first aspect, the biasing circuit uses transistors matched with transistors of the cascode amplifier to generate a boost current during a transition phase that changes the biasing voltage by charging or discharging a capacitor. The boost current is activated during the transition phase and deactivated when a steady-state condition is reached. According to a second aspect, the biasing circuit uses an operational amplifier in a feedback loop that forces a source node of a cascode transistor of a reference circuit, that is a scaled down replica version of the cascode amplifier, to be at a reference voltage. The high gain and high current capability of the operational amplifier, provided by isolating a high frequency signal processed by the cascode amplifier from the reference circuit, allow for a quick settling of the biasing voltage.

Abstract: An apparatus including an inner conductor and an outer conductor. The inner conductor may comprise a cylindrical portion, a tapered end and a plurality of blades. The blades may be arranged around the cylindrical portion and extend along a length of the cylindrical portion with a predetermined shape. The shape may have a probe at a first end and a second end of the shape may meet the cylindrical portion. The tapered end may have an input/output (I/O) transition. The outer conductor may comprise a cavity, a first connector and a plurality of second connectors. The inner conductor may be within the cavity. The first connector may be connected to the I/O transition. Each of the second connectors may be connected to the probe of one of the blades. The shape of each of the blades may be configured to provide a low-loss transition for a microwave signal.

Abstract: A supply modulator including a multiple output voltage regulator (MOVR) configured to output voltages in a discrete level-envelope tracking mode (DLETM) having different levels from each other respectively corresponding to reference output voltage signals, a switching regulator configured to output a switching regulator voltage, an output voltage being based on the switching regulator voltage and a selected voltage among the voltages in the DLETM and based on the switching regulator voltage in an average power tracking mode, a switching regulator controller configured to sense an output current of the MOVR to obtain a sensing value, and control the switching regulator based on the sensing value in the DLETM, a switch array comprising switches respectively corresponding to the voltages and configured to selectively connect the selected voltage to a power amplifier by performing a switching operation, and a switch controller configured to control the switching operation.

Abstract: A compensated amplifier for use in a power converter controller. The compensated amplifier comprises a first amplifier, a second amplifier, an integrator, and an arithmetic operator. The first amplifier coupled to receive a sensed signal and a reference signal and configured to generate a first error signal in response to the sensed signal and the reference signal. The second amplifier coupled to the first amplifier and configured to generate a second error signal in response to the sensed signal and the reference signal. The integrator coupled to the first amplifier and configured to generate an integrated error signal in response to the first error signal. The arithmetic operator coupled to the integrator and to the second amplifier, wherein the arithmetic operator is configured to generate a control signal in response to the integrated error signal and the second error signal.

Abstract: A current-mode transmitter amplifies a differential input signal to a differential, current-mode output signal. A split-input, current-mode-logic stage produces small, analog signals to limit switching currents and thus power consumption and power-supply noise. These small, analog signals are driven through a source-follower stage to reduce loading and shift the common-mode voltage to a desired level. A switched-current-source H-bridge driver combines differential outputs from the source-follower stage to provide an amplified differential output current. The output swing from the H-bridge driver is controlled by the voltage level from the source follower and derived from a replica-bias structure.

Abstract: A circuit to modulate the power supply to track input or output voltages provided to or output by a plurality of amplifiers to reduce power dissipation is provided. The circuit may include a peak detection circuit configured to receive a plurality of voltages respectively corresponding to the plurality of amplifiers, and to detect and output information regarding a maximum instantaneous voltage from the received plurality of voltages, and a summing circuit configured to output a sum of the information regarding the maximum instantaneous voltage and an amplifier headroom voltage. A reference voltage may be provided for the supply voltage responsive to the output sum. The circuit may also include a scaling circuit configured to scale the output sum, and the reference voltage may be a scaled reference voltage output by the scaling circuit.

Abstract: A difference between subsequent measures of a second signal when a first signal crosses a threshold value can be used to estimate a delay between the first and second signal. The delay can be used to compensate for delays between an envelope power supply signal and a radio frequency (RF) input signal.

Abstract: A radio frequency circuit includes a power amplifier configured to selectively amplify one of a first radio frequency signal and a second radio frequency signal that have different bandwidths, and when the first radio frequency signal is input to the power amplifier, a first bias signal is applied to the power amplifier, and when the second radio frequency signal is input to the power amplifier, a second bias signal different from the first bias signal is applied to the power amplifier.

Abstract: Various technologies described herein pertain to variable gain amplification for a sensor application. A multistage variable gain amplifier system provides variable gain amplification of an input signal. The multistage variable gain amplifier system includes a plurality of amplification stages. The multistage variable gain amplifier system further includes a power detector configured to detect a power level of an input signal received by the multistage variable gain amplifier system. The multistage variable gain amplifier system also includes a controller configured to control the amplification stages based on the power level of the input signal. The multistage variable gain amplifier system can output an output signal such that the amplification stages are controlled to adjust a gain applied to the input signal by the multistage variable gain amplifier system to output the output signal.

Abstract: There are an amplifier circuit which includes a first current source that is connected to a power supply line to which a first electric potential is supplied, a differential input circuit that is connected between the first current source and a first node and configured to receive a differential input signal, a second current source that is connected between a power supply line to which a second electric potential is supplied and the first node, and a load circuit that is connected between a power supply line to which the first electric potential is supplied and a second node, and an inductor circuit is further connected between the first node and the second node. Thereby, the amplifier circuit achieves both lower voltage and linearity.

Abstract: An amplifier includes an amplifier circuit and a gain adjusting circuit. The amplifier circuit has a design gain and a real gain and is configured to output an output signal according to an input signal and the real gain. The gain adjusting circuit is coupled to the amplifier circuit and is configured to receive the input signal to compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjusting circuit increases the real gain of the amplifier circuit, so that the real gain approach the design gain.

Abstract: A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

Abstract: A wideband amplifier includes a first stage and a second stage. The first stage includes a transconductance transistor driven by an input signal through an input transformer. The transconductance transistor couples to a cascode transistor forming an output node for the first stage. The second stage couples the output node from the first stage through an output transformer to drive an output transistor.

Abstract: An amplifier is presented with a sample and average common mode feedback resistor. The amplifier circuit includes a feedback capacitor and a feedback resistor in parallel with the feedback capacitor, where the feedback capacitor and the feedback resistor form part of the negative feedback path for the amplifier. Of note, the feedback resistor is comprised of a low pass filter in series with a switched capacitor resistor, such that the low pass filter is electrically coupled to the output of the amplifier circuit and the switched capacitor resistor is electrically coupled to the inverting input of the amplifier circuit. The amplifier circuit further includes a control circuit interfaced with switches of the switched capacitor resistor. The high pass corner of the switched capacitor resistor is preferably lower than corner of the low pass filter.

Abstract: A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.

Abstract: A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.