Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: A semiconductor module including first and second transistors coupled in parallel to a first line receiving a power supply voltage, a driver circuit configured to apply, to a second line, a first voltage to turn on the first and second transistors in response to an input signal, a first resistor having two ends respectively coupled to the second line and a control electrode of the second transistor, a second resistor having two end respectively coupled to one of the two ends of the first resistor and a control electrode of the first transistor, a third resistor coupled to the second transistor, a third transistor coupled to one of the two ends of the second resistor, and a terminal coupled to the first to third transistors, the third resistor, and a load, such that the load receives a current from the first transistor.

Abstract: A driving device and a driving-program updating method are provided. The driving device includes a signal converter, a storage circuit, a controller, a driver, and a detection circuit. The signal converter receives a first signal and converts the first signal into a second signal. The storage circuit stores a driving program. The controller provides a control signal in response to the second signal and the driving program. The driver drives a fan unit in response to the control signal. The detection circuit detects whether the first signal includes a program update command. When the first signal includes the program update command, the detection circuit updates the driving program stored in the storage circuit based on the program update command.

Abstract: A system and method for differentiating between different modes of pulsed electrical discharges via of an amplitude to time (ATC) conversion circuit is described. A bipolar ATC circuit is used to add together the positive and negative portions of an attenuated and filtered signal derived either from the voltage or current of a pulse. Alternatively, a unipolar ATC circuit may be employed. The resulting processed signal is compared against a reference voltage to generate an output signal that is active for the amount of time that the processed signal exceeds the reference voltage. Discharge mode is determined based on three factors: did a pulse occur, if a pulse occurred when did the pulse start relative to the original pulse event, and what is the duty cycle of the pulse. Subsequent pulse generated may be controlled accordingly.

Abstract: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.

Abstract: A duty cycle correction circuit, and method of operating the same, to correct the duty cycle of an input clock signal having a frequency divided-down from a reference clock by an odd-valued integer. A delay stage outputs the input clock signal delayed by one half-cycle of the reference clock, and a logic circuit outputs an extended clock signal by a logical OR of the input and delayed clock signals. A latch latches the extended clock signal when enabled by the reference clock, and a flip-flop latches the extended clock signal responsive to the reference clock. A gate selects the latch output or the flip-flop output based on the state of the delayed clock signal as an intermediate signal. A multiplexer generates the output clock by selecting between the intermediate signal and the input clock signal in alternating reference clock phases.

Abstract: An apparatus comprises a power source connected to a buffer capacitor. The apparatus comprises a first switch connected between the buffer capacitor and a driven switch. The buffer capacitor is charged by the power source when the first switch is turned off. The apparatus comprises a comparator. The comparator monitors the charging of the buffer capacitor. In response to the buffer capacitor reaching a threshold amount of charge, the comparator turns on the first switch to initiate a charge redistribution of charge from the buffer capacitor to the driven switch.

Abstract: A clock multiplexer device includes first and second control circuitries and an output circuitry. The first control circuitry generates a first enable signal and a first signal according to a first clock signal and a first selection signal, and determines whether to output the first signal to be a first output clock signal according to a second selection signal and a second enable signal. The first and the second selection signals have opposite logic values. The second control circuitry generates the second enable signal and a second signal according to a second clock signal and the second selection signal, and determines whether to output the second signal to be a second output clock signal according to the first selection signal and the first enable signal. The output circuitry outputs one of the first output clock signal and the second output clock signal to be a final clock signal.

Abstract: A power switch circuit with current sensing is disclosed. The power switch circuit is coupled between an input voltage and an output terminal. The power switch circuit includes a power switch, a first sensing switch, an adjusting circuit and a second sensing switch. The power switch is coupled to the input voltage. The first sensing switch is coupled in series between the power switch and the output terminal. There is a first node between the first sensing switch and the power switch. The adjusting circuit is coupled to the first node. The second sensing switch is coupled between the adjusting circuit and the output terminal. A control terminal of the power switch is coupled to a first control voltage. Control terminals of the first sensing switch and the second sensing switch are coupled to a second control voltage. The second control voltage is different from the first control voltage.

Abstract: A delay measurement circuit includes a first skew circuit disposed proximate to a first bonding pad configured to receive a first clock signal having a first frequency. The delay measurement circuit includes a second skew circuit disposed proximate to a second bonding pad configured to receive a second clock signal having a second frequency. The first and second skew circuits each have a first mode of operation as zero-delay-return path and a second mode of operation as a synchronized pass path. The delay measurement circuit includes a pair of conductive traces coupled to the first skew circuit, another pair of conductive traces coupled to the second skew circuit, a time-to-digital converter circuit, and a switch circuit configured to selectively couple the time-to-digital converter circuit to the first skew circuit via the pair of conductive traces and the second skew circuit via the other pair of conductive traces.

Abstract: A converter circuit, included in a power converter circuit, may generate a given voltage level on a regulated power supply node of a computer system. A control circuit may monitor a voltage level and assert a control signal in response to a determination that a regulation event has occurred. A boost converter circuit, included in the power converter circuit, may inject charge into to the regulated power supply node via a capacitor, in response to an assertion of the control signal.

Abstract: The disclosed apparatus may include a capacitive proximity sensor that increases capacitance in response to proximity of an object; a reference capacitor in parallel with the capacitive proximity sensor; a switch that connects and disconnects the capacitive proximity sensor and the reference capacitor; and a capacitance sensing block that generates a capacitance signal based on a capacitance of the reference capacitor when the switch is in a disconnecting state and based on the capacitance of the reference capacitor and a capacitance of the capacitive proximity sensor when the switch is in a connecting state. Various other methods and systems are also disclosed.

Abstract: A power device can be structured with a power switch having multiple arrangements such that the power switch can operate as a power switch with the capability to measure properties of the power switch. An example power device can comprise a main arrangement of transistor cells and a sensor arrangement of sensor transistor cells. The main arrangement can be structured to operate as a power switch, with the transistor cells of the main arrangement having control nodes connected in parallel to receive a common control signal. The sensor arrangement of sensor transistor cells can be structured to measure one or more parameters of the main arrangement, with the sensor transistor cells having sensor control nodes connected in parallel to receive a common sensor control signal. The sensor transistor cells can have a common transistor terminal shared with a common transistor terminal of the transistor cells of the main arrangement.

Abstract: A method for operating a wireless power transmission system includes providing, a driving signal for driving a transmission antenna. The method further includes receiving, by at least one transistor of an amplifier, the driving signal at a gate of the at least one transistor and inverting a direct current (DC) input power signal to generate an AC wireless signal. The method further includes determining an operating mode for signal damping during transmission or receipt of wireless data signals by selecting one of a switching mode and an activation mode for the operating mode and determining damping signals based on the operating mode. The damping signals are configured for switching the damping transistor to control signal damping during transmission or receipt of wireless data signals. The method further includes selectively damping, by the damping circuit, the AC wireless signals, during transmission of the wireless data signals based on the damping signals.

Abstract: A method for operating a wireless power transmission system includes providing, a driving signal for driving a transmission antenna. The method further includes receiving, by at least one transistor of an amplifier, the driving signal at a gate of the at least one transistor and inverting a direct current (DC) input power signal to generate an AC wireless signal. The method further includes determining an operating mode for signal damping during transmission or receipt of wireless data signals by selecting one of a switching mode and an activation mode for the operating mode and determining damping signals based on the operating mode. The damping signals are configured for switching the damping transistor to control signal damping during transmission or receipt of wireless data signals. The method further includes selectively damping, by the damping circuit, the AC wireless signals, during transmission of the wireless data signals based on the damping signals.

Abstract: Apparatus and method for controlling reactive power. In one embodiment, the apparatus comprises a bidirectional power converter comprising a switched mode cycloconverter for generating AC power having a desired amount of a reactive power component.

Abstract: A circuit comprises a gate driver having a supply voltage terminal and configured to generate an output at an output terminal based on an input. A voltage multiplexer is configured to connect a first voltage terminal to the supply voltage terminal responsive to a voltage select signal having a first value and connect a second voltage terminal to the supply voltage terminal responsive to the voltage select signal having a second value. First logic is configured to generate a fault signal responsive to detecting one of a first fault condition associated with operation of the gate driver or a second fault condition associated with operation of the gate driver and generate the voltage select signal having the second value based on the fault signal. Second logic is configured to generate the voltage select signal having the second value after a predetermined delay period based on a value of the input.

Abstract: A system may include a sensor configured to output a sensor signal indicative of a distance between the sensor and a mechanical member associated with the sensor, a measurement circuit communicatively coupled to the sensor and configured to determine a physical force interaction with the mechanical member based on the sensor signal, and a compensator configured to monitor the sensor signal and to apply a compensation factor to the sensor signal to compensate for changes to properties of the sensor based on at least one of changes in a distance between the sensor and the mechanical member and changes in a temperature associated with the sensor.

Abstract: A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.

Abstract: An electronic device capable of transmitting and receiving wireless power is provided. The electronic device includes a wireless power transfer (WPT) coil, a sensor coil surrounding the WPT coil, and a processor operatively coupled to the WPT coil and the sensor coil. The processor may be configured to control to transmit and receive power by using the WPT coil, perform a ping operation by using the sensor coil, control to measure a waveform of a current or voltage of the sensor coil while or after performing the ping operation using the sensor coil, control to check a Q factor of the sensor coil based on the measured waveform, identify the presence of a foreign object based on the checked Q factor, and control the power transmission using the WPT coil based on a result of the determination of the presence of the foreign object.