Abstract: Disclosed herein is a switch device including a switch element coupled between a power supply terminal and an output terminal, and an output abnormality detection circuit that. When an output current flowing during a turn-on period of the switch element is smaller than a threshold value, the output abnormality detection circuit detects an occurrence of an output abnormal condition, and increases a turn-on resistance of the switch element to determine which of a load-open condition and a short-to-power-supply-voltage condition is occurring at the output terminal on a basis of an output voltage at the output terminal.

Abstract: A circuit is disclosed. The circuit includes an input port, an output port, a squelch detector and a disconnect detector. The squelch detector and the disconnect detector are enabled or disabled by a signal such that only one of the squelch detector and the disconnect detector is active at a given time. When the squelch detector is active, a threshold generator generates a squelch threshold for the squelch detector based on a squelch configuration data indicative of a predefined squelch threshold. When the disconnect detector is active, the threshold generator generates a disconnect threshold for the disconnect detector based on a disconnect configuration data indicative of a predefined disconnect threshold.

Abstract: Tunable delay circuit devices have an input port, an output port, at least three parallel paths connecting the input port and the output port, on each path, an input switch and an output switch, and on each path, a plurality of shunt resonant tanks connected between the input switch and the output switch, each shunt resonant tank periodically chargeable from the input port and dischargeable to the output port by operation of the input switch and the output switch.

Abstract: Methods, systems, and apparatus for determining frequencies at which to operate interacting qubits arranged as a two dimensional grid in a quantum device. In one aspect, a method includes the actions of defining a first cost function that characterizes technical operating characteristics of the system. The cost function maps qubit operation frequency values to a cost corresponding to an operating state of the quantum device; applying one or more constraints to the defined first cost function to define an adjusted cost function; and adjusting qubit operation frequency values to vary the cost according to the adjusted cost function such that the operating state of the quantum device is improved.

Abstract: A phase shifter includes an active region, a first and a second set of gates and a set of contacts. The active region extends in a first direction and is located at a first level. The first and second set of gates each extend in a second direction, overlap the active region and are located at a second level. The second set of gates are positioned along opposite edges of the active region, are configured to receive a first voltage, and are part of a first transistor. The first transistor is configured to adjust a first capacitance of the phase shifter responsive to the first voltage. The set of contacts extend in the second direction, are over the active region, are located at a third level, and are positioned between at least the second set of gates.

Abstract: An output module for a PLC includes an output circuit. This output circuit is open or closed selectively between a power supply terminal (to which a power supply voltage is supplied) and an output terminal (connected to a solenoid). The output module includes a control apparatus which controls the operation of the output circuit. The output circuit includes switches connected in series to each other between the power supply terminal and the output terminal, and a current output section which performs an operation of short-circuiting terminals of the switch to pass a predetermined current through a path formed due to the short-circuiting. The control apparatus includes on/off control sections which controls on/off states of the respective switches, and diagnosis sections which perform a diagnosis on presence of a short-circuit fault in the respective switches based on diagnostic signals output from a low-potential terminal of the switches.

Abstract: Operating a charge pump in which switches from a first set of switches couple capacitor terminals to permit charge transfer between them and in which switches from a second set of switches couple capacitor terminals of capacitors to either a high-voltage or a low-voltage terminal includes cycling the switches through a sequence of states, each state defining a corresponding configuration of the switches. At least three of the states define different configurations of the switches. During each of the configurations, charge transfer is permitted between a pair of elements, one of which is a first capacitor and another of which is either a second capacitor or the first terminal.

Abstract: A fault tolerant quantum computer is implemented using hybrid acoustic-electric qubits. A control circuit includes an asymmetrically threaded superconducting quantum interference devices (ATS) that excites excite phonons in a mechanical resonator by driving a storage mode of the mechanical resonator and dissipates phonons from the mechanical resonator via an open transmission line coupled to the control circuit, wherein the open transmission line is configured to absorb photons from a dump mode of the control circuit.

Abstract: Methods and apparatus for measuring a current difference between at least two current traces in a circuit board. Each wire or trace generates a magnetic field which may then be measured by at least one magnetic field sensing element positioned on an integrated circuit, such as a current sensor integrated circuit or a differential magnetic field sensor integrated circuit. An output disconnect signal may be provided from the current sensor or differential magnetic field sensing integrated circuit to indicate that a current difference above a predetermined threshold exists in the two or more current traces.

Abstract: The present application is directed to a level shifting circuit. In one form, a level shifting circuit includes a first inverter, a level shifting unit, and a fast driving unit. The first inverter is configured to invert an input signal received at an input node and to output an inverted input signal to a second input node. The level shifting unit is configured to perform amplitude up-shifting processing on a received input signal. The fast driving unit is configured to pull up an output signal of an output node of the level shifting unit by increasing a discharge current of the level shifting unit when receiving the input signal.

Abstract: A system may include a signal generator configured to generate a raw waveform signal and a modeling subsystem configured to implement a discrete time model of an electromagnetic load that emulates a virtual electromagnetic load and further configured to modify the raw waveform signal to generate a waveform signal for driving the electromagnetic load by modifying the virtual electromagnetic load to have a desired characteristic, applying the discrete time model to the raw waveform signal to generate the waveform signal for driving the electromagnetic load, and applying the waveform signal to the electromagnetic load.

Abstract: A method determines a pin-to-pin delay between clock signals having integrally related frequencies. The method includes generating a delay code corresponding to a delay between a first signal edge of a first clock signal received by a first node of an integrated circuit and a second signal edge of a second clock signal received by a second node of the integrated circuit. The delay code is based on a first time code corresponding to the first signal edge, a second time code corresponding to the second signal edge, a first skew code, a second skew code, and a period of the first clock signal or the second clock signal. The first clock signal has a first frequency, the second clock signal has a second frequency, and the second frequency is integrally related to the first frequency.

Abstract: As disclosed herein, a level shift circuit includes devices that are responsive to an ESD signal for placing those devices in a specific condition in response to the ESD signal indicating an ESD event. In some embodiments, the devices are transistors in current paths that are placed in a condition such that during an ESD event, voltage differentials in the current paths across voltage domain boundaries do not damage the circuitry of the level shift circuit. In some embodiments, some of the same devices that are responsive to the ESD event are also responsive to a signal to that detects the absence of a power supply voltage of one of the domains and places those devices in a condition to disable the level shift circuit if the power supply voltage is not present.

Abstract: Apparatus and method for controlling reactive power. In one embodiment, the apparatus comprises a bidirectional power converter comprising a switched mode cycloconverter for generating AC power having a desired amount of a reactive power component.

Abstract: A device includes a first transistor coupled to an input voltage source and to an output voltage node and an amplifier comprising a first input, a second input, and an output. The device also includes a second transistor coupled to the input voltage source and the first input of the amplifier and a third transistor coupled to the second transistor and a ground node. The third transistor includes a control terminal coupled to the output of the amplifier. The device also includes a first voltage-controlled voltage source coupled to a control terminal of the first transistor and a control terminal of the second transistor and a second voltage-controlled voltage source coupled to the first transistor and the second input of the amplifier.

Abstract: A clock product includes a first phase-locked loop circuit including a first frequency divider. The first phase-locked loop circuit is configured to generate a first clock signal tracking a first reference clock signal and a second reference clock signal. The first phase-locked loop circuit is controlled by a first divide value and a first divide value adjustment based on the first reference clock signal. The clock product includes a circuit including a second frequency divider. The circuit is configured to generate a second clock signal based on the first clock signal, a second divide value, and a second divide value adjustment. The second clock signal tracks the second reference clock signal. The second divide value adjustment is based on the first divide value adjustment and opposes the first divide value adjustment.

Abstract: A magnetic shielding sheet is provided. The magnetic shielding sheet according to an embodiment of the present invention comprises: a plate-shaped magnetic sheet made of a magnetic material containing a metal component; and a cover member for covering the entire surface of the magnetic sheet so as to prevent the surface of the magnetic sheet from being exposed to the outside.

Abstract: Techniques facilitating dynamic control of ZZ interactions for quantum computing devices. In one example, a quantum coupling device can comprise a biasing component that is operatively coupled to first and second qubits via respective first and second drive lines. The biasing component can facilitate dynamic control of ZZ interactions between the first and second qubits using off-resonant microwave signals applied via the respective first and second drive lines.

Abstract: An electrical energy harvesting system includes at least one variable capacitor, preferably of electro-active polymer, two voltage sources, and a half-bridge network. The voltage sources are arranged in series with an interconnecting node between a first polarity terminal of the first voltage source and a second opposite polarity terminal of the second voltage source. For each variable capacitor the half-bridge network includes a pair of diodes in series with a common node therebetween, connected in parallel with the first voltage source, an inductor connected between the common node and a first terminal of the variable capacitor, a first switch in parallel with the first diode, and a second switch in parallel with the second diode. The second terminal of the variable capacitor is connected to the first polarity terminal of the second voltage source.

Abstract: A power transmission device which can increase a frequency change width (frequency dispersion region) while curbing output fluctuations. The power transmission device that wirelessly transmits power to a power receiving device includes an inverter configured to convert a voltage into an alternating current voltage with a drive frequency, a power supply configured to generate the voltage to be supplied to the inverter, a power transmission coil configured to be supplied with the alternating current voltage and generate an alternating current magnetic field, and a voltage changing unit configured to spontaneously change an output voltage of the power supply, wherein the inverter is configured to control the drive frequency in response to a change in the output voltage.