Patents Examined by Khoa D Doan
  • Patent number: 12254188
    Abstract: Systems and methods for memory snapshots are disclosed. In particular, a memory device may include a volatile section and a backup persistent storage section. A snapshot manager circuit is positioned between a host control circuit or central processors. This snapshot manager circuit acts as a memory virtualization layer within the memory device and may use a redirect on write type command to put a snapshot of actively changed memory to a reserved memory area in the volatile section. A background function may copy the snapshots to the persistent storage section. Because the snapshot manager circuit is in the hardware memory access layers of the memory device, operation of the application is not interrupted or paused to access the specific memory sections. Further, snapshots are more readily available in the memory used by the host control circuit.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: March 18, 2025
    Assignee: SMART Modular Technologies, Inc.
    Inventors: Andrew Mills, Torry Steed
  • Patent number: 12242386
    Abstract: Various devices, such as storage devices or systems are configured to efficiently process and update logical mappings within control table sets. Control table sets are often groupings of logical mapping corresponding to the logical locations of data requested by a host-computing device and the physical locations of the data within the memory array. As data is written and erased, these mappings must be updated within the control table set. Received changes to these mappings are typically stored and updated in two locations: a cache memory and a control table update list. By tracking and marking various control table sets as dirty or having undergone multiple changes, additional received updates can be stored and updated in only the cache memory, bypassing the second control table change list. By only utilizing one method of updating control table sets, processing overhead is reduced and various read or write activities are more efficiently done.
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: March 4, 2025
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dinesh Kumar Agarwal, Leeladhar Agarwal, Lawrence Vazhapully Jacob
  • Patent number: 12235758
    Abstract: An electronic device is provided. The electronic device includes a processor, a volatile memory, and a storage. The processor is configured to, in response to a request for data included in a file, identify information of the file and a type of the request, configure a flag for the request if the file is determined to correspond to at least one in a list of a designated information table, identify, based on the flag, mapping information of a specific region, which includes a logical address of the data, in mapping information for mapping of logical addresses and physical addresses for the non-volatile memory of the storage, acquire, in response to the mapping information of the specific region existing in the volatile memory, a physical address of the non-volatile memory mapped to the logical address of the data, and transmit the request, including the acquired physical address of the non-volatile memory, to the storage.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 25, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jintae Jang, Wonsuk Jung, Doohyun Hwang
  • Patent number: 12235753
    Abstract: A system can determine a first correlation between respective percentages of stored garbage and respective amounts of garbage of a block storage system based on determining the respective amounts of garbage among first blocks of the respective blocks that satisfy respective criterions of the respective percentages of stored garbage. The system can, based on the first correlation, determine a second correlation between an estimated throughput applicable to reclaiming garbage in the block storage system and the respective amounts of garbage of the block storage system. The system can, based on the first correlation and the second correlation and for a specified target reclamation throughput, determine a corresponding first percentage of stored garbage of the respective percentages of stored garbage. The system can perform copy-forward garbage collection on second blocks of the block storage system that satisfy a criterion defined with respect to the first percentage of stored garbage.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: February 25, 2025
    Assignee: DELL PRODUCTS L.P.
    Inventors: Yi Ye, Kalyan C. Gunda, Ao Sun
  • Patent number: 12236101
    Abstract: A memory system includes a memory module and a memory controller to control semiconductor memory devices in the memory module. Each of the semiconductor memory devices provides the memory controller with an address of at least a defective memory cell row unrepairable with a redundancy resource in a memory cell array as unrepairable address information. The memory controller allocates a portion of a normal cell regions of at least one of the semiconductor memory devices as a reserved region, and remaps first and second unrepairable addresses to first and second physical addresses of the reserved region in response to first and second host physical addresses from a host matching the first and second unrepairable addresses, respectively. The first physical address and the second physical address are consecutive.
    Type: Grant
    Filed: July 14, 2023
    Date of Patent: February 25, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyunseok Kim
  • Patent number: 12236132
    Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: sending a first operation command sequence to a rewritable non-volatile memory module to instruct a first memory module in the rewritable non-volatile memory module to perform a first operation; obtaining a first time threshold value corresponding to the first operation; updating a first counting value corresponding to the first memory module; and sending a first query command sequence to the rewritable non-volatile memory module to query a status of the first memory module, in response to that the first counting value reaches the first time threshold value.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: February 25, 2025
    Assignee: PHISON ELECTRONICS CORP
    Inventors: Sebastien Jean, Ming-Jen Liang
  • Patent number: 12229045
    Abstract: In some examples, a sensor service receives an indication of interest from a client for sensor data of a first sensor of the plurality of sensors, and allocates buffers in the memory for the plurality of sensors. The sensor service provides a first buffer to a sensor connector that is to receive the sensor data from the first sensor, and receives, from the sensor connector, an indication that the first buffer in the memory has been written with the sensor data from the first sensor. Based on the indication of interest from the client, the sensor service notifies the client that the first buffer is available for reading by the client from the memory.
    Type: Grant
    Filed: September 25, 2023
    Date of Patent: February 18, 2025
    Assignee: BlackBerry Limited
    Inventors: Michael Jonathan Mueller, Noel Dylan Dillabough
  • Patent number: 12223187
    Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event, The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: February 11, 2025
    Assignee: Kioxia Corporation
    Inventors: Saswati Das, Manish Kadam
  • Patent number: 12216942
    Abstract: According to one embodiment, a controller includes a first interface, a second interface, a virtual register table, a memory management unit and a calculation processing unit. The first interface receives an I/O command from a host. The second interface transmits and receives first host data to and from a storage. The virtual register table has a virtual address specified by a page number assigned to a page in which data to be used to process a calculation instruction is stored and a page offset, and a data size of the data. The memory management unit stores, into a memory, the copy of the first host data, and updates the virtual register table. The calculation processing unit processes the calculation instruction by referring to the virtual register table.
    Type: Grant
    Filed: October 9, 2023
    Date of Patent: February 4, 2025
    Assignee: KIOXIA CORPORATION
    Inventors: Yoshihiro Ohba, Tomoya Sanuki, Takeshi Ishihara
  • Patent number: 12204779
    Abstract: A storage system includes a master storage device for storing data based on a RAID level determined by a host, a slave storage device for storing the data according to a command distributed from the master storage device, and a controller hub for coupling the slave storage device to the master storage device, wherein the master storage device is further configured to transfer the command to the slave storage device through the controller hub when the master storage device receives a command processing request from the host, transmit a complete queue (CQ) to the host when operations of the master storage device and the slave storage device are completed in response to the command processing request, and request a host to allocate a capacity to each function in the master storage device and the at least one of the plurality of slave storage devices based on a reference capacity.
    Type: Grant
    Filed: May 12, 2023
    Date of Patent: January 21, 2025
    Assignee: SK hynix Inc.
    Inventor: Yong Tae Jeon
  • Patent number: 12198479
    Abstract: A log management apparatus according to the present disclosure comprises a memory storing traveling log data of a vehicle and one or more processors. The one or more processors are configured to execute the following first to five processes. The first process is acquiring a remaining capacity of the memory at a current time. The second process is acquiring a traveling plan of the vehicle. The third process is calculating a predicted data size which is a size of the traveling log data predicted to be stored in the future in the traveling plan. The fourth process is predicting a capacity shortage of the memory in the traveling plan based on the predicted data size and the remaining capacity at the current time. The fifth process is a process of increasing the remaining capacity when the capacity shortage of the memory is predicted.
    Type: Grant
    Filed: September 28, 2023
    Date of Patent: January 14, 2025
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yusuke Hayashi, Taichi Kawanai, Daichi Hotta
  • Patent number: 12197791
    Abstract: Embodiments of the present application relate to a method, a bridging device, a system and a medium of virtualization processing of a storage device. The method comprises: receiving an initial access request to a virtual disk sent by a virtual machine user; translating the virtual address corresponding to the virtual machine to a first physical address corresponding to a host based on a preconfigured address mapping relationship; translating the virtual access address to a second physical address corresponding to the storage device based on a preconfigured virtual partition mapping relationship; and generating a target access request based on the first physical address and the second physical address, and sending the target access request to the host, so as to cause the host to perform information interaction with the storage device based on the target access request.
    Type: Grant
    Filed: June 20, 2024
    Date of Patent: January 14, 2025
    Assignee: BEIJING VOLCANO ENGINE TECHNOLOGY CO., LTD.
    Inventors: Haixin Yu, Haozhong Zhang, Shoujing Bo, Jiali Jiang, Xuechao Wei
  • Patent number: 12189535
    Abstract: The disclosed computer-implemented method includes locating, from a processor storage, a partial tag corresponding to a memory request for a line stored in a memory having a tiered memory cache and in response to a partial tag hit for the memory request, locating, from a partition of the tiered memory cache indicated by the partial tag, a full tag for the line. The method also includes fetching, in response to a full tag hit, the requested line from the partition of the tiered memory cache. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: January 7, 2025
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Vydhyanathan Kalyanasundharam, Ganesh Balakrishnan, Kevin M. Lepak, Amit P. Apte
  • Patent number: 12189529
    Abstract: A Logically Composed System (LCS) data provisioning system includes an orchestrator device that includes a cache subsystem and that is coupled to client devices and storage subsystem(s). When the orchestrator device identifies that a first client device has exclusive access to the storage subsystem(s), it activates read data caching for the storage subsystem(s). The orchestrator device then receives a first read request from the first client device that is directed to first data that is stored in the storage subsystem(s) and, in response, retrieves the first data from the cache subsystem and provides the first data to the first client device. When the orchestrator device identifies that the first client device no longer has exclusive access to the storage subsystem(s), it deactivates the read data caching for the storage subsystem(s).
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: January 7, 2025
    Assignee: Dell Products L.P.
    Inventors: Shyamkumar T. Iyer, Xiangping Chen, Xunce Zhou, William Price Dawkins
  • Patent number: 12189967
    Abstract: The present disclosure includes apparatuses, methods, and systems for partitioning system data from user data in memory. In an example, a method can include receiving system data at a memory, assigning the system data a first address within a first range of memory addresses, storing the system data in a first portion of the memory operated with a first set of trim settings in response to the system data having the first address within the first range of memory addresses, receiving user data, assigning the user data a second address within a second range of memory addresses, and storing the user data in a second portion of the memory operated with a second set of trim settings in response to the user having the second address within the second range of addresses.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 7, 2025
    Assignee: Micron Technology, Inc.
    Inventor: Michael Burk
  • Patent number: 12182453
    Abstract: A plurality of computing devices are communicatively coupled to each other via a network, and each of the plurality of computing devices is operably coupled to one or more of a plurality of storage devices. Each computing device is operable to access one or more memory blocks within the storage devices and maintain a registry over the same one or more memory blocks. The registry may be adaptively resized according to the access of the one or more memory blocks.
    Type: Grant
    Filed: December 14, 2023
    Date of Patent: December 31, 2024
    Assignee: Weka.IO Ltd.
    Inventors: Maor Ben Dayan, Omri Palmon, Liran Zvibel, Kanael Arditti
  • Patent number: 12182437
    Abstract: Systems and methods for creating virtual machine snapshots. An example method comprises: receiving a request to create a snapshot of a virtual machine running on a host computer system; protecting from modification a plurality of virtual memory pages of the virtual machine; responsive to detecting an attempt to modify a virtual memory page of the plurality of memory pages, copying the virtual memory page to a queue residing in a random access memory (RAM) of the host computer system; making the virtual memory page writable; retrieving the virtual memory page from the queue; writing the virtual memory page to a disk of the host computer system; and responsive to exhausting the queue, completing creation of the snapshot of the virtual machine.
    Type: Grant
    Filed: October 10, 2023
    Date of Patent: December 31, 2024
    Assignee: Parallels International GmbH
    Inventors: Iurii Ovchinnikov, Alexey Koryakin, Denis Lamtsov, Nikolay Dobrovolskiy, Serguei M. Beloussov
  • Patent number: 12182394
    Abstract: A method and system are provided for limiting unnecessary data traffic on the data communication connections connecting various system components, including the various levels of system memory. Some embodiments may include processing a buffer allotment request and/or a buffer release command in coordination with a system or network operation requiring temporary storage of data in a memory buffer. The buffer allotment request may be capable of indicating the amount of storage space required on the memory buffer to execute the system or network operation. The system may be capable of precluding the system or network operation from executing until there is sufficient space in the memory buffer to complete the operation without evicting operational data from the memory buffer. In some embodiments, the buffer release command may signal completion of the system or network operation and release of the utilized memory buffer space for other operations.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: December 31, 2024
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Yamin Friedman, Idan Burstein, Gal Yefet
  • Patent number: 12182421
    Abstract: In at least one embodiment, processing can include: receiving write operations; persistently recording, in a write cache or log, the write operations using page descriptors (PDESCs) of a PDESC pool and page buffers (PBs) of a PB pool; selecting, in accordance with criteria, write data pages stored in the PB pool for demotion to a physical large block (PLB) pool included in backend non-volatile storage, wherein each write data page selected denotes content written by a corresponding one of the write operations; responsive to the selecting, persistently storing the write data pages of the PB pool in the PLB pool; and updating PDESCs associated with the write data pages to reference corresponding storage locations in the PLB pool rather than in the PB pool.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: December 31, 2024
    Assignee: Dell Products L.P.
    Inventors: Vamsi K. Vankamamidi, Geng Han, Vikram A. Prabhakar
  • Patent number: 12182400
    Abstract: A system comprises a plurality of computing devices that are communicatively coupled via a network and have a file system distributed among them, and comprises one or more file system request buffers residing on one or more of the plurality of computing devices. File system choking management circuitry that resides on one or more of the plurality of computing devices is operable to separately control: a first rate at which a first type of file system requests (e.g., one of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers, and a second rate at which a second type of file system requests (e.g., another of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: December 31, 2024
    Assignee: Weka.IO Ltd.
    Inventors: Maor Ben Dayan, Omri Palmon, Liran Zvibel, Kanael Arditti, Tomer Filiba