Patents Examined by Khoa D Doan
  • Patent number: 11989588
    Abstract: A method for managing a shared memory, including: setting a master core, applying, by the master core, to a system for idle hugepage blocks, mapping the idle hugepage blocks to a virtual address space of the master core, and sorting the hugepage blocks in an ascending order of physical address size of the hugepage blocks; dividing, depending on whether the physical addresses are continuous, the hugepage blocks sorted into segments; in response to determining that there are segments satisfying the memory demand of the subsystem, sorting the segments satisfying the memory demand of the subsystem in a descending order of lengths thereof, and remapping the sorted segments to obtain segments having both continuous virtual addresses and continuous real addresses; and in response to determine that there is a segment satisfying the memory demand of the system, releasing hugepage blocks other than the segment satisfying the memory demand of the system.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: May 21, 2024
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Tangzhi Feng, Ruizhen Wu, Jian Cui, Hongbin Yu
  • Patent number: 11983427
    Abstract: A system and method for repartitioning data in a distributed network. The method may include executing, by one or more processors, a first pass of a data set from a plurality of first sources to a plurality of first sinks, each first sink collecting data from one or more of the first sources, and executing, by the one or more processors, a second pass of the data set from a plurality of second sources to a plurality of second sinks, each one of the plurality of first sinks corresponding to one of the plurality of second sources, and each second sink collecting data from one or more of the second sources. Executing the first and second passes causes the data set to be repartitioned such that one or more second sinks collect data that originated from two or more of the first sources.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: May 14, 2024
    Assignee: Google LLC
    Inventors: Mohsen Vakilian, Hossein Ahmadi
  • Patent number: 11977740
    Abstract: A cartridge management system that manages a plurality of cartridges, in each of which a magnetic tape is housed, includes a processor, and a memory incorporated in or connected to the processor, in which the processor is configured to execute data rewrite-in processing of rewriting data stored in the magnetic tape, in a specific cartridge among the plurality of cartridges based on an access frequency indicating a frequency of access to the data, and cartridge replacement processing of replacing the data stored in the magnetic tape of the specific cartridge and the data stored in the magnetic tape of another cartridge among the plurality of cartridges.
    Type: Grant
    Filed: December 2, 2022
    Date of Patent: May 7, 2024
    Assignee: FUJIFILM CORPORATION
    Inventor: Yosuke Sumiya
  • Patent number: 11972119
    Abstract: A storage system that can achieve a cryptographic operation circuit that supports multiple types of cryptographic operation formats. The cryptographic operation circuit is provided that encrypts data according to the format determined by the processor based on a request by the host terminal for writing the data into the storage device, and decrypts the encrypted data on the data stored in the storage device according to the format determined by the processor based on a request by the host terminal for reading the data from the storage device.
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: April 30, 2024
    Assignee: HITACHI, LTD.
    Inventors: Shumpei Morita, Tomoyuki Kamazuka, Hideaki Monji, Yuusaku Kiyota
  • Patent number: 11972111
    Abstract: A memory device for improving the speed of a program operation and an operating method thereof is provided. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate voltages for one or more program operations and a verify operation performed on the plurality of memory cells, a control logic configured to perform a control operation on the plurality of memory cells so that a first program and a second program loop are performed, a second program operation being performed based on a compensation voltage level determined based on a result of the first verify operation, and a plurality of bit lines connected to the memory cell array, wherein the first verify operation includes first even sensing and second even sensing on even-numbered bit lines, and first odd sensing and second odd sensing on odd-numbered bit lines.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Junyong Park, Minseok Kim, Jisu Kim, Ilhan Park, Doohyun Kim
  • Patent number: 11966600
    Abstract: Methods, systems, and devices for memory device with enhanced data reliability capabilities are described. For a write operation, a memory device may receive a write command from a host device indicating a first set of data. The memory device may determine to operate in first mode of operation associated with a reliability above a threshold and generate a second set of data to store with the first set of data based on operating in the first mode of operation. For a read operation, the memory device may identify that a read command received from a host device is associated with the first mode of operation. Based on operating in the first mode of operation, the memory device may select one or more reference thresholds (e.g., a subset of reference thresholds) to retrieve the first set of data and transmit the first set of data to the host device.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Deping He, David Aaron Palmer
  • Patent number: 11941298
    Abstract: A host system initiates an abort of a command that has been placed into a submission queue (SQ) of the host system. The host system identifies at least one of a first outcome and a second outcome. When the first outcome indicates that the command is not completed and the second outcome indicates that the SQ entry has been fetched from the SQ, the host system sends an abort request to a storage device, and issues a cleanup request to direct the host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry based on at least one of the first outcome and the second outcome.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: March 26, 2024
    Assignee: MediaTek Inc.
    Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
  • Patent number: 11934660
    Abstract: Embodiments are directed to tiered data store with persistent layers. A write tier in the file system for storing in a file system. A value for a performance metric that corresponds to write requests to the file system may be predicted based on characteristics of the write requests such that the performance metric may be determined based on a plurality of interactions with the write tier. The predicted value that exceeds a threshold value of the performance metric may be employed to cause performance of further actions, including: queuing a portion of the write requests in a memory buffer based on the predicted value and the threshold value; combining the queued portion of the write requests into s; storing the data segments in the write tier such that a measured value of the performance metric may be less than the threshold value.
    Type: Grant
    Filed: November 7, 2023
    Date of Patent: March 19, 2024
    Assignee: Qumulo, Inc.
    Inventors: Matthew Christopher McMullan, Aaron James Passey, Jonathan Michael MacLaren, Yuxi Bai, Thomas Gregory Rothschilds, Michael Anthony Chmiel, Tyler Morrison Moody, Pathirat Kosakanchit, Rowan Arthur Phipps
  • Patent number: 11934704
    Abstract: Various devices, such as storage devices or systems are configured to efficiently manage and determine control table sets. Such a device may include a processor, a memory array including a plurality of memory devices which include a plurality of control table sets stored in a plurality of regions, and a control table set determination logic configured to: receive a command from a host device associated with logical to physical address mapping updates, determine a control table set of the plurality of control table sets associated with the command, determine a region of the plurality of regions associated with the determined control table set, determine a position in the control table set in the determined region associated with the command, generate additional control table sets upon a first determination that the position is not vacant, and store the command in the generated additional control table sets.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: March 19, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Pavithra P, Ashish Kumar
  • Patent number: 11922036
    Abstract: Host data stream assignment with space-leveling across storage block containers. In one example, a data storage device including an electronic processor that, when executing a space-leveling scheme, is configured to receive a first host data stream, store the first host data stream in a block container assignment queue (BCAQ), detect a next storage block container switching event, responsive to detecting the next storage block container switching event, randomly select a location of the BCAQ, responsive to randomly selecting the location of the BCAQ, assign a second host data stream located at the location of the BCAQ that is selected to a storage block container of a memory, and control the memory to store the second host data stream in the storage block container that is assigned.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Oleg Kragel, Vijay Sivasankaran, Mikhail Palityka, Lawrence Vazhapully Jacob
  • Patent number: 11922020
    Abstract: A read-disturb-based read temperature information persistence system includes a storage device coupled to a host subsystem. The storage device receives a first instruction from the host subsystem to write first data to the storage device, writes the first data to a first block in the storage device, and determines first read temperature(s) for the first data based on first read disturb information associated with the first block in the storage device. When a second instruction is received from the host subsystem to write second data to the storage device that is an updated version of the first data, the storage device identifies the first read temperature(s) determined for the first data in the first block in the storage device, and writes the second data and a first read temperature indication of the at least one first read temperature to a second block in the storage device.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: March 5, 2024
    Assignee: Dell Products L.P.
    Inventors: Ali Aiouaz, Walter A. O'Brien, III, Leland W. Thompson
  • Patent number: 11921641
    Abstract: A Zoned Namespace data storage device configured to perform logical-to-physical (L2P) address translation using a compacted L2P having an erase-block granularity. For a host logical address, the compacted L2P table only has the physical address of the corresponding erase block, which provides a first part of the pertinent physical address. A controller of the data storage device calculates a second part of the pertinent physical address based on the superblock layout employed in the device and further based on the sequential write requirement to the superblocks. The controller then obtains the full physical address corresponding to the host logical address by combining the first and second parts. The erase-block granularity of the compacted L2P table enables the full L2P table of the device to have a relatively small size, which can beneficially be used to make more space available in the same amount of RAM for other operations.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: March 5, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Avinash Muthya Narahari, Rajthilak Dasarathan
  • Patent number: 11922019
    Abstract: A storage device read-disturb-based block read temperature utilization system includes a storage device chassis housing a storage subsystem. A local read temperature utilization subsystem in the storage device chassis determines that data in a first block in the storage subsystem should be moved and, in response determines read disturb information for the first block and uses it to identify relative read temperatures for a plurality of rows in the first block in the storage subsystem. The local read temperature utilization system then moves the data from the first block in the storage subsystem to at least one second block in the storage subsystem based on the relative read temperatures identified for the plurality of rows in the first block in the storage subsystem.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: March 5, 2024
    Assignee: Dell Products L.P.
    Inventors: Ali Aiouaz, Walter A. O'Brien, III, Leland W. Thompson
  • Patent number: 11921664
    Abstract: A storage device includes NVM package and a controller connected to the NVM package through a channel and controlling operation of the NVM package. The NVM package includes an interface chip, first NVM devices connected to the interface chip through a first internal channel and second NVM devices connected to the interface chip through a second internal channel. The interface chip selects the first internal channel in response to an operation request received from the controller and connects the first internal channel to the channel. The interface chip also determines whether retraining is necessary in relation to the second internal channel and transmits a retraining request to the controller when retraining is necessary.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: March 5, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tongsung Kim, Jangwoo Lee, Seonkyoo Lee, Chiweon Yoon, Jeongdon Ihm
  • Patent number: 11907550
    Abstract: A method for dynamically assigning memory bandwidth to multiple processor units, which are connected via a data connection to a shared memory unit. In an initialization phase, each of the multiple processor units are assigned an initial value of a usable memory bandwidth, and a permissible range for a mean usage of the memory bandwidth is determined. Subsequently, the assigned memory bandwidths are checked repeatedly and adjusted if needed, a present value of a mean usage of the memory bandwidth by the multiple processor units being determined, and, if this present value is outside the permissible range, the values of the usable memory bandwidth are adjusted for at least a part of the multiple processor units.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: February 20, 2024
    Assignee: ROBERT BOSCH GMBH
    Inventors: Ahsan Saeed, Dakshina Narahari Dasari, Falk Rehm, Michael Pressler
  • Patent number: 11907533
    Abstract: An archiving apparatus that realizes high-speed seek processes and the like by setting a logical object table for each container file with a predetermined size, and closing the container file under a predetermined condition is provided. A data processing section that executes control of access to a recording medium generates a logical object table for managing a container file including logical objects which are recorded data units, and records the logical object table on a memory. In a case where a prescribed condition is satisfied, for example, the container file size has become equal to or larger than a prescribed end reference value, and so on, while a process on the container file is being executed, the logical object table is read out from the memory, and recorded on the recording medium, and the container file is closed.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: February 20, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Hisao Tanaka, Tomotaka Kuraoka
  • Patent number: 11907532
    Abstract: An initial drive cluster of G drives with G subdivisions is represented by a G*G drive matrix, where G equals the number of data and parity members in the RAID level implemented on the drive cluster. A corresponding G×G overlay matrix is created in which a value at row R, column C equals a remainder of (R+C?2) divided by G, such that there are G distinct values in a range of 0 to G?1. Responsive to addition of N new drives to the drive cluster, the N new drives are added to the drive matrix and the overlay matrix is used to select and relocate RAID members within the drive matrix so that new RAID groups can be created.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: February 20, 2024
    Assignee: Dell Products L.P.
    Inventor: Kuolin Hua
  • Patent number: 11899970
    Abstract: A memory device includes; a first memory of first type, a second memory of second type different from the first type, and a memory controller. The memory controller receives an access request and workload information related to work of an external processor, processes the access request using the workload information, and accesses at least one of the first memory and the second memory in response to the access request.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: February 13, 2024
    Inventors: Wonseb Jeong, Hee Hyun Nam, Younggeon Yoo, Jeongho Lee, Younho Jeon, Ipoom Jeong, Chanho Yoon
  • Patent number: 11899587
    Abstract: Systems and methods for object-based data storage are provided. There may be a read/write cache configured to cache objects to be written to an object-based data storage. A document in the read/write cache may have a lock state set to unlocked, thereby allowing the document to be deleted. Or, the document in the read/write cache may have a lock state set to locked, thereby preventing deletion of the document.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: February 13, 2024
    Assignee: RELATIVITY ODA LLC
    Inventors: Jeffrey Hibser, Mohammad Amer Ghazal, Steven Engelhardt, Michael R. Gayeski, Brandon Michelsen, Ankit Khandelwal, Ranga Sankar, Robert A. Skinner
  • Patent number: 11880594
    Abstract: Disclosed are systems and methods for proactively, instead of reactively, biasing parameters of a data storage device based on a spatial position in a storage enclosure. The method includes obtaining a spatial position for the data storage device in a storage enclosure. The method also includes proactively biasing one or more parameters for controlling the device memory, based on the spatial position. The spatial position has a corresponding thermal profile that is predetermined.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: January 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ramanathan Muthiah, Sridhar Sabesan, Dinesh Babu, Pavan Gururaj