Abstract: In one set of embodiments, a hardware module of a computer system can receive a stream of addresses corresponding to memory units being accessed by a central processing unit (CPU) of the computer system. The hardware module can further generate a frequency estimate for each address in the stream of addresses, the frequency estimate being indicative of a number of times a memory unit identified by the address has been accessed by the CPU, and can determine, based on the generated frequency estimates, a set of n most frequently accessed memory units.

Abstract: According to one embodiment, a memory system includes a non-volatile memory and a controller. The controller manages validity of data in the non-volatile memory using a data map. The data map includes first fragment tables. Each of the first fragment tables stores first and second information. The first information indicates the validity of each data having a predetermined size written in a range of physical address in the non-volatile memory allocated to the first fragment table. The second information indicates the validity of a plurality of data having a predetermined size in each of entries. The controller selects a write destination block based on a size of write data to be written to the non-volatile memory by a write command from a host.

Abstract: A storage system includes two or more data storage devices and a controller coupled to the two or more data storage devices. Each data storage device of the two or more data storage devices includes zoned namespace (ZNS) architecture. The controller is configured to collect thermal statistics for each data storage device of the two or more data storage devices, analyze the collected thermal statistics, and designate a zone by selecting one or more dies within at least one data storage device of the two or more data storage devices based on the analyzed collected thermal statistics. The data storage device includes a memory device having a plurality of dies and a controller coupled to the memory device. The controller is configured to collect thermal statistics for each die of the plurality of dies, analyze the collected statistics, and allocate one or more dies to form a zone.

Abstract: The present disclosure includes apparatuses and methods related to a memory system including a filter. An example apparatus can include a filter to store a number flags, wherein each of the number of flags corresponds to a cache entry and each of the number of flags identifies a portion of the memory device where data of a corresponding cache entry is stored in the memory device.

Abstract: A memory system includes a non-volatile memory in which data is stored in a plurality of pages including a first page and a second page and a memory controller. The controller is configured to perform a first write operation on the first page at a first time, perform a second write operation on the second page at a second time after the first time, perform a first read operation on the first page at a time after the first time using a first parameter and store a first index value in association with the first page and the first parameter, and determine a second parameter for a second read operation to be performed on the second page using a time difference between the first time and the second time and the first index value stored in association with the first page.

Abstract: A computer implemented method includes obtaining positional information corresponding to end of data (EOD) on a tape and a data extent stored in the tape, wherein the positional information includes longitudinal position (LPOS), latitudinal position (wrap), and number of data blocks, comparing a block number of at least one of a currently read or located data with the positional information of the data extent to identify a current position of a tape head, identifying a positional relationship between a location of data to be read, the positional information of the EOD on the tape, and the current position of the tape head, identifying a directional relationship between a current direction of the tape head locating to data to be read and a pending write direction, and determining an appendable range for data after the EOD on the tape based on the identified positional relationship and the identified directional relationship.

Abstract: A data storage system and method comprising: at least two servers that comprise a storage volume and configured to run an operating system designated to host data accessible and exposable over a data plane (DP) network, at least one orchestrator configured to interact with each of said servers and designated to control a control plane (CP) of said DP network, wherein the at least two storage volumes create a distributed storage stack, wherein each server is configured to manage and enforce local QoS DP originated from its own volume, and wherein the orchestrator is configured to centrally orchestrate and enforce QoS CP limitations within the distributed storage stack.

Abstract: A system includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for providing customer data access during a migration process. The system may initiate a transfer of customer data from a source data server to a system platform and transfer a subset of the customer data to a temporary data storage. The system may modify the temporary copy of customer data and generate an instruction to modify the permanent copy of customer data. In response to the completion of the transfer of customer data from the source data server to the system mainframe, the system may then transfer and execute the instruction to modify the permanent copy of customer data.

Abstract: An encoding control method, a memory storage device and a memory control circuit unit are disclosed. The method includes: performing, by an encoding circuit, a first encoding operation to generate first parity data according to write data, a first sub-matrix and a second sub-matrix of a parity check matrix; performing, by the encoding circuit, a second encoding operation to generate second parity data according to the write data, the first parity data, a third sub-matrix, a fourth sub-matrix and a fifth sub-matrix of the parity check matrix; and sending a first write command sequence to instruct a storing of the write data, the first parity data and the second parity data to a rewritable non-volatile memory module.

Abstract: A nonvolatile memory device comprising: a first block comprising multiple single level cells (SLCs), a second block comprising multiple multi-level cells (MLCs), and an operation controller is suitable to perform, in response to a read command applied from an outside: a read operation using an SLC method on first data stored in the first block or a read operation using an MLC method on second data stored in the second block in a normal mode, and a read operation using the MLC method on the first data or a read operation using the SLC method on the second data in a protection mode.

Abstract: A method of operating a storage system is disclosed. The method includes determining a storage cluster among storage arrays of the storage system. Each storage array includes at least two controllers and at least one storage shelf. The at least two controllers are configured to function as both a primary controller for a first storage array and a secondary controller for a second storage array.

Abstract: A processing device, operatively coupled with one or more memory devices, is configured to provide a plurality of virtual memory controllers, partition one or more memory devices into a plurality of physical partitions, and associate each of the plurality of virtual memory controllers with one of the plurality of physical partitions. The processing device further provides a plurality of physical functions, wherein each of the plurality of physical functions corresponds to a different one of the plurality of virtual memory controllers, and presents the plurality of physical functions to a host computing system over a peripheral component interconnect express (PCIe) interface.

Abstract: To set an appropriate buffer area in a storage system that performs hierarchical storage management. The storage system includes a storage device that provides a storage pool and a storage management unit that manages the storage pool in a tiered manner. The storage pool is provided with a first tier, a second tier, a third tier, and a third tier buffer which is a buffer area used as a buffer when reading or writing data from or to the third tier which is a buffer target tier. The storage management unit determines a size of the third tier buffer based on an access frequency of the third tier.

Abstract: A storage system memory or memory domain with N memory controllers is organized into N-1 same-size partitions per memory controller or N partitions per memory controller with one partition reserved as spare capacity. The unreserved partitions are assigned to mirror pairs of members such that a first triangular submatrix of a representative matrix of indexed memory controllers and indexed partitions is a transpose of a second triangular submatrix of the representative matrix. The resulting distribution of members is balanced such that additional loading on remaining memory controllers when one of the memory controllers becomes inaccessible is evenly distributed.

Abstract: Techniques are described in which a system having multiple processing units processes a series of work units in a processing pipeline, where some or all of the work units access or manipulate data stored in non-coherent memory. In one example, this disclosure describes a method that includes identifying, prior to completing processing of a first work unit with a processing unit of a processor having multiple processing units, a second work unit that is expected to be processed by the processing unit after the first work unit. The method also includes processing the first work unit, and prefetching, from non-coherent memory, data associated with the second work unit into a second cache segment of the buffer cache, wherein prefetching the data associated with the second work unit occurs concurrently with at least a portion of the processing of the first work unit by the processing unit.

Abstract: Efficient writing to lower-performance storage tiers of a multi-tier storage system evaluates user intention when determining a write process that ultimately writes target data to a priority storage tier according to the user intention. Temporary high-performance storage tiers serve as coordinator tiers to achieve the efficient writing process for writing substantial or massive datasets to local storage.

Abstract: Provided are a storage system including a host and a storage device, and an operation method of the storage system. The storage device includes a memory controller and a memory device, where an operation method of the memory controller includes receiving from the host a first mode change request for a folder, which is a unit for managing at least one file, and a logical address of the at least one file, and in response to the first mode change request, rewriting to the memory device first data corresponding to the logical address in a second operating mode, and invalidating first data which is existing data already written to correspond to the logical address and the first data in a first operating mode, wherein the first mode change request sets a data operation speed to a high-speed mode for the at least one file included in the folder.

Abstract: A networking device/storage device direct write system includes a chassis that houses a Solid State Drive (SSD) storage device coupled to a Smart Network Interface Controller (SmartNIC) networking device. The SmartNIC networking device receives data via a network, stores the data in a SmartNIC buffer memory subsystem that is included in the SmartNIC networking device, and then perform a Direct Memory Access (DMA) operation to transfer the data stored in the SmartNIC buffer memory subsystem to an addressable memory subsystem that is included in the SSD storage device. If the addressable memory subsystem in the SSD storage device is a volatile memory subsystem, the SmartNIC networking device then transmits a persistent storage instruction to the SSD storage device that causes the SSD storage device to transfer the data stored in the addressable memory subsystem to a persistent memory subsystem in the SSD storage device.

Abstract: A system comprises a plurality of computing devices that are communicatively coupled via a network and have a file system distributed among them, and comprises one or more file system request buffers residing on one or more of the plurality of computing devices. File system choking management circuitry that resides on one or more of the plurality of computing devices is operable to separately control: a first rate at which a first type of file system requests (e.g., one of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers, and a second rate at which a second type of file system requests (e.g., another of data requests, data read requests, data write requests, metadata requests, metadata read requests, and metadata write requests) are fetched from the one or more buffers.

Abstract: Systems and methods for creating virtual machine snapshots. An example method comprises: receiving a request to create a snapshot of a virtual machine running on a host computer system; protecting from modification a plurality of virtual memory pages of the virtual machine; responsive to detecting an attempt to modify a virtual memory page of the plurality of memory pages, copying the virtual memory page to a queue residing in a random access memory (RAM) of the host computer system; making the virtual memory page writable; retrieving the virtual memory page from the queue; writing the virtual memory page to a disk of the host computer system; and responsive to exhausting the queue, completing creation of the snapshot of the virtual machine.