Patents Examined by Kiesha Bryant
  • Patent number: 8247325
    Abstract: Metal nanoplates are grown on n-type and p-type semiconductor wafer substrates through galvanic reactions between substantially pure aqueous metal solutions and the substrates. The morphology of the resulting metal nanoplates that protrude from the substrate can be tuned by controlling the concentration of the metal solution and the reaction time of the solution with the semiconductor wafer. Nanoplate size gradually increases with prolonged growth time and the nanoplate thicknesses increases in a unique stepwise fashion due to polymerization and fusion of adjacent nanoplates. Further, the roughness of the nanoplates can also be controlled. In a particular embodiment, Ag nanoplates are grown on a GaAs substrate through reaction with a solution of AgNO3 with the substrate.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: August 21, 2012
    Assignee: Uchicago Argonne, LLC
    Inventor: Yugang Sun
  • Patent number: 8247834
    Abstract: A light-emitting diode includes a substrate, a buffer layer on the substrate, a first semiconductor layer on the buffer layer, a light-emitting layer on the first semiconductor layer, a second semiconductor layer on the light-emitting layer, wherein the first semiconductor layer is partially exposed through the second semiconductor layer and the light-emitting layer, a first electrode on the exposed first semiconductor layer, and a second electrode on the second semiconductor layer, the second electrode having a grid shape.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: August 21, 2012
    Assignee: LG Display Co., Ltd.
    Inventors: Cheol Se Kim, Hoe Sup Soh
  • Patent number: 8246303
    Abstract: A system for actively controlling the span-wise rotational twist of a hollow beam along its longitudinal axis, including a hollow beam structure having a leading edge and a trailing edge region, the beam being split along its length, an actuator arranged between split surfaces of the beam, the actuator adapted to move the split surfaces in a longitudinal direction relative to each other, inducing a twist in the beam. In one embodiment, the actuator is a plurality of thermal expansion material blocks alternating with mechanical compression blocks, the thermal expansion material blocks being heated to cause expansion in the spanwise longitudinal direction. Other alternative actuators include a rotary actuators such as a threaded screw, piezoelectric or magnetostrictive blocks, a hydraulic actuator, or a pneumatic actuator. In an embodiment, the beam is an airfoil shape.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: August 21, 2012
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: James P Thomas, Michael J O'Brien, William R Pogue, III
  • Patent number: 8242493
    Abstract: An organic photosensitive optoelectronic device includes an anode, a cathode, and a donor-acceptor heterojunction between the anode and the cathode, the heterojunction including a donor-like material and an acceptor-like material, wherein at least one of the donor-like material and the acceptor-like material includes a subphthalocyanine, a subporphyrin, and/or a subporphyrazine compound, wherein the subporphyrin or subporphyrazine compound includes boron.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: August 14, 2012
    Assignees: The Trustees of Princeton University, The Regents of the University of Michigan, The University of Southern California
    Inventors: Barry Rand, Stephen R. Forrest, Kristin L. Mutolo, Elizabeth Mayo, Mark E. Thompson
  • Patent number: 8242025
    Abstract: According to a method of the present invention for manufacturing a semiconductor piece, at least two semiconductor layers (12) are first formed on a substrate (10) by stacking a sacrificial layer (11) and the semiconductor layer (12) on the substrate (10) in this order and repeating this stacking. Next, the semiconductor layers (12) are divided into pieces by etching part of the sacrificial layers (11) and part of the semiconductor layers (12). Then, the pieces are separated from the substrate by removing the sacrificial layers (11).
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: August 14, 2012
    Assignee: Panasonic Corporation
    Inventors: Takahiro Kawashima, Tohru Saitoh, Tohru Nakagawa, Hideo Torii
  • Patent number: 8242489
    Abstract: The invention provides an OLED device comprising an anode, a cathode and a light-emitting layer located therebetween, said light-emitting layer comprising an anthracene host and a styrylamine blue light-emitting compound; and, located between the said light-emitting layer and the cathode, a first electron-transporting layer that is greater than 0.5 nm and less than 5 nm thick; and a second electron-transporting layer consisting essentially of an anthracene located between the first electron-transporting layer and the cathode. The first electron-transporting layer includes a compound with a less negative LUMO level than the anthracene in the second electron-transporting layer. Devices of the invention provide improvement in features such as efficiency.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: August 14, 2012
    Assignee: Global OLED Technology, LLC.
    Inventors: Marina E. Kondakova, Ralph H. Young
  • Patent number: 8242512
    Abstract: A compound semiconductor device includes: an electron transit layer made of GaN; a channel layer made of AlGaN; a source electrode, a gate electrode and a drain electrode that are provided on the channel layer; a cap layer that is provided at least between the source electrode and the gate electrode and between the gate electrode and the drain electrode and is made of GaN; a recess portion that is provided in the cap layer between the gate electrode and the drain electrode; and a thick portion that is provided in the cap layer between the recess portion and the drain electrode and has a thickness larger than the recess portion.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: August 14, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Fumikazu Yamaki, Kazutaka Inoue
  • Patent number: 8236600
    Abstract: A method of manufacturing a solar cell by providing a first semiconductor substrate and depositing a first sequence of layers of semiconductor material to form a first solar subcell, including a first bond layer disposed on the top of the first sequence of layers. A second semiconductor substrate is provided, and on the top surface of the second substrate a second sequence of layers of semiconductor material is deposited forming at least a second solar subcell. A second bond layer is disposed on the top of said second sequence of layers. The first solar subcell is mounted on top of the second solar subcell by joining the first bond layer to the second bond layer in an ultra high vacuum chamber, and the first semiconductor substrate is removed.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: August 7, 2012
    Assignee: Emcore Solar Power, Inc.
    Inventor: Arthur Cornfeld
  • Patent number: 8238583
    Abstract: The invention provides a method for analog-to-digital conversion in a microphone circuit. First, a first gain is determined. A first analog signal is then amplified according to the first gain to obtain a second analog signal. The second analog signal is then converted from analog to digital to obtain a first digital signal. A second gain is then determined according to the first gain so that a product of the first gain and the second gain is kept constant. The first digital signal is then amplified according to the second gain to obtain a second digital signal.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: August 7, 2012
    Assignee: Fortemedia, Inc.
    Inventor: Li-Te Wu
  • Patent number: 8237160
    Abstract: A semiconductor chip includes a corner stress relief (CSR) region. An enhanced structure connects sides of a seal ring structure to surround the CSR region. A device under test (DUT) structure is disposed on the CSR region. A set of probe pad structures is disposed on the CSR region. Two of the set of probe pad structures are electrically connect to the DUT structure.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: August 7, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Chung-Ying Yang, Ying-Ju Chen, Shih-Wei Liang, Ching-Jung Yang
  • Patent number: 8236613
    Abstract: A method for wafer level chip scale package comprises providing a wafer with semiconductor chips formed thereon, forming a groove alongside each chip, providing a wafer size clip array with a plurality of clip contact areas each extending to a down set connecting bar, connecting the plurality of clip contact areas to a plurality of the electrodes disposed on a top surface of the chips with down set connecting bars disposed inside the grooves, encapsulating top of wafer in molding compound, thinning the bottom portion of the wafer and dicing the thin wafer into single chip packages. The chip has source and gate electrodes on a top surface connected to a first and second clip contact areas extending to a first a second down set connecting bars respectively, with the bottom surfaces of the down set connecting bars substantially coplanar to a drain electrode located at the chip bottom surface.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 7, 2012
    Assignee: Alpha & Omega Semiconductor Inc.
    Inventor: Yuping Gong
  • Patent number: 8236618
    Abstract: A method of making a semiconductor chip assembly includes providing first and second posts, first and second adhesives and a base, wherein the first post extends from the base in a first vertical direction into a first opening in the first adhesive, the second post extends from the base in a second vertical direction into a second opening in the second adhesive and the base is sandwiched between and extends laterally from the posts, then flowing the first adhesive in the first vertical direction and the second adhesive in the second vertical direction, solidifying the adhesives, then providing a conductive trace that includes a pad and a terminal, wherein the pad extends beyond the base in the first vertical direction and the terminal extends beyond the base in the second vertical direction, providing a heat spreader that includes the posts and the base, then mounting a semiconductor device on the first post, electrically connecting the semiconductor device to the conductive trace and thermally connecting the
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: August 7, 2012
    Assignee: Bridge Semiconductor Corporation
    Inventors: Charles W. C. Lin, Chia-Chung Wang
  • Patent number: 8236610
    Abstract: Systems and methods are disclosed that enable forming semiconductor chip connections. In one embodiment, the semiconductor chip includes a body having a polyhedron shape with a pair of opposing sides; and a solder member extending along a side that extends between the pair of opposing sides of the polyhedron shape.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: August 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Louis Lu-Chen Hsu, Kangguo Cheng, Timothy J. Dalton, Mukta G. Farooq, John A. Fitzsimmons
  • Patent number: 8231726
    Abstract: An object of the present invention is to obtain, with respect to a semiconductor light-emitting element using a group III nitride semiconductor substrate, a semiconductor light-emitting element having an excellent light extraction property by selecting a specific substrate dopant and controlling the concentration thereof. The semiconductor light-emitting element comprises a substrate composed of a group III nitride semiconductor comprising germanium (Ge) as a dopant, an n-type semiconductor layer composed of a group III nitride semiconductor formed on the substrate, an active layer composed of a group III nitride semiconductor formed on the n-type semiconductor layer, and a p-type semiconductor layer composed of a group III nitride semiconductor formed on the active layer in which the substrate has a germanium (Ge) concentration of 2×1017 to 2×1019 cm?3.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: July 31, 2012
    Assignee: Panasonic Corporation
    Inventors: Hisashi Minemoto, Yasuo Kitaoka, Yasutoshi Kawaguchi, Yasuhito Takahashi, Yoshiaki Hasegawa
  • Patent number: 8226349
    Abstract: A method of using a delta shaped blade as an aircraft propeller, helicopter or autogiro rotor, or wind turbine propeller is presented. The invention combines the delta blade system with the use of torsion bars to achieve desirable control of blade twist. The invention uses blade twist to control the air loading on the craft; hence better control of maneuvering is achieved. The invention also optionally includes adjustable blade roots such that the sweep and aspect ratio of the delta blade is controllably variable. Compared to traditional propeller blade configurations, the invention boasts improved performance and enhanced aeroelastic properties. The invention is a far more efficient system providing economic advantages, higher speeds, and more durable designs.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: July 24, 2012
    Inventor: Marty A. Ferman
  • Patent number: 8227792
    Abstract: Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the SiGe layer into islands changes the local forces acting at each of the island edges in such a way so that the relaxation force is greater than the forces that oppose relaxation. The absence of restoring forces at the edges of the patterned layers allows the final SiGe film to relax further than it would if the film was continuous.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Stephen W. Bedell, Robert H. Dennard, Anthony G. Domenicucci, Keith E. Fogel, Devendra K. Sadana
  • Patent number: 8229132
    Abstract: A microphone apparatus is obtained capable of preventing howling effectively, while having no time difference between a timing of voice utterance to a microphone and a timing of sound emission from a speaker and having simple and low-cost physical and electrical configurations. There are provided microphone units or microphones disposed at locations with the same acoustic conditions, and switching units disposed corresponding to the microphone units or microphones, respectively, for switching sequentially an audio signal transformed in each of the microphone units or microphones to generate an output signal. The switching units may switch sequentially the audio signal transformed in the microphone unit or microphone at an shorter time interval than a time period from a time point the microphone unit or microphone is turned on to a time point an output thereof grows to reach a maximum level by howling.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Audio-Technica
    Inventor: Hiroshi Akino
  • Patent number: 8227812
    Abstract: Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp2 bonded carbon contents. In some cases, the sp2 bonded carbon content may be sufficient to provide the conductive diamond-like carbon material with a visible light transmissivity of greater than about 0.70. A charge carrier separation layer can be coupled adjacent and between the diamond-like carbon cathode and an anode. The conductive diamond-like carbon material of the present invention can be useful for any other application which can benefit from the use of conductive and transparent electrodes which are also chemically inert, radiation damage resistance, and are simple to manufacture.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: July 24, 2012
    Assignee: RiteDia Corporation
    Inventor: Chien-Min Sung
  • Patent number: 8227301
    Abstract: Semiconductor device structures including a semiconductor body that is partially depleted to define a floating charge-neutral region supplying a floating body for charge storage and methods for forming such semiconductor device structures. The width of the semiconductor body is modulated so that different sections of the body have different widths. When electrically biased, the floating charge-neutral region at least partially resides in the wider section of the semiconductor body.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: July 24, 2012
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Edward J. Nowak
  • Patent number: 8222633
    Abstract: The present invention relates to an organic transistor that includes an organic semiconductor layer containing a thiazolothiazole derivative and an insulating organic material having a band gap of 3 eV or more or no portion having four pairs or more of double bonds and single bonds continuously connected.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: July 17, 2012
    Assignee: LG Chem, Ltd.
    Inventors: Hyeon Choi, Jae-Min Lee, Roman Kiselev