Patents Examined by Kim Huynh
  • Patent number: 11467620
    Abstract: Embodiments disclosed herein describe systems and methods for tuning phases of interface clocks of ASICs in an emulation system for a low latency channel and to avoid read errors. During a bring-up time (e.g., powering up) of the emulation system, one or more training processors may execute a software application to iteratively tune the phases of the interface clocks such that data is written to the interface buffers prior to being read out. To mitigate the problem of higher latency, the training processors may execute software application to tune the clock phases such that there is a small time lag between the writes and reads. The training processors may set the time lag to account for factors such as memory setup and hold, clock skews, clock jitters, and the predicted margin required to account for future clock drift due to carrying operating conditions.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: October 11, 2022
    Assignee: Cadence Design Systems, Inc.
    Inventors: Yuhei Hayashi, Mitchell G. Poplack
  • Patent number: 11449122
    Abstract: A method of peak power management (PPM) is provided for two NAND memory dies. Each NAND memory die comprises a PPM circuit having a PPM contact pad held at an electric potential common between the two NAND memory dies. The method includes the following steps: detecting the electric potential during a first peak power check (PPC) routine for the first NAND memory die; driving the electric potential to a second voltage level if the detected electric potential is at a first voltage level higher than the second voltage level; generating a pausing signal in the electric potential to pause a second PPC routine for the second NAND memory die if no pausing signal is detected; and generating a resuming signal in the electric potential to resume the second PPC routine for the second NAND memory die after the first NAND memory die completes a first peak power operation.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: September 20, 2022
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventor: Qiang Tang
  • Patent number: 11449090
    Abstract: A plurality of messages can be received from a remote device, each of the messages including a respective sent time from the remote device. A receiver can store a respective receipt time of each of the messages. A computer clock can be adjusted based on a first difference between respective sent times and a second difference between respective receipt times.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: September 20, 2022
    Assignee: Ford Global Technologies, LLC
    Inventor: Linjun Zhang
  • Patent number: 11442522
    Abstract: There is provided a method of controlling performance boosting of a semiconductor device. According to the method, input of a user is monitored. A performance of the semiconductor device is boosted by consecutively executing a plurality of boosting policies associated with a plurality of macros based on an input event associated with the input of the user and available energy during a boosting interval. Boosting level in each of the boosting policies may be adaptively determined based on the boosting level and the amount of usage of the semiconductor device used in the previous boosting policy and the boosting policies are consecutively executed. Accordingly, improved and/or optimal performance boosting can be provided to the semiconductor device and at the same time, a waste of power can be mitigated and/or prevented.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: September 13, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangkyu Kim, Jonglae Park, Hyunju Kang, Jungwook Kim
  • Patent number: 11435802
    Abstract: A real-time workload scheduling heuristic assigns tasks to the cores such that the total load current consumption of the cores is always less than the total current capability of the under-provisioned on-chip voltage regulators. In addition, the energy-efficient scheduling of the tasks on to the cores ensures that the reconfiguration of the power delivery network is minimized. The heuristic includes DVFS management based on the unique constraints of the under provisioned voltage regulators.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: September 6, 2022
    Assignee: Drexel University
    Inventors: Ioannis Savidis, Divya Pathak, Houman Homayoun
  • Patent number: 11416265
    Abstract: A method of tuning performance of a data storage system includes calculating an estimate of parallel fraction and speedup characteristic for a data storage application executed by the data storage system. The estimate is calculated using linear regression of values (1/N, 1/XN) that are generated from trial runs of the data storage application processing a workload using respective different numbers N of CPU cores to obtain corresponding performance values XN. The method further includes configuring the data storage system to execute the data storage application using a number of CPU cores based on the estimate of parallel fraction and speedup characteristic.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 16, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Rasa Raghavan, Steven A. Morley
  • Patent number: 11385696
    Abstract: The electronic apparatus of the present invention includes: a power source control unit allocated to each of a plurality of external interfaces and configured to control supply or shutoff of a current for an external device and to output whether or not an overcurrent is detected as an overcurrent detection signal; a control unit configured to control supply or shutoff of a current; a logical product circuit that outputs a logical product of the overcurrent detection signals as an external interrupt signal; and an interface control unit configured to, in a case where the overcurrent detection signals is asserted, output external interface information specifying an external interface at which the overcurrent has occurred, and the control unit, in a case where the external interrupt signal is asserted, controls to the power source control unit at which the overcurrent has been detected so as to shut off supply of power.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: July 12, 2022
    Inventor: Yoshikazu Sato
  • Patent number: 11385708
    Abstract: A memory device includes a power supply device, a power-on-reset device, a memory array, and a memory controller. The power supply device converts the external supply voltage into an internal supply voltage. When the external supply voltage exceeds a first threshold, the power-on-reset device generates a reset signal. The power-on-reset device further raises the first threshold to a second threshold according to a deep-sleep signal. The memory array is supplied with the internal supply voltage. The memory controller is supplied with the internal supply voltage, accesses the memory array, and is reset according to the reset signal. When the memory controller operates in a deep-sleep mode, the memory controller generates the deep-sleep mode.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: July 12, 2022
    Inventors: Ju-An Chiang, Shih-Chieh Chiu
  • Patent number: 11379250
    Abstract: Applications can be selectively offloaded to ensure that thin clients will have sufficient disk space to install an update. To enable this offloading, a service can be employed to track how long each application is used on the thin client during a particular time period. Based on this usage of each application, the service can assign a rank to each application. The service can also monitor the amount of free space on the disk to determine whether it has fallen below a threshold. If so, the service can employ the ranks to identify applications to be offloaded them by copying an install location folder for each application to a remote repository and then deleting each copied install location folder. When the thin client includes a write filter, the service can commit the deletes of the install location folders so that the applications will remain offloaded after reboot.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: July 5, 2022
    Assignee: Dell Products L.P.
    Inventors: Shailesh Jain, Prashanth Devendrappa
  • Patent number: 11347292
    Abstract: A system on chip (SoC) adjusts power of a memory through a handshake. The SoC includes a memory controller and a power manager. The memory controller is configured to control a memory. The power manager is configured to manage a supply power level of the memory. The memory controller is configured to output, to the power manager, a memory access level indicating a frequency of accesses to the memory. The power manager is configured to adjust the supply power level of the memory according to the memory access level.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: May 31, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ook Song, Yun-Ju Kwon, Dong-Sik Cho, Byung-Tak Lee
  • Patent number: 11340885
    Abstract: A method for updating an operating system (OS) comprises: receiving, by an embedded universal integrated circuit card (eUICC), a restart instruction sent by a local profile assistant (LPA) of a terminal device and used to instruct the eUICC to perform a restart operation; sending, to a modem of the terminal device, a first initialization request used to request the modem to control restart of the eUICC; after being restarted, receiving, by the eUICC, a plurality of OS element data packets that are sequentially sent by the LPA; after receiving a part of OS element data packets in the plurality of OS element data packets, parsing, by the eUICC, the OS element data packets received by the eUICC, and installing a first OS based on a parsing result; and deleting, by the eUICC, the first OS element data packet.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: May 24, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yajun Zhang, Shuiping Long
  • Patent number: 11334144
    Abstract: According to one embodiment, a memory system includes a memory chip and a controller coupled to the memory chip and configured to: instruct the memory chip to execute a write operation in one of a first operation mode and a second operation mode, a program voltage used in the second operation mode being determined on the basis of first information obtained in the first operation mode; manage a power consumption value of the second operation mode on the basis of the first information; and perform power throttling control on the basis of the managed power consumption value.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: May 17, 2022
    Inventors: Yuusuke Nosaka, Kouji Watanabe, Tomonori Tsuhata, Shingo Akita
  • Patent number: 11327548
    Abstract: An information processing apparatus includes: an imaging unit having an image sensor to detect a plurality of pieces of pixel information, the imaging unit being configured to generate an image made up of the plurality of pieces of pixel information detected by the image sensor; an image processor to detect whether a user is present or not in a predetermined detection range, based on an image made up of a plurality of pieces of pixel information detected by the image sensor; and an operation control unit to, when the image processor detects the user in the predetermined range, cancel a standby state where a part of the system functions stops. In the standby state, the imaging unit increases at least one of resolution and a frame rate in a stepwise manner to detect the plurality of pieces of pixel information.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: May 10, 2022
    Inventors: Kazuhiro Kosugi, Hideki Kashiyama
  • Patent number: 11327546
    Abstract: A power control method for controlling power paths between a baseboard and a server board includes: conducting a first power path between the baseboard and a detecting module of the server board via an isolated module; the baseboard obtaining a type of server card of the server board before the server board is powered on; and cutting off the first power path and conducting a second power path between a power source module of the server board and the detecting module of the server board via the isolated module after the server board is powered on; wherein the baseboard provides a side-band signal to the server board.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: May 10, 2022
    Assignee: Wiwynn Corporation
    Inventors: Kuang-Tsu Wang, Kuo-Hua Tsai
  • Patent number: 11295018
    Abstract: A system and method for message analysis, including: receiving, by a control service, a first modification request to modify a file system of a computing device, wherein the computing device is operating in a read-only state; identifying, by the control service, a request parameter associated with the first modification request; determining, by the control service, that the request parameter satisfies a permission criteria to perform the first modification request; provisioning, by the control service, the computing device to operate in a read/write state in response to determining that the permission criteria has been satisfied, wherein the first modification request is executed to modify the file system while the computing device is operating in the read/write state; and, upon a determination that the first modification request has successfully completed, provisioning, by the control service, the computing device to operate in the read-only state.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: April 5, 2022
    Assignee: Twitter, Inc.
    Inventor: Matthew D. Klein
  • Patent number: 11262921
    Abstract: A method and an apparatus are provided for powering off a portion of a memory of a mobile system. The apparatus may store data within a memory of the apparatus. The apparatus may copy a first portion of the data stored in a first portion of the memory into a second portion of the memory so that the data is stored in the second portion of the memory. The first and the second portion of the memory may be the same memory type. The disclosure discusses various triggering events that may cause the apparatus to copy the first portion of the data stored in the first portion of the memory into the second portion of the memory. The apparatus may then turn off the first portion of the memory. In this manner, the memory consumes less power when storing the data during a low power mode.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: March 1, 2022
    Assignee: Qualcomm Incorporated
    Inventor: Mohammad Imran
  • Patent number: 11262825
    Abstract: A circuit for identifying a power supply may include a voltage divider to divide an identification voltage from the power supply. The output of the voltage divider is electrically coupled to an adapter identification pin of a controller to identify the power supply.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: March 1, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael R. Durham, Mark A. Piwonka
  • Patent number: 11256311
    Abstract: An apparatus and method are provided for partially discharging a power supply, the apparatus comprising a power supply adapted to supply power to processing circuitry to perform a processing operation and discharge circuitry adapted to partially discharge the power supply after the processing operation is complete.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: February 22, 2022
    Assignee: Arm Limited
    Inventor: Sanjay B. Patil
  • Patent number: 11209883
    Abstract: Some embodiments include a Power Over Ethernet (POE) monitor system powered by a POE signal. Some embodiments include a snap on POE module that is coupled to a monitor of the POE monitor system via a single connector without cabling. Some embodiments include creating and implementing a POE profile that specifies how power is utilized when the POE touchscreen system is powered by a POE-DC signal (e.g., reducing one or more of: a number of active USB ports, active audio devices, or touchscreen brightness to a %.) Some embodiments include detecting a power loss, and using one or more POE super capacitors to provide power for completion of critical functions that enable a graceful shut down. One or more of the POE super capacitors may be located in the snap on POE module, or in a main unit of the monitor.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: December 28, 2021
    Assignee: Elo Touch Solutions, Inc.
    Inventors: Asela Ekanayake, Mohammad Fareeduddin, Brian Perry, Jake Yang, Ranil Fernando
  • Patent number: 11188497
    Abstract: A reconfigurable data processor comprises a bus system, and an array of configurable units connected to the bus system, configurable units in the array including configuration data stores to store unit files comprising a plurality of sub-files of configuration data particular to the corresponding configurable units. Configurable units in the plurality of configurable units each include logic to execute a unit configuration load process, including receiving via the bus system, sub-files of a unit file particular to the configurable unit, and loading the received sub-files into the configuration store of the configurable unit. A configuration load controller connected to the bus system, including logic to execute an array configuration load process, including distributing a configuration file comprising unit files for a plurality of the configurable units in the array.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: November 30, 2021
    Assignee: SambaNova Systems, Inc.
    Inventors: Manish K. Shah, Ram Sivaramakrishnan, Mark Luttrell, David Brian Jackson, Raghu Prabhakar, Sumti Jairath, Gregory Frederick Grohoski, Pramod Nataraja