Patents Examined by Kris Rhu
  • Patent number: 8478966
    Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
  • Patent number: 8473643
    Abstract: An aspect of the invention is a storage networking system comprising subsystems coupled with a network. The subsystems include an initiator subsystem having an initiator I/O (input/output) control unit, and a plurality of target subsystems each having a target I/O control unit. The initiator subsystem is configured to: place priority information in packet address of an I/O command packet, the priority information being based on a priority table; send the I/O command packet to one or more of the plurality of target I/O control units; and receive a return I/O packet from each of the target I/O control units that received the sent I/O command packet, the return I/O packet having the same priority information. The priority information provided in the priority table is priority of storing I/O data. The I/O data is transferred according to the priority information placed in the packet address of the I/O command packet.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: June 25, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Toshio Otani
  • Patent number: 8463954
    Abstract: Data is processed in an embedded system by writing data read from a peripheral device in response to an event to memory external to the embedded system. The data or a portion of the data is copied to memory internal to the embedded system. Which portion of the data is stored in both the external memory and the internal memory is tracked. The copied data is retrieved from the internal memory by a processor included in the embedded system. The processor has one or more caches logically and physically separated from the internal memory. The processor uses the copied data it retrieved to begin servicing the event.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: June 11, 2013
    Assignee: Lantiq Deutschland GmbH
    Inventor: Chunfeng Hu
  • Patent number: 8464243
    Abstract: During execution of an existing scheduling computer program on a client node, an update computer program and a self-describing automatic installation package are downloaded to the client node from a logical depot node implemented on an existing management server. Therefore, advantageously, no physical depot node or other additional computing device is needed for the client node to update itself. Execution of the update computer program is spawned on the client node from the existing scheduling computer program. As such, the update computer program inherits root access to the client node and security credentials to the management server from the scheduling computer program—advantageously, then, a user does not have to perform any laborious configuration of the client node in order to update the node. The client node ultimately updates itself using the self-describing automatic installation package, which includes all the information needed for the client node to update itself.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: June 11, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jean X. Yu, James J. Myers, Gergana V. Markova, Thu Nguyen, David M. Cannon, Kenneth E. Hannigan, James P. Smith, Colin S. Dawson
  • Patent number: 8463962
    Abstract: According to an example embodiment of the present invention, a method is implemented for transmitting data between a Media Access Control Layer (MAC) (100) and a Physical Layer (PHY) (150) using an internal data bus for transmitting a set of internal symbols between the MAC (100) and PHY (150). A subset of internal symbols does not have a corresponding PHY symbol. An external data bus carries data symbols. An external interface (102, 118) provides command information on one or more dedicated command lines and provides the data symbols. An encoder (108, 110) encodes the provided command information into one or more of the subset of internal symbols. An internal interface (106, 107, 109, 111) transmits the one or more of the subset of internal symbols and the data symbols between the MAC (100) and PHY (150) using the internal data bus.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: June 11, 2013
    Assignee: NXP B.V.
    Inventor: Sharad Murari
  • Patent number: 8458377
    Abstract: Disclosed is a method and device for concurrently performing a plurality of data manipulation operations on data being transferred via a Direct Memory Access (DMA) channel managed by a DMA controller/engine. A Control Data Block (CDB) that controls where the data is retrieved from, delivered to, and how the plurality of data manipulation operations are performed may be fetched by the DMA controller. A CDB processor operating within the DMA controller may read the CDB and set up the data reads, data manipulation operations, and data writes in accord with the contents of the CDB. Data may be provided from one or more sources and data/modified data may be delivered to one or more destinations. While data is being channeled through the DMA controller, the DMA controller may concurrently perform a plurality of data manipulation operations on the data, such as, but not limited to: hashing, HMAC, fill pattern, LFSR, EEDP check, EEDP generation, XOR, encryption, and decryption.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: June 4, 2013
    Assignee: LSI Corporation
    Inventors: Gary Piccirillo, David M. Olson
  • Patent number: 8448149
    Abstract: A method for converting traditional ladder diagrams for programmable controllers according to model 984, for example, the traditional ladder diagrams being read and executed column by column, into ladder diagrams for IEC 61131-oriented controllers, for example, with the ladder diagrams being read and executed in a data flow-oriented manner. In order to carry out the method, it is determined, in the ladder diagrams that are traditionally read and executed column by column, whether variables are provided on coils as well as on contacts within the network, and it is determined whether the contact is processed according to model 984 in front of the associated coil and according to the IEC model behind the associated coil. If so, an additional variable is generated for each such variable, and the additional variable is fed to the respective contact instead of the original variable.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: May 21, 2013
    Assignee: Schneider Electric Automation GmbH
    Inventor: Andreas Schmidt
  • Patent number: 8429308
    Abstract: According to one embodiment of the present disclosure, a method for migrating data from a storage device includes accessing data on a storage device. The method also includes providing at least one interface that allows for selecting a first operating system stored on the storage device. The interface further allows for selecting one or more settings stored on the storage device. The method further includes initiating a migration of the one or more settings from the storage device. The method further includes storing the one or more settings.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: April 23, 2013
    Assignee: CA, Inc.
    Inventors: Shivesh Kumar Pappu, Santosh Kumar Gupta, Laural S. Gentry, Nishant S. Thorat, Arvind Raghavendran
  • Patent number: 8417859
    Abstract: Methods and systems to implement and operate software-defined radios (SDRs). An SDR may be configured to perform a combination of fractional and integer frequency synthesis and direct digital synthesis under control of a digital signal processor, which may provide a set of relatively agile, flexible, low-noise, and low spurious, timing and frequency conversion signals, and which may be used to maintain a transmit path coherent with a receive path. Frequency synthesis may include dithering to provide additional precision. The SDR may include task-specific software-configurable systems to perform tasks in accordance with software-defined parameters or personalities. The SDR may include a hardware interface system to control hardware components, and a host interface system to provide an interface to the SDR with respect to a host system. The SDR may be configured for one or more of communications, navigation, radio science, and sensors.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: April 9, 2013
    Assignee: The Johns Hopkins University
    Inventors: Christopher B. Haskins, Wesley P. Millard
  • Patent number: 8417858
    Abstract: Embodiments of the present invention provide for an IOC that does not limit each CPU to a particular port. Instead, the IOC may allow each CPU to communicate with all ports. Thus, the IOC can process CPU communications to determine which port to send them to, and send them to the correct port as well as process incoming communications from the ports to determine which CPU to send them to and send these communications to the correct CPU. This may significantly increase the flexibility and efficiency of a storage network.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: April 9, 2013
    Assignee: Emulex Design & Manufacturing Corporation
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Narayan Rao Ayalasomayajula, Larry Lomelino
  • Patent number: 8417837
    Abstract: A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jane H. Bartik, Lisa C. Heller, Damian L. Osisek, Donald W. Schmidt, Patrick M. West, Jr., Phil C. Yeh
  • Patent number: 8417836
    Abstract: A serial peripheral interface (SPI) controller can be configured in response to data received via the interface. The SPI controller can perform read and write operations upon registers of a register bank in response to signals received via one or more of a data signal line, a clock signal line, and a select signal line. By detecting combinations of signals on one or more of the data signal line, clock signal line and select signal line, the SPI controller can detect the initiation of data read and write operations that may be in accordance with any of several different SPI protocols.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: April 9, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventor: Thomas Obkircher
  • Patent number: 8417856
    Abstract: A high speed sensor data transfer interface is described. The interface combines a bridge circuit, carrier voltage source, first order RC high pass filter, reference power supply, Bessel filter, and high-speed analog to digital converter on a single Smart Transducer Interface Module board (STIM) to receive data from sensors. Data from the STIM is transferred to a Network Capable Application Processor (NCAP) having a microprocessor and either a Field Programmable Gate Array or a Complex Programmable Logic Device. The NCAP transfers data to a data exchange network.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: April 9, 2013
    Assignee: Streamline Automation, LLC
    Inventors: Alton Reich, Stephen Doherty, James E. Shaw, III
  • Patent number: 8407378
    Abstract: Several methods and a system to implement data compression inline with an eight byte data path are disclosed. In one embodiment, a method includes acquiring a data from a host. In addition, the method includes applying an eight byte data path to the data. The method also includes compressing the data inline. The method may further include writing the data in a memory through a memory controller using a RAID engine. The method may also include manipulating the data through the RAID engine. In addition, the method may include reading the data through a Serial Attached SCSI (SAS) core. The method may further include writing the data to a non-volatile storage. The method may include applying a compression technique based on a data history. The method may also include maintaining a consistent order of a sequence of the data during a data compression operation and a decompression operation.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: March 26, 2013
    Assignee: LSI Corporation
    Inventor: Rajendra Sadanand Marulkar
  • Patent number: 8397229
    Abstract: This invention generally relates to a methods and system in the field of independent programs operating within an operating system such as Linux and more particularly to computer software embodied in a computer readable medium including: an independent program for running autonomously in a native mode within an associated computer processor; an operating system program for running autonomously within an associated computer processor; a mode switcher process for switching operation from the independent program to the operating system program whereby the independent program functions as an embedded entity of the operating system; and wherein the mode switcher program switches the independent program from the operating system program whereby the independent program runs autonomously in the native mode.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: March 12, 2013
    Assignee: Netspectrum Inc.
    Inventors: Jun Sun, Steve Koert Longerbeam
  • Patent number: 8396999
    Abstract: A system having input/output hot spot tracking is disclosed. The storage system includes a storage device, a host controller coupled to the storage device, and a tracking engine coupled to the host controller and the storage device. The host controller is configured to managed input/output of the storage device. The tracking engine includes a storage map cycling between active status and passive status. Input/output commands are stored in the storage map during the active status. Like input/output commands in the storage map during active status are counted and compared to a number. Counts greater than the number are reported as input/output hot spots.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: March 12, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nhan Q. Vo, Benjamin T. Allen, Chiung-Sheng Wu, Stephen M. Schultz, Jay E. Allison, Jr., Mark L. Oelke
  • Patent number: 8386672
    Abstract: An information handling system (IHS) provides a method for managing power consumption. The method includes detecting a power-on in the IHS, wherein the IHS comprises a first graphics processing unit (GPU) and at least one additional GPU. The method also includes determining if a normal boot is implemented in the IHS and determining if an instant-on boot occurred if the normal boot is implemented. The at least one additional GPU is disabled if an instant-on boot occurred.
    Type: Grant
    Filed: July 8, 2008
    Date of Patent: February 26, 2013
    Assignee: Dell Products L.P.
    Inventors: En-Lin Allen Tsuei, Matthew Page, Orlando Rigueira, Nathan Vecera
  • Patent number: 8386674
    Abstract: An electronic system includes a signal processor, a control signal generator, and an I/O interface. The signal processor has a first output signal and the first output signal is characterized by at least a first property and a second property. The control signal generator is configured to produce first and second control signals in accordance with the first and second properties of the first output signal, respectively. The I/O interface is configured to couple at least the first and second control signals to an output device. In some embodiments, the first output signal is a pulse width modulated signal having a software-specified pulse width and a software-specified repeat frequency. In some embodiments, the first property of the first output signal is the signal's duty cycle and the second property is the signal's frequency.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: February 26, 2013
    Assignee: CSR Technology Inc.
    Inventors: Gaile Lin, Hong Guan, Chuanting Xu
  • Patent number: 8386664
    Abstract: Reducing runtime coherency checking using global data flow analysis is provided. A determination is made as to whether a call is for at least one of a DMA get operation or a DMA put operation in response to the call being issued during execution of a compiled and optimized code. A determination is made as to whether a software cache write operation has been issued since a last flush operation in response to the call being the DMA get operation. A DMA get runtime coherency check is then performed in response to the software cache write operation being issued since the fast flush operation.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Tong Chen, Haibo Lin, John K. O'Brien, Tao Zhang
  • Patent number: 8386653
    Abstract: Described are systems and methods for instrumenting configuration and system settings based on targeting configuration settings at dynamically populated groups, groups with varied membership, and objects defined in a class. The systems and methods provide for attributing a configuration setting or policy to one or more objects and then targeting the object at one or more scope.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: February 26, 2013
    Assignee: Microsoft Corporation
    Inventors: Travis Wright, Abbot Moffat, Hakan Berk, Ferit Findik, Vitaly Voloshin, Marisol Ontaneda, Anand Lakshminarayanan, Shawn Bice