Patents Examined by Kristina Soderquist
  • Patent number: 5959256
    Abstract: A multilayer printed wiring board wherein circuits are provided respectively on both the faces of a substrate and subsequent circuits are provided in order and via insulating layers respectively on the outsides of the preceding circuits, characterized in that the insulating layers comprise an epoxy resin, polyvinyl acetal resin, melamine or urethane resin and rubber-modified epoxy resin in a specific mixing ratio.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: September 28, 1999
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Muneo Saida, Muneharu Ohara, Teturoh Satoh
  • Patent number: 5898128
    Abstract: An electronic component (10) has an electrically insulating substrate (20) that is encapsulated with an electrically conductive material (15) to provide thermal dissipation for the electronic component (10). The electrically insulating substrate (20) has cavities (21-24) that are either completely filled with an electrically conductive material (15) or are partially filled to provide recesses (26-27) for electronic devices (30,31). The electronic devices (30,31) are electrically coupled to the leads (60-63) of the electronic component (10) using either wire bonds (70) or metallic depositions (55-57).
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: April 27, 1999
    Assignee: Motorola, Inc.
    Inventors: Guillermo L. Romero, Christopher M. Scanlan, David M. Gilbert
  • Patent number: 5864089
    Abstract: A modular electrical connector assembly to which an electrical telecommunication cable is connectable for communicating electrical signals between the connector assembly and cable. The connector assembly includes an electrically nonconductive body and a crosstalk energy emitting electrical interference source on the body and/or on or proximate the connector assembly. Electrically conductive first and second leads on the body define an electrical signal circuit for carrying electrical signals communicatable with the cable. The first lead is located more closely proximate to the interference source than is the second lead such that a greater amount of crosstalk energy from the interference source is electromagnetically impressed on the first lead than on the second lead to thereby define a difference in crosstalk energy on the first and second leads.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: January 26, 1999
    Assignee: Lucent Technologies Inc.
    Inventor: Attilio Joseph Rainal
  • Patent number: 5856636
    Abstract: Electronic circuit prototype wiring board is fabricated with layers of electrically conductive material separated by layers of dielectric material. Contact pads of electrically conductive material are arrayed on a surface of the board. Columns of electrically conductive material extend upward from each of the conductive layers to selected contact pads, passing through perforations in any intermediate layers above, such that each of the pads is in electrical communication with only one of the conductive layers. All of the pads connected to a common conductive layer are of a similar geometric plan form which is associated with that layer and which is different and distinguishable from the plan form of pads in electrical communication with any other of the conductive layers. In an alternative embodiment, the wiring board is fabricated of an elastic dielectric material.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: January 5, 1999
    Inventor: David W. Sanso
  • Patent number: 5847326
    Abstract: A low-temperature fired ceramic circuit substrate includes a plurality of laminated insulating layers each formed of a low-temperature fired ceramic fired at a temperature ranging between 800 and 1,000.degree. C., an inside layer wiring conductor formed of a conductive material of Ag system which is mainly composed of Ag, the inside layer wiring conductor being disposed in the inside insulating layer, a surface layer wiring conductor formed of a conductive material of Au system which is mainly composed of Au, the surface layer wiring conductor being disposed on the surface insulating layer, and an intermediate metal layer formed of a thick film paste of a conductive material of Au/Ag system which is mainly composed of Au/Ag, the intermediate metal layer being interposed between the inside layer wiring conductor and the surface layer wiring conductor.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: December 8, 1998
    Assignee: Sumitomo Metal Electronics Devices Inc.
    Inventors: Katsuya Kawakami, Junzo Fukuta
  • Patent number: 5847327
    Abstract: A dimensionally stable core for use in high density chip packages is provided. The stable core is a metal core, preferably copper, having clearances formed therein. Dielectric layers are provided concurrently on top and bottom surfaces of the metal core. Metal cap layers are provided concurrently on top surfaces of the dielectric layers. Blind or through vias are then drilled through the metal cap layers and extend into the dielectric layers and clearances formed in the metal core. If an isolated metal core is provided then the vias do not extend through the clearances in the copper core. The stable core reduces material movement of the substrate and achieves uniform shrinkage from substrate to substrate during lamination processing of the chip packages. This allows each substrate to perform the same. Additionally, a plurality of chip packages having the dimensionally stable core can be bonded together to obtain a high density chip package.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: December 8, 1998
    Assignee: W.L. Gore & Associates, Inc.
    Inventors: Paul J. Fischer, Robin E. Gorrell, Mark F. Sylvester
  • Patent number: 5844173
    Abstract: A collector terminal is arranged to make electrical contact between a voltage source such as a battery and an electronic circuit, whereby the latter is supplied with power by the battery. The battery is placed, or pressed, against the collector terminal in order to obtain the required contact. The electronic circuit is typically that of a hand-held remote control unit for operating a central locking system of a motor vehicle. The occurrence of unsuccessful attempts, by a user, to obtain a remote control signal from the control unit, is reduced by improving the contact between the battery and the collector terminal. The collector terminal is substantially flat and includes a grid structure defining recesses in its contact surfaces. The apex or projecting point of a convex surface zone of the battery, existing at least locally around this apex, enters into a recess between two teeth forming part of the grid network, thus increasing the number of points of contact.
    Type: Grant
    Filed: August 3, 1995
    Date of Patent: December 1, 1998
    Assignee: Valeo Electronique
    Inventor: Denis Etienne
  • Patent number: 5844166
    Abstract: In the present invention the cover-like part (21) of an RF shield is manufactured from a transparent material, e.g., plastic, and unplated areas that function as light conductors (22) are left in the conductive plating covering the shield. The present invention combines an RF shield and a light conductor into one structure whose manufacturing process is quite easy to control. The present invention eliminates the necessity of having separate plates that function as light conductors.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: December 1, 1998
    Assignee: Nokia Mobile Phones, Ltd.
    Inventors: Mikko Halttunen, Pekka Lonka
  • Patent number: 5841075
    Abstract: A method of making a low inductance conductive via in a laminated substrate by providing a first conductive layer. A first dielectric layer is formed on the first conductive layer. A second conductive layer is formed on the first dielectric layer. A first conductive path is formed in the first conductive layer extending along a first route between a first node and a second node. A first conductive blind-via is connected to the first conductive path at the second node, with the first-blind via being formed in the first dielectric layer at the second node. Lastly, a second conductive path is formed in the second conductive layer that is connected to the first blind via. The second conductive path extends between a third node and the first blind via along a second route. The second route corresponds identically to at least a portion of the first route.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: November 24, 1998
    Assignee: W. L. Gore & Associates, Inc.
    Inventor: David A. Hanson
  • Patent number: 5837935
    Abstract: A hermetic seal for an electronic component has a cap having a base portion with laterally extending walls. The laterally extending walls define a main chamber therebetween. A cavity is formed in the end of the laterally extending walls to define a secondary chamber and divide the end of the laterally extending walls into a first area and second area. The cap is hermetically sealed to the base at the first and second areas of the laterally extending walls so that the secondary chamber and the main chamber are separately hermetically sealed.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: November 17, 1998
    Assignee: Ford Motor Company
    Inventors: Judd S. Carper, David G. McIntyre
  • Patent number: 5834704
    Abstract: In a pattern structure of a flexible print circuit board, a plurality of electric signal transmitting patterns are formed as thin as possible as well as one of at least two void patterns is formed between the electric signal transmitting patterns and cut portions are formed to the respective void patterns so that they are directed in the bending direction of the flexible print circuit board. With this arrangement, the flexible print circuit board can be accurately and easily bent at a bending position without the need of a metal mold and special index patterns.
    Type: Grant
    Filed: June 4, 1997
    Date of Patent: November 10, 1998
    Assignee: Fuji Photo Optical Company, Limited
    Inventor: Kazuhisa Tanaka
  • Patent number: 5831219
    Abstract: A lower-layer interconnection and an upper-layer interconnection formed on the lower-layer interconnection through an interlayer insulating film interposed therebetween are connected to each other by a plurality of contact plugs the interconnections and the contact plugs providing a plurality of conductive paths. The lower-layer interconnection is made of a conductive material having a resistivity higher than the upper-layer interconnection. At least one of the conductive paths provided in the lower-layer interconnections is shorter than the other conductive paths, and the contact plug which provides the shorter conductive path has a lower resistance than the contact plugs which provide the other conductive paths. With this arrangement, the contact plug which provides the shorter conductive path is prevented from suffering an increased current density, and the current densities in the contact plugs are uniformized.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: November 3, 1998
    Assignee: Sony Corporation
    Inventors: Takeshi Kobayashi, Mikio Mukai
  • Patent number: 5831218
    Abstract: Board delamination during the singulation from a board panel and board sagging during front-end assembly are two biggest problems encountered in cellular manufacturing lines. The method (700) and circuit board panel (600) of the present invention substantially eliminate assembly-line delamination and sagging for circuit board manufacturing. A number of slots are punched to fit into a circuit board profile. V-grooves are cut along each of the circuit board profiles through the slots and directly opposite on a top and bottom of the circuit board. Thus, optimization of the cut-outs and v-groove configurations eliminate tearing/delamination and substantially reduce sagging.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: November 3, 1998
    Assignee: Motorola, Inc.
    Inventors: Kai X. Hu, Xinyu Dou, Chao-Pin Yeh, Don Dillard, Delbert Juarezl, Gary Mui, Tom Brey, Rich Dlesk, Karl Wyatt, Dave Roller
  • Patent number: 5827998
    Abstract: An electromagnetic shielding structure is formed from a first bracket 11 in which a box plate 11a having a c-shaped cross section accommodates a radio wave-absorbing material 11b having a surface of serrate cross section that contacts a thermal blanket 2, and a second bracket 12 having a serrate form that can mesh with the serrate form of the first bracket. The thermal blanket 2 is held and secured between the first and second brackets 11, 12. The thermal blanket 2 can be firmly joined to the satellite body by securing the first bracket 11 to the satellite body with screws. Leaked signals X are attenuated by the box plate 11a and the radio wave-absorbing material 11b. Leaked signals passing through gaps between the thermal blanket 2 and the radio wave-absorbing material 11b are greatly attenuated due to the length of the passage resulting from the serrate form.
    Type: Grant
    Filed: February 12, 1996
    Date of Patent: October 27, 1998
    Assignee: NEC Corporation
    Inventor: Tatsuji Moriguchi
  • Patent number: 5824950
    Abstract: A semiconductor die carrier configured to be secured to a printed circuit board includes an insulative package for housing a semiconductor die. The insulative package has a top surface, a bottom surface, and a plurality of side surfaces coupling the top surface and the bottom surface. At least one row of electrically conductive leads extends from at least one of the side surfaces of the insulative package. Each of the leads has a proximal end, at least one horizontal portion extending in a horizontal direction, at least one vertical portion extending in a vertical direction, and a distal end. The distal ends of the leads are configured to be secured to the printed circuit board such that, when the distal ends of the leads are secured to the printed circuit board, at least a portion of the insulative package is located below an upper surface of the printed circuit board.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 20, 1998
    Assignee: The Panda Project
    Inventors: Joseph M. Mosley, Maria M. Portuondo, Drew L. Taylor
  • Patent number: 5824949
    Abstract: A tubular-shaped housing comprising a flexible, belt-shaped wall arranged around a display instrument and/or a front pane of the display instrument. The tubular shaped housing is formed by bending the flexible, belt-shaped wall around the display instrument and/or front pane. The belt-shaped wall can be used for differently shaped display instruments and/or front panes, since the flexibility of the belt-shaped wall allows it to adapt to the outer contour of the display instrument and/or of the front pane.
    Type: Grant
    Filed: July 10, 1996
    Date of Patent: October 20, 1998
    Assignee: Moto Meter GmbH
    Inventor: Harald Schach
  • Patent number: 5824951
    Abstract: The invention provides an electronic part which includes a casing having a recessed portion which is free of accumulation of moisture and gases and in which a piezoelectric element and terminals are received, and a lid sealably covering the recessed portion. The casing and the lid are respectively provided with narrow grooves communicating with the recessed portion. The casing and the lid are welded together by a ultrasonic welding method at their peripheral edges with the exception of the narrow grooves and portions outside thereof, thereby forming a very narrow gap between the casing and the lid.
    Type: Grant
    Filed: July 17, 1996
    Date of Patent: October 20, 1998
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yasuhiro Tanaka
  • Patent number: 5819858
    Abstract: A circuit board includes a substrate of ceramic material and conductive strips in form of a metal layer which is cast onto the surface of the substrate and formed through locally stripping metal layer from the substrate surface. The circuit board further includes a recess for receiving an inlay of metal matrix composite material.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: October 13, 1998
    Assignee: Electrovac, Fabrikation elektrotechnischer Spezialartikel Gesellschaft m.b.H.
    Inventor: Helmut Nechansky
  • Patent number: 5821455
    Abstract: A lid for sealing a semiconductor package containing a semiconductor chip, a semiconductor package making use of the lid, and a method for producing the lid. The lid has a solder layer along the peripheral side of a ceramic plate. The solder layer has a portion of an increased solder thickness and a portion of a reduced solder thickness extending along the peripheral direction. When sealing the semiconductor package, a gas confined within the inside of the semiconductor chip mounting site of the package substrate may be discharged from the semiconductor package for realizing hermetic sealing.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: October 13, 1998
    Assignees: Sumitomo Metal (SMI) Electronics Devices, Inc., Intel Corporation
    Inventors: Tetsuya Yamamoto, Hideyuki Yoshino, Akihiro Hidaka, Roy Bell, Rusli Othman
  • Patent number: 5821457
    Abstract: A semiconductor die carrier includes an insulative module; a plurality of electrically conductive leads extending from the insulative module; a semiconductor die housed with the insulative module; and at least one high frequency capacitor secured to the insulative module for facilitating transmission of high frequency signals carried to and from the semiconductor die on the electrically conductive leads.
    Type: Grant
    Filed: July 29, 1997
    Date of Patent: October 13, 1998
    Assignee: The Panda Project
    Inventors: Joseph M. Mosley, Maria M. Portuondo