Abstract: An elongated microwave powered lamp (1) having one or more bulbs with any length or shape or disposition according to a linear series, straight or curved, includes: at least one transparent elongated bulb (2) containing, in an inner space thereof, a material apt to be excited by microwave irradiation thereby emitting an electromagnetic radiation; a coaxial microwave antenna placed outside the bulb (2) and respectively connected to a microwave source (81) via corresponding antenna lead (91), said bulb (2) and said at least one microwave coaxial antenna being displaced in a close relationship to each other to allow the microwave excitation of said material, wherein the outer tubular conductor of the coaxial antenna (5) has spaced holes (6) formed therethrough and facing the bulb (2), at which microwaves are released toward the bulb.

Abstract: A processing array that performs one cycle full adder operations. The processing array may have different bit line read/write logic that permits different operations to be performed.

Abstract: An apparatus includes: a first inverter configured to receive a first clock signal and output a second clock signal, wherein an input pin, an output pin, a power pin, and a ground pin of the first inverter connect to the first clock signal, the second clock signal, a first source node, and a second source node, respectively; a second inverter configured to receive the second clock signal and output a third clock signal, wherein an input pin, an output pin, a power pin, and a ground pin of the second inverter connect to the second clock signal, the third clock signal, the first source node, and the second source node, respectively; a first resistor connected to a first DC (direct-current) voltage to the first source node; and a second resistor connected to a second DC voltage to the second source node.

Abstract: A quantum charge parametron (QCP) includes a load capacitor; two quantum phase-slip junctions (QPSJs) coupled to each other through the load capacitor so as to define two charge islands, each charge island being located between the load capacitor and a respective one of the two QPSJs; at least one input voltage source coupled to the two QPSJs so that the two QPSJs, the load capacitor and the at least one input voltage source define a loop; and an excitation voltage source coupled to the two charge islands through first and second capacitors, respectively.

Abstract: An integrated circuit device is disclosed that includes an interposer and a programmable fabric die disposed on the interposer. The programmable fabric die includes multiple sectors that each have multiple rows of logic element blocks. Each row of logic element blocks includes multiple microbumps. Each logic element block has programmable fabric circuitry and an input/output interface electrically coupled to a respective microbump. The integrated circuit device also includes a device disposed on the interposer external to the programmable fabric die and electrically coupled to the microbumps via the interposer.

Abstract: A wireless lighting control system is provided to create a lighting pattern by remotely controlling a plurality of lighting devices according to groups, thereby improving a lighting effect. The wireless lighting control system includes a first lighting device electrically connected with a first smart device to act as a master, and a plurality of second lighting devices electrically connected with a plurality of second smart devices to act as slaves, respectively. If a group for lighting control and control pattern information according to groups are selected from the first smart device, the first lighting device transmits the control pattern information according to the groups to the second lighting devices through a wireless communication scheme. At least one of lighting units of the second lighting devices and display units of the second smart devices is controlled based on the control pattern information according to the groups.

Abstract: A reconfigurable circuit includes: a plurality of first lines; one or more second lines; a non-volatile resistive cell coupling one of the first lines with one of the second lines at each cross-point between the first lines and the second lines; and first switch elements including first terminals respectively coupled to the first lines, wherein each of the first switch elements is separately turned on or off in accordance with a control signal applied thereto.

Abstract: A tile including circuitry for use with machine learning models, the tile including: a first computational array of cells, in which the computational array of cells is a sub-array of a larger second computational array of cells; local memory coupled to the first computational array of cells; and multiple controllable bus lines, in which a first subset of the multiple controllable bus lines include multiple general purpose controllable bus lines couplable to the local memory.

Abstract: A retention circuit provided in a logic circuit enables power gating. The retention circuit includes a first terminal, a node, a capacitor, and first to third transistors. The first transistor controls electrical connection between the first terminal and an input terminal of the logic circuit. The second transistor controls electrical connection between an output terminal of the logic circuit and the node. The third transistor controls electrical connection between the node and the input terminal of the logic circuit. A gate of the first transistor is electrically connected to a gate of the second transistor. In a data retention period, the node becomes electrically floating. The voltage of the node is held by the capacitor.

Abstract: Aspects of the invention may relate to a treatment device and method for providing plasma treatments of lenses. The treatment device for treating a lens, included in an operational device, may include: at least one first electrode located in proximity to a first surface of the lens, such that the first surface is to be treated by the treatment device; at least one second electrode; and an RF generator electrically associated with the electrodes for providing RF energy to the at least one first and at least one second electrodes in an amount sufficient to generate plasma on the first surface of the lens.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate external port measurement of qubit port responses are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an analysis component that can analyze responses of a multi-mode readout device coupled to a qubit. The computer executable components can further comprise an assignment component that can assign a readout state of the qubit based on the responses. In some embodiments, the multi-mode readout device can be electrically coupled to at least one of the qubit or an environment of the qubit based on a defined electrical coupling value.

Abstract: Techniques described herein may relate to providing a programmable interconnect network (e.g., a programmable network-on-chip (NOC)). A method may include determining a transmission parameter, bonding one or more channels of an interconnect network based at least in part on the transmission parameter, and power-gating any unused channels after the bonding.

Abstract: A method of performing a computational process using a quantum computer includes generating a laser pulse sequence comprising a plurality of laser pulse segments used to perform an entangling gate operation on a first trapped ion and a second trapped ion of a plurality of trapped ions that are aligned in a first direction, each of the trapped ions having two frequency-separated states defining a qubit, and applying the generated laser pulse sequence to the first and second trapped ions. Each of the plurality of laser pulse segments has a pulse shape with ramps formed using a spline at a start and an end of each of the plurality of laser pulse segments.

Abstract: An information processing apparatus includes a dynamic reconfiguration device and a processor. The dynamic reconfiguration device has a first region with a static configuration, a second region with a changeable configuration, a switch used for bypassing between input and output terminals of the second region, and a crossbar switch used for switching a connection between the first region and the second region. The processor is configured to set a writing destination for a circuit to be reconfigured based on a resource to be used by the circuit if the circuit is to be written in the second region.

Abstract: An encapsulated LED switch that incorporates a MOSFET power drivers, high current transistors, or other suitable power drivers in a PCB that attaches to the LED switch such that a low power LED switch controls the output of a high power driver. The selected power driver PCB can be adapted to different load requirements by making simple changes. The PCB's can be interchanged to provide for a predetermined output power required for a particular application. In addition, the wire gauge size of the wires attached to the MOSFET power driver PCB can also be varied to match intended load requirements. For applications in which the LED switch is used in hostile environments, such as marine applications, the LED switch and its associated power driver PCB are encapsulated to protect the circuitry from environmental factors such as high humidity, salt water, etc.

Abstract: A semiconductor device for outputting a control parameter includes a receiving unit, a storage unit and an output unit. The semiconductor device also contains antenna connections, supply connections and at least one output connection for outputting a control parameter signal. The receiving unit contains connections for connection to an antenna, from which the receiving unit receives signals. The receiving unit converts the signals received from the antenna into data. The data are stored in the storage unit. The semiconductor device outputs an output signal at the output connection on the basis of the data stored in the storage unit. The semiconductor device additionally contains a calculation unit which determines the operating hours (time) of the semiconductor device. The output signal depends both on the data stored in the storage unit and on the determined operating hours (time).

Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leadind to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

Abstract: A driver device includes a T-coil circuit and driver circuitries. The driver circuitries are averagely configured as a first driver set and a second driver set. The driver circuitries of the first driver set amplify one of a first data signal and a second data signal according to first portion of bits of an equalization signal, to generate a first output signal and to transmit the same to a first node of the T-coil circuit. The driver circuitries of the second driver set amplify one of the first data signal and the second data signal according to second portion of bits of the equalization signal, to generate a second output signal and to transmit the same to a second node of the T-coil circuit. The T-coil circuit further combines the first and second output signals as a third data signal, and transmits the third data signal to a channel.

Abstract: In a cleaning method according to an exemplary embodiment, a plasma is formed from a cleaning gas in a chamber of a plasma processing apparatus. A focus ring is mounted on a substrate support in the chamber to extend around a central axis of the chamber. While the plasma is formed, a magnetic field distribution is formed in the chamber by an electromagnet. The magnetic field distribution has a maximum horizontal component in a location on the focus ring or a location outside the focus ring in a radial direction with respect to the central axis.

Abstract: An adiabatic logic cell including a first MOS transistor coupling a node for applying a periodic variable supply voltage of the cell to a floating node for providing an output logic signal of the cell, wherein the first transistor is a dual-gate transistor including a front gate coupled to a node for applying an input logic signal of the cell, and a back gate coupled to a node for applying a first periodic variable bias voltage.