Patents Examined by Kyoung Lee
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Patent number: 11563076Abstract: Disclosed in embodiments of the present disclosure are a display panel, a preparation method thereof and a display apparatus. The display panel includes: a first blocking dam located in the blocking area and surrounding the hole area, a second blocking dam located on one side of the first blocking dam close to the hole area and surrounding the hole area, a heightening layer located between the first blocking dam and the second blocking dam, a crack detect wire located on one side of the second blocking dam close to the hole area, at least two connection leading wires leading the crack detect wire out to the display area through the blocking area; in a direction perpendicular to a plane where the display panel is located, an orthographic projection of an area between the connection leading wires has an overlap area with an orthographic projection of the heightening layer.Type: GrantFiled: May 28, 2021Date of Patent: January 24, 2023Assignees: BOE Technology Group Co., Ltd.Inventors: Ning Zhao, Yue Wei, Xia Tang, Fuwei Zou, Guoqiang Yang
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Patent number: 11557581Abstract: A method is provided. A bottom tier package structure is bonded to a support substrate through a first bonding structure, wherein the bottom tier package structure includes a first semiconductor die encapsulated by a first insulating encapsulation, and the first bonding structure includes stacked first dielectric layers and at least one stacked first conductive features penetrating through the stacked first dielectric layers. The support substrate is placed on a grounded stage such that the first semiconductor die is grounded through the at least one first stacked conductive features, the support substrate and the grounded stage. A second semiconductor die is bonded to the bottom tier package structure through a second bonding structure, wherein the second bonding structure includes stacked second dielectric layers and at least one stacked second conductive features penetrating through the stacked second dielectric layers. The second semiconductor die is encapsulated with a second insulating encapsulation.Type: GrantFiled: May 26, 2020Date of Patent: January 17, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Wei Chen, Jie Chen, Ming-Fa Chen
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Patent number: 11557568Abstract: A package includes at least one memory component and an insulating encapsulation. The at least one memory component includes a stacked memory structure and a plurality of conductive posts. The stacked memory structure is laterally encapsulated in a molding compound. The conductive posts are disposed on an upper surface of the stacked memory structure. The upper surface of the stacked memory structure is exposed from the molding compound. The insulating encapsulation encapsulates the at least one memory component. The top surfaces of the conductive posts are exposed form the insulating encapsulation. A material of the molding compound is different a material of the insulating encapsulation.Type: GrantFiled: February 26, 2020Date of Patent: January 17, 2023Assignee: Taiwan Semiconductor Manufacturing Company. Ltd.Inventors: Chih-Wei Wu, Szu-Wei Lu, Ying-Ching Shih
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Patent number: 11557739Abstract: According to an embodiment, a flexible substrate includes a flexible insulating base and a plurality of wirings on the insulating base. Furthermore, the insulating base includes a first opening, a second opening shape of which is different from that of the first opening, and a first line portion. The first line portion is disposed between the first opening and the second opening.Type: GrantFiled: September 25, 2020Date of Patent: January 17, 2023Assignee: Japan Display Inc.Inventors: Yasushi Kawata, Takumi Sano
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Patent number: 11552024Abstract: A method of manufacturing semiconductor devices, such as integrated circuits includes arranging one or more semiconductor dice on a support surface. Laser direct structuring material is molded onto the support surface having the semiconductor die/dice arranged thereon. Laser beam processing is performed on the laser direct structuring material molded onto the support surface having the semiconductor die/dice arranged thereon to provide electrically conductive formations for the semiconductor die/dice arranged on the support surface. The semiconductor die/dice provided with the electrically-conductive formations are separated from the support surface.Type: GrantFiled: August 11, 2020Date of Patent: January 10, 2023Assignee: STMicroelectronics S.r.l.Inventors: Federico Giovanni Ziglioli, Alberto Pintus, Michele Derai, Pierangelo Magni
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Patent number: 11545478Abstract: Provided is a display device capable of preventing or reducing short-circuiting in an alternating high and low temperature environment. The display device is configured to display an image in a display region and includes: an insulating substrate; conductive lines provided on the insulating substrate and extending from the display region to a frame region exterior to the display region; a driver provided in the frame region and connected to the conductive lines; an organic protective film overlapping the conductive lines and extending from the display region to a region between the display region and the driver; an anisotropic conductive film provided under the driver and covering an end of the organic protective film between the display region and the driver; and a moisture-proof resin film overlapping the anisotropic conductive film and covering the end of the organic protective film between the display region and the driver.Type: GrantFiled: April 16, 2021Date of Patent: January 3, 2023Assignee: SHARP KABUSHIKI KAISHAInventors: Shinya Morino, Masanao Nakui, Kenji Saimura
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Patent number: 11538798Abstract: A semiconductor package includes a first redistribution substrate, a first semiconductor chip mounted on the first redistribution substrate, a first molding layer on the first redistribution substrate and covering a top surface and lateral surfaces of the first semiconductor chip, a second redistribution substrate on the first molding layer, and an adhesive film between the second redistribution substrate and the first molding layer. The adhesive film is spaced apart from the first semiconductor chip and covers a top surface of the first molding layer. A lateral surface of the adhesive film is coplanar with a lateral surface of the second redistribution substrate.Type: GrantFiled: February 25, 2021Date of Patent: December 27, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeonjeong Hwang, Kyoung Lim Suk, Seokhyun Lee, Jaegwon Jang
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Patent number: 11538772Abstract: The present disclosure provides an antenna module. The antenna module includes a first layer, a second layer, a first antenna, and a second antenna. The first layer has a first dielectric constant. The second layer is adjacent to the first layer. The second layer has a second Dk lower than the first Dk. The first antenna is disposed on the first layer and is configured for operating at a first frequency. The second antenna is disposed on the second layer and is configured for operating at a second frequency higher than the first frequency.Type: GrantFiled: November 19, 2020Date of Patent: December 27, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yu Ho, Meng-Wei Hsieh
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Patent number: 11538911Abstract: A shield trench power device such as a trench MOSFET or IGBT employs a gate structure with an underlying polysilicon shield region overlying a shield region in an epitaxial or crystalline layer of the device. The polysilicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.Type: GrantFiled: June 4, 2020Date of Patent: December 27, 2022Assignee: iPower SemiconductorInventor: Hamza Yilmaz
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Patent number: 11539008Abstract: The present disclosure relates to a multi-layer film. The multi-layer film may include a first region and a second region. The first region may include a first bonding layer and a first planarization layer directly contacted with each other. The second region includes a second bonding layer, a second planarization layer, and an intervention layer between the second bonding layer and the second planarization layer.Type: GrantFiled: April 16, 2019Date of Patent: December 27, 2022Assignee: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.Inventors: Xiaoyan Zhu, Hua Huang, Weikang Xiao, Tian Yang
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Patent number: 11538366Abstract: The present disclosure discloses a display panel and a detecting method thereof. By providing at least one resistance sensor in a bending region, an extending direction of the resistance sensor is perpendicular to an extending direction of an axis for bending and overlaps with the axis for bending. By electrically connecting the resistance sensor to a detecting circuit, a change of the resistance value of the resistance sensor can be reflected as a change of voltage.Type: GrantFiled: June 30, 2020Date of Patent: December 27, 2022Assignee: BOE Technology Group Co. Ltd.Inventors: Xiaolong Li, Meng Zhao, Zheng Liu, Chunyang Wang, Mingxin Zhang
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Patent number: 11531871Abstract: A stacked neuromorphic device includes a logic die including a control circuit and configured to communicate with a host, and core dies stacked on the logic die and connected to the logic die via through silicon vias (TSVs) extending through the core dies. The core dies include a neuromorphic core die including a synapse array connected to row lines and column lines. The synapse array includes synapses configured to store weights and perform a calculation based on the weights and input data. The weights are included in layers of a neural network system. And the control circuit provides the weights to the neuromorphic core die through the TSVs and controls data transmission by the neuromorphic core die.Type: GrantFiled: April 22, 2020Date of Patent: December 20, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Jaehun Jang, Hongrak Son, Changkyu Seol, Geunyeong Yu, Chanho Yoon, Pilsang Yoon
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Patent number: 11532763Abstract: A method for depositing a conductive coating on a surface is provided, the method including treating the surface by depositing fullerene on the surface to produce a treated surface and depositing the conductive coating on the treated surface. The conductive coating generally includes magnesium. A product and an organic optoelectronic device produced according to the method are also provided.Type: GrantFiled: July 21, 2021Date of Patent: December 20, 2022Assignee: OTI Lumionics Inc.Inventors: Michael Helander, Jacky Qiu, Zhibin Wang, Zheng-Hong Lu
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Patent number: 11527495Abstract: A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.Type: GrantFiled: January 21, 2021Date of Patent: December 13, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Myungsam Kang, Sangkyu Lee, Yongkoon Lee
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Patent number: 11527487Abstract: The invention provides a package structure, comprising: a substrate disposed with a solid grounded copper layer; at least two radio frequency chip modules disposed on the substrate; a plastic encapsulation disposed on the substrate, covered on a surface of the substrate, and coating the at least two radio frequency chip modules therein; a groove located between the adjacent two radio frequency chip modules, and penetrating an upper surface and a lower surface of the plastic encapsulation; a solder filling body filled in the groove, wherein an upper surface of the solder filling body is flushed with the upper surface of the plastic encapsulation; and a shielding layer covered on the upper surface and lateral surfaces of the plastic encapsulation, an upper surface of the solder filling body and lateral surfaces of the substrate; wherein a position of the solid grounded copper layer corresponds to a position of the groove, and makes contact with the solder filling body in the groove.Type: GrantFiled: February 4, 2021Date of Patent: December 13, 2022Assignee: LUXSHARE ELECTRONIC TECHNOLOGY (KUNSHAN) LTD.Inventors: Xiaolei Zhou, Wenbin Kang, Peng Liu
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Patent number: 11527401Abstract: There is provided technique including: forming film on substrate by performing cycle, predetermined number of times, including non-simultaneously performing: (a) supplying precursor gas and inert gas to the substrate; and (b) supplying reaction gas to the substrate, wherein in (a), at least one selected from the group of the precursor gas and the inert gas stored in first tank is supplied to the substrate, and at least one selected from the group of the precursor gas and the inert gas stored in second tank is supplied to the substrate, and concentration of the precursor gas in the first tank while at least one selected from the group of the precursor gas and the inert gas is stored in the first tank differs from that in the second tank while at least one selected from the group of the precursor gas and the inert gas is stored in the second tank.Type: GrantFiled: May 15, 2020Date of Patent: December 13, 2022Assignee: KOKUSAI ELECTRIC CORPORATIONInventors: Masayuki Asai, Tomoki Imamura, Kazuyuki Okuda, Yasuhiro Inokuchi, Norikazu Mizuno
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Patent number: 11527441Abstract: A method for producing a detachment area in a solid body in described. The solid body has a crystal lattice and is at least partially transparent to laser beams emitted by a laser. The method includes: modifying the crystal lattice of the solid by a laser beam, wherein the laser beam penetrates through a main surface of a detachable solid portion of the solid body, wherein a plurality of modifications are produced in the crystal lattice, wherein the modification are formed in a plane parallel to the main surface and at a distance from one another, wherein as a result of the modifications, the crystal lattice cracks the regions surrounding the modifications sub-critically in at least the one portion, and wherein the subcritical cracks are arranged in a plane parallel to the main surface.Type: GrantFiled: February 12, 2021Date of Patent: December 13, 2022Assignee: Siltectra GmbHInventors: Christian Beyer, Jan Richter
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Patent number: 11524382Abstract: Data received from an in-situ monitoring system includes, for each scan of a sensor, a plurality of measured signal values for a plurality of different locations on a layer. A thickness of a polishing pad is determined based on the data from the in-situ monitoring system. For each scan, a portion of the measured signal values are adjusted based on the thickness of the polishing pad. For each scan of the plurality of scans and each location of the plurality of different locations, a value is generated representing a thickness of the layer at the location. This includes processing the adjusted signal values using one or more processors configured by machine learning. A polishing endpoint is detected or a polishing parameter is modified based on the values representing the thicknesses at the plurality of different locations.Type: GrantFiled: March 28, 2019Date of Patent: December 13, 2022Assignee: Applied Materials, Inc.Inventors: Kun Xu, Denis Ivanov, Harry Q. Lee, Jun Qian
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Patent number: 11522036Abstract: A display apparatus includes a plurality of data lines in a display area, a plurality of display elements in the display area and connected to the plurality of data lines, and a plurality of wirings in the display area and connected to the plurality of data lines, the plurality of wirings being configured to transfer data signals from a driving circuit to the plurality of data lines, the driving circuit being located in a peripheral area outside the display area, each of the plurality of wirings including a plurality of branches protruding from corresponding ones of the wirings in a direction perpendicular to an extension direction of the corresponding ones of the wirings, and end portions of each of the plurality of branches having an oblique shape inclined from the extension direction of the wiring in a plan view.Type: GrantFiled: July 22, 2020Date of Patent: December 6, 2022Assignee: Samsung Display Co., Ltd.Inventors: Donghwan Shim, Seunghwan Cho, Jonghyun Choi, Minjoo Kim, Sunho Kim, Hoongi Lee
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Patent number: 11515225Abstract: A system and method. The system may include an integrated circuit (IC) die having two faces and sides. The system may further include mold material surrounding at least the sides of the IC die. The system may further include a redistribution layer and signal pads. The redistribution layer may be positioned between (a) the signal pads and (b) the mold material and the IC die. The redistribution layer may have conductive paths at least connecting the IC die and at least some of the signal pads. A surface of the mold material may abut the redistribution layer. The surface of the mold material may include at least one recessed area having at least one conductive feature connected to at least one of the conductive paths or the IC die.Type: GrantFiled: September 10, 2020Date of Patent: November 29, 2022Assignee: Rockwell Collins, Inc.Inventors: Richard Korneisel, Nathaniel P. Wyckoff, Brandon C. Hamilton, Bret W. Simon, Jacob R. Mauermann