Patents Examined by LaKaisha Jackson
  • Patent number: 11320851
    Abstract: An all-MOSFET voltage reference circuit includes a first cascaded branch configured to generate a bias current and composed of a first current source and a diode-connected first N-type transistor connected at a first interconnected node; a second cascaded branch composed of a second current source, a diode-connected second N-type transistor and a third N-type transistor connected with the second N-type transistor disposed in between, wherein the second N-type transistor and the third N-type transistor are connected at a second interconnected node; a third cascaded branch composed of a third current source and a diode-connected fourth N-type transistor connected at an output node that provides a reference voltage; and an amplifier with a non-inverting node coupled to the first interconnected node and an inverting node coupled to the second interconnected node. A threshold voltage of the third N-type transistor is larger than a threshold voltage of the second N-type transistor.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: May 3, 2022
    Assignees: NCKU Research and Development Foundation, Himax Technologies Limited
    Inventors: Wei-Ting Yeh, Chien-Hung Tsai
  • Patent number: 11314267
    Abstract: An adjuster includes a power transfer circuit, a negative feedback circuit, a constant current source circuit and a control circuit. Two inputs of an error amplifier in the negative feedback circuit receive a reference voltage and a feedback voltage corresponding to an output signal of the adjuster respectively, and the error amplifier is configured to output a first voltage signal when the feedback voltage is less than the reference voltage, and output a second voltage signal when the feedback voltage is greater than the reference voltage, during the starting process of the adjuster. The control circuit is configured to control the negative feedback circuit to be turned off and the constant current source circuit to be turned on, and control the constant current source circuit to be turned off and the negative circuit to be turned on according to the second voltage signal.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 26, 2022
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Chengzuo Wang
  • Patent number: 11303199
    Abstract: A method for limiting an input or output current of a DC-DC converter and a current limiting circuit are disclosed. In an embodiment a method for limiting an input or output current of a DC to DC converter includes storing a first value representative of a level of an output voltage of the DC to DC converter in response to the input or output current exceeding or falling below a first threshold and modifying a control signal based on the first value.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: April 12, 2022
    Assignee: STMICROELECTRONICS (GRAND OUEST) SAS
    Inventor: Lionel Cimaz
  • Patent number: 11294412
    Abstract: An example apparatus includes power amplification circuitry and current-level switch circuitry. The power amplification circuitry has a first input port, a second input port, and field-effect transistor (FET) circuitry, the FET circuitry to operate in a saturation mode while drawing power provided at the first input port from a first power source. The current-level switch circuitry is to sense a change in a current-level used to maintain the FET circuitry in the saturation mode and, in response to the sensed change in the current-level, to cause the power amplification circuitry to draw power provided at the second input port from a second power source while maintaining the saturation mode of the FET circuitry.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: April 5, 2022
    Assignee: NXP B.V.
    Inventors: Christian Vincent Sorace, Ludovic Oddoart, Fabien Boitard
  • Patent number: 11296590
    Abstract: A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: April 5, 2022
    Assignee: Solaredge Technologies Ltd.
    Inventors: Ilan Yoscovich, Tzachi Glovinsky, Guy Sella, Yoav Galin
  • Patent number: 11290013
    Abstract: An integrated circuit apparatus includes a first regulator circuit configured to generate a first regulated voltage; a second regulator circuit configured to generate a second regulated voltage; and a control circuit configured to perform selection with respect to the first regulator circuit and the second regulator circuit such that one regulator circuit among the first regulator circuit and the second regulator circuit is in an on-state and another regulator circuit is in an off-state. The control circuit is configured to: cause the second regulator circuit to be in the on-state upon detecting that a load current is greater than or equal to a predetermined load current; and cause the first regulator circuit to be in the on-state upon detecting that the load current is less than the predetermined load current.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: March 29, 2022
    Assignee: MINEBEA MITSUMI Inc.
    Inventor: Kosuke Yamamoto
  • Patent number: 11290028
    Abstract: A power supply includes an inverter configured to direct current (DC) power into alternating current (AC) power, an impedance matching circuit configured to supply the AC power to a load; and a controller configured to adjust disposition of a powering period, in which the AC power is output, and a freewheeling period, in which the AC power is not output, to adjust a power amount of the power supplied to the load through the impedance matching circuit by the inverter.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: March 29, 2022
    Assignee: EN2CORE TECHNOLOGY, INC.
    Inventors: Yeong-Hoon Sohn, Se-Hong Park, Sae-Hoon Uhm
  • Patent number: 11281247
    Abstract: A front-end module comprises a low-dropout (LDO) voltage regulator, a reference current generator, a power amplifier, and a voltage reference configured to provide a reference voltage to the LDO voltage regulator and the reference current generator. The LDO voltage regulator, reference current generator, power amplifier, and voltage reference are integrated on a first semiconductor die.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: March 22, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Bang Li Liang, Yasser Khairat Soliman, Adrian John Bergsma, Haoran Yu, Hassan Sarbishaei
  • Patent number: 11275397
    Abstract: A power factor correction circuit includes a power meter configured to measure a total harmonic distortion (THD) and an amplitude ratio of each harmonic component at an input port; a switching-type regulator that is controllable by a switch control signal in order to adjust a power factor; and a controller configured to generate the switch control signal to control the switching-type regulator to perform power factor correction, where the controller decreases the THD by adjusting a current reference signal according to the measured THD and the amplitude ratio of each harmonic component.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: March 15, 2022
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Zhaofeng Wang, Xiaodong Huang, Chen Zhao
  • Patent number: 11271485
    Abstract: The anti-windup circuit generally has a voltage clamping device in series with a current limiting device operatively connectable to the output current path of a feedback compensator; the feedback compensator being part of a switch-mode power supply (SMPS) having an input voltage source and a load and generating constrained control values required to generate control on-off actions for tight power regulation. The inclusion of the disclosed anti-windup circuit in an SMPS may lead to hardware based overvoltage protection, reduced overall size and faster response to load changes.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: March 8, 2022
    Assignee: Appulse Power Inc.
    Inventor: Aleksandar Radic
  • Patent number: 11269367
    Abstract: A voltage regulator that outputs, from an output terminal, as an output voltage, a power supply voltage that is input from an input terminal, the voltage regulator including an error amplifier that includes a constant current source that causes a current that is based on a constant current supplied from an outside to flow, and outputs a signal that is based on a difference between a feedback voltage obtained by dividing the output voltage and a reference voltage, an output transistor that has a source connected to the input terminal, a drain connected to the output terminal, and a gate connected to an output of the error amplifier, a capacitor that has one end connected to the output terminal, a boost transistor that is connected in parallel with the constant current source and that has a gate connected to another end of the capacitor, and a diode that has an anode connected to the other end of the capacitor and a cathode connected to a ground terminal.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: March 8, 2022
    Inventor: Yusuke Sano
  • Patent number: 11264895
    Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: March 1, 2022
    Assignee: pSemi Corporation
    Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.
  • Patent number: 11264905
    Abstract: An embodiment DC to DC conversion circuit comprises a DC to DC converter and a regulation circuit. The regulation circuit comprises a comparator configured to detect, during a discharge phase of the DC to DC converter, an overshoot period during which an output voltage of the DC to DC converter exceeds a target voltage, and a timer configured to measure a duration of the overshoot period.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: March 1, 2022
    Assignee: STMICROELECTRONICS (GRAND OUEST) SAS
    Inventor: Lionel Cimaz
  • Patent number: 11249500
    Abstract: A regulator includes a switch array, a feedback circuit, first and second voltage-controlled oscillators, and a switch driver. The switch array generates an output voltage based on a number of enabled switches from among a plurality of switches. The feedback circuit generates a feedback voltage which depends on a level of the output voltage. The first voltage-controlled oscillator generates a first signal having a first frequency which depends on a difference between a reference voltage and the feedback voltage. The second voltage-controlled oscillator generates a second signal having a second frequency which depends on a difference between the feedback voltage and the reference voltage. The switch driver determines a turn-on time point of each of the plurality of switches based on the first signal and determining a turn-off time point of each of the plurality of switches based on the second signal.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: February 15, 2022
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Changsik Yoo, Jin-Gyu Kang
  • Patent number: 11249501
    Abstract: A device includes a first transistor connected between a first node and an output terminal and a first current source connected between the first node and a supply rail. A circuit includes a second current source connected between the supply rail and a second node, an operational amplifier having a non-inverting input configured to receive a potential set point, and a second transistor connected between the second node and an inverting input of the operational amplifier. An output of the operational amplifier is connected to a control terminal of the second transistor and further connected to a control terminal of the first transistor.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: February 15, 2022
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Jimmy Fort
  • Patent number: 11243553
    Abstract: A circuit configured to perform low-dropout regulation of an output voltage includes a first buffer, a second buffer, controller circuitry, and switching circuitry. The first buffer includes a first driving element configured to provide a first current into a first output node based on the output voltage. The first bias circuitry is configured to bias the first current. The second buffer includes a second driving element configured to provide a second current into a second output node based on a voltage at the first output node. The second bias circuitry is configured to bias the second current. The controller circuitry is configured to generate a control signal based on a current at the pass device and switching circuitry configured to electrically couple the first output node to the control node of the pass device based on the control signal.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: February 8, 2022
    Assignee: Infineon Technologies AG
    Inventors: Ionut-Alin Ilie, Cristian Garbossa, Cristian Stefan Zegheru
  • Patent number: 11239751
    Abstract: A method is provided for setting an operating parameter for a DC to DC voltage converter. A load is operated, using a controller, with the operating parameter at a first value. A measurement of an actual inductor current at an inductor of the DC to DC voltage converter, a measurement of an actual load current are provided. The method then determines a reference value for the inductor current, based on the actual load current combined with an inductor current adjustment value based on a desired output voltage at the DC load. The reference value for the inductor current is then compared to the actual inductor current, and the operating parameter is maintained at the first value if the reference value is greater than the actual inductor current. The operating parameter is changed to a second value if the reference value is less than the actual inductor current.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: February 1, 2022
    Assignee: KARMSOLAR
    Inventors: Ahmed Teirelbar, Bassem Saleh, Amr Wasfi
  • Patent number: 11233462
    Abstract: The present application provides a power converter and a power supply system, the power converter includes: a star/delta switching unit, a first power conversion unit, a second power conversion unit, a third power conversion unit, and a controller; AC terminals of the first power conversion unit, the second power conversion unit and the third power conversion unit are connected to a three-phase AC terminal through the star/delta switching unit, and DC terminals of the first power conversion unit, the second power conversion unit, and the third power conversion unit are connected to a DC power terminal; wherein the controller is configured to control the star/delta switching unit according to a signal reflecting a voltage of the DC power terminal, to form a star connection or a delta connection among the three-phase AC terminal and the first power conversion unit, the second power conversion unit and the third power conversion unit.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: January 25, 2022
    Assignee: DELTA ELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Cheng Lu, Yong Tao, Wenfei Hu
  • Patent number: 11231732
    Abstract: A power managed voltage reference quickly provides accurate operation when enabled and also avoids back-charging power supply rails when disabled. When disabled, the voltage reference filter capacitor is decoupled from the voltage reference buffer and coupled to a pre-charge source having a voltage magnitude greater than the reference voltage. When the voltage reference is enabled, the capacitor is coupled to a discharge path and the voltage across the capacitor is detected to determine when to decouple the capacitor from the discharge path and couple the capacitor to the voltage reference buffer. The capacitor voltage is also detected while disabling the voltage reference. Back-charging the pre-charge supply is prevented by coupling the capacitor to the discharge path until the magnitude of the capacitor voltage is less than the lowest voltage specified for the pre-charge supply, then coupling the capacitor to the pre-charge supply to prepare for enabling the voltage reference.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: January 25, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Chandra Prakash, Prashanth Drakshapalli
  • Patent number: 11226648
    Abstract: A power factor correction circuit includes a power meter configured to measure a total harmonic distortion (THD) at an input port; a switching-type regulator that is controllable by a switch control signal in order to adjust a power factor; and a controller configured to generate the switch control signal to control the switching-type regulator to perform power factor correction, where the controller adjusts an on-time of a main switch of the switching-type regulator based on the measured THD to decrease the THD.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: January 18, 2022
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Zhaofeng Wang, Xiaodong Huang, Chen Zhao