Patents Examined by LaKaisha Jackson
  • Patent number: 12379738
    Abstract: A low power hybrid reverse (LPHR) bandgap reference (BGR) and digital temperature sensor (DTS) or a digital thermometer, which utilizes subthreshold metal oxide semiconductor (MOS) transistors.
    Type: Grant
    Filed: July 3, 2024
    Date of Patent: August 5, 2025
    Assignee: Intel Corporation
    Inventors: You Li, David Duarte, Yongping Fan
  • Patent number: 12368379
    Abstract: A control module, for a resonant switched-capacitor converter having first, second, third and fourth cascaded switches and generating an output voltage, includes a timing circuit generating a clock, a controller generating first and second control signals indicating, respectively, first and second control quantities, the difference between which being a function of the difference between a reference quantity and a feedback quantity depending on the output voltage, first and second delay circuits that generate first and second logic signals and, respectively, third and fourth logic signals, the first and third logic signals being delayed with respect to the clock as a function of, respectively, the first and second control quantities, the second and fourth control signals being respectively the logic negation of the first and third logic signals, and a driver that controls the first, second, third, and fourth switches based on, respectively, the first, second, third, and fourth logic signals.
    Type: Grant
    Filed: April 4, 2023
    Date of Patent: July 22, 2025
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Nicolosi, Alessandra Farina, Edoardo Bonizzoni
  • Patent number: 12346141
    Abstract: A low dropout regulator comprising: a supply voltage connection for receiving a supply voltage; a load voltage output connection for providing a load voltage to a load; load voltage output control circuitry comprising a pass transistor configured to regulate the load voltage based on a voltage at its gate region; adaptive biasing circuitry comprising: a biasing transistor configured to regulate the voltage provided to the gate region of the pass transistor based on a voltage provided to a gate region of the biasing transistor; and operational transconductance amplifier, OTA, circuitry comprising a first OTA transistor and a second OTA transistor, wherein a gate region of the first OTA transistor is arranged to receive a reference voltage and a gate region of the second OTA transistor is arranged to receive a voltage indicative of the load voltage; and adaptive compensation circuitry comprising: (i) a first compensation capacitor having a first electrode and a second electrode, (ii) a second compensation capac
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: July 1, 2025
    Assignee: Agile Analog Ltd
    Inventor: Mallikarjun Banappagol
  • Patent number: 12334835
    Abstract: A transport climate control system is disclosed. The transport climate control system includes a self-configuring matrix power converter having a charging mode, an inverter circuit, a controller, a first DC energy storage and a second DC energy storage, and a compressor. The first DC energy storage and the second DC energy storage have different voltage levels. During the charging mode, the inverter circuit is configured to convert a first AC voltage from an energy source to a first DC voltage, the controller is configured to control the self-configuring matrix power converter to convert the first DC voltage to a first output DC voltage to charge the first DC energy storage, and/or to a second output DC voltage to charge the second DC energy storage.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: June 17, 2025
    Assignee: THERMO KING LLC
    Inventor: Ryan Wayne Schumacher
  • Patent number: 12332671
    Abstract: A startup circuit and a bandgap circuit are provided. The startup circuit includes a start referencing circuit and a driving circuit. The start referencing circuit is configured to receive an enabling signal ramping from a disabled voltage level to an enabled voltage level to generate a reference signal. The driving circuit has an input end coupled to the start referencing circuit and an output end coupled to an operational amplifier circuit of the bandgap circuit. The driving circuit is configured to generate a driving signal to the operational amplifier circuit according to the reference signal. The driving circuit comprises a plurality of buffer circuits coupled in series and at least one of the buffer circuits being a hysteresis buffer.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: June 17, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Jia-Wun Syu
  • Patent number: 12323051
    Abstract: A power supply apparatus and a method for controlling the same are provided in the present disclosure, and the power supply apparatus includes: a mode selection module, configured to provide for a user to select an output mode; a reference value setting module, configured to output an output voltage reference value and an output current reference value; a current control loop and a voltage control loop, which receive reference values respectively, and output a first and a second electric signal respectively; a loop selection module, configured to transmit the first or the second electric signal to a drive module; and the drive module, configured to provide a drive signal to a main power module to control the main power module to output a constant voltage/current, and perform voltage-limiting/current-limiting protection when the output voltage or the output current is greater than or equal to a threshold voltage/current for over-voltage/over-current protection.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 3, 2025
    Assignee: Delta Electronics (Shanghai) Co., Ltd.
    Inventors: Xiaojing Zhang, Kai Liu, Baohua Wang
  • Patent number: 12316241
    Abstract: Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.
    Type: Grant
    Filed: July 10, 2024
    Date of Patent: May 27, 2025
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Lueders, Cetin Kaya, Johan Strydom, Paul Brohlin
  • Patent number: 12316245
    Abstract: The semiconductor device includes: a transistor, and a body diode included in the transistor so that the body diode is anti-parallel to the transistor, and a diode anti-parallel connected to the bidirectional current-conduction device, wherein the bidirectional current-conduction device allows a first current and a second current to flow, and allows at least the second current to switch between conduction and non-conduction, the first current flowing in a first direction from a first main electrode of the transistor to a second main electrode facing the first main electrode, the second current flowing through the body diode in a second direction opposite to the first direction, and the diode is smaller in area than the bidirectional current-conduction device in a plan view.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: May 27, 2025
    Assignee: Mitsubishi Electric Corporation
    Inventor: Katsumi Satoh
  • Patent number: 12298798
    Abstract: A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit.
    Type: Grant
    Filed: June 6, 2024
    Date of Patent: May 13, 2025
    Assignee: pSemi Corporation
    Inventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta
  • Patent number: 12301092
    Abstract: Controller and method for a power converter. For example, a controller for a power converter includes: a feedback detector configured to receive a feedback voltage, sample the feedback voltage, and generate a sampled voltage based at least in part on the feedback voltage, the sampled voltage being associated with one or more fluctuations in magnitude; a resistor selector configured to receive the sampled voltage and generate one or more control signals based at least in part on the one or more fluctuations associated with the sampled voltage; a variable resistor network configured to receive the one or more control signals, determine a network resistance based at least in part on the one or more control signals, and output a compensation voltage based at least in part on the network resistance; and a voltage generator connected to the variable resistor network and configured to receive the compensation voltage.
    Type: Grant
    Filed: May 1, 2024
    Date of Patent: May 13, 2025
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Qian Fang, Yaozhang Chen, Liqiang Zhu
  • Patent number: 12301097
    Abstract: Disclosed are a fault prediction method and apparatus for a power conversion device, and a power conversion system. The method includes: acquiring multiple output voltages of a detecting coil in a preset time period, wherein an electromagnetic induction is generated between the detecting coil and a switching-on circuit of a switching transistor in the power conversion device; extracting each output frequency corresponding to each output voltage of the detecting coil; predicting time when the power conversion device fails according to a change trend of each output frequency. The apparatus includes a detecting coil and a data processing device; the detecting coil is connected to the data processing device and is a closed coil; the data processing device is configured to: acquire an output voltage of the detecting coil, extract corresponding output frequency, and predict time when the power conversion device fails according to a change trend of each output frequency.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: May 13, 2025
    Assignee: China Electronic Product Reliability and Environmental Testing Research Institute ((The fifth electronic research institute of Ministry of Industry and Information Technology) (CEPREI Laboratory))
    Inventors: Yiqiang Chen, Yihang Lin, Bo Hou, Dazhi Wang, Shuo Zhang, Xiangzhen Cai
  • Patent number: 12294296
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: May 6, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chun-Hao Huang, Chun-Wei Lin, I-Hsiang Shih, Ching-Nan Wu, Jia-Wei Yeh
  • Patent number: 12294297
    Abstract: An AC-DC power converter includes: an AC rectification circuit configured to convert an AC line voltage into a rectified line voltage; a charge-pump-based power factor correction sub-converter configured to provide a DC-bus supply voltage; a resonant sub-converter configured to convert the DC-bus supply voltage to a DC output voltage or DC output current, the resonant sub-converter including: a resonant tank configured to convert the DC-bus supply voltage to a resonant voltage or current; and an output rectification circuit configured to generate the DC output voltage or DC output current from the resonant voltage or current to supply a converter load, and a controllable switch network shared by the charge-pump-based power factor correction sub-converter and the resonant sub-converter.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: May 6, 2025
    Assignee: DANMARKS TEKNISKE UNIVERSITET
    Inventors: Ahmed Morsi Ammar, Yasser A. A. Nour, Arnold Knott, Frederik Monrad Spliid
  • Patent number: 12292753
    Abstract: Digital logic voltage regulators and related methods generate a regulated voltage via controlled switching of a power transistor. A digital logic voltage regulator includes a voltage level comparator, a power transistor, and a charge accumulator. The voltage level comparator generates a digital control signal that alternates between a first voltage level and a second voltage level in response to changes in relative voltage level between the regulated output voltage and the target voltage. The digital control signal causes the power transistor to switch from off to on in response to a reduction of the regulated output voltage relative to the target voltage and causes the power transistor to switch from on to off in response to an increase of the regulated output voltage relative to the target voltage. The charge accumulator decreases variation in the regulated output voltage that would occur without the charge accumulator.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: May 6, 2025
    Assignee: Khalifa University of Science and Technology
    Inventors: Baker Mohammad, Dima Kilani, Hani Saleh
  • Patent number: 12271216
    Abstract: Apparatus and methods for logarithmic current to voltage conversion are disclosed herein. In certain embodiments, a logarithmic current to voltage converter includes an input terminal that receives an input current, an output terminal that provides a logarithmic output voltage, a first field-effect transistor (FET) having a gate connected to the input terminal, a first bipolar transistor having a collector connected to the input terminal and an emitter connected to the output terminal, and a stacked transistor connected to the output terminal and to the first FET to form a feedback loop. For example, the stacked transistor can correspond to a second bipolar transistor having a collector connected to the output terminal and a base connected to the source of the first FET, or to a second FET having a drain connected to the output terminal and a gate connected to the source of the first FET.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 8, 2025
    Assignee: Analog Devices, Inc.
    Inventor: Petrus M. Stroet
  • Patent number: 12261518
    Abstract: Circuitry and methods for an improved gate driver circuit for power converters. The improved gate driver circuit substantially reduces propagation delay and transition losses in the floating-gate side of the gate driver circuit. One embodiment includes an inverter having an input configured to receive a state transition signal and an output configured to be coupled to a control input of a switching device. The inverter includes a first NFET having a control gate configured to be coupled to the state transition signal, a second NFET having a control gate coupled to the output of a reference circuit, and a PFET having a control gate configured to be coupled to the state transition signal, wherein the output of the inverter is a node between the conduction channels of the first NFET and the second NFET and the conduction channels of the first NFET, second NFET, and PFET are coupled in series.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: March 25, 2025
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Gary Chunshien Wu
  • Patent number: 12259743
    Abstract: A bandgap reference circuit includes a first current generator having first and second bipolar transistors for generating a first current that varies proportionally as a function of temperature. A second current generator includes a field effect transistor for generating a second current that varies inversely as a function of temperature. A trimming circuit includes a third bipolar transistor sized to match the first bipolar transistor, a third current generator having a second field effect transistor coupled to a collector and base of the third bipolar transistor to generate a third current based on a base current of the third bipolar transistor, and a trim control circuit configured to modify the second current by adding the third current to or subtracting the third current from the second current based on a trim control signal. A bandgap reference current is generated by summing the first current and the modified second current.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: March 25, 2025
    Assignee: NXP USA, Inc.
    Inventors: Guillaume Mouret, Yann Cargouet, Thierry Michel Alain Sicard
  • Patent number: 12261073
    Abstract: An electrostatic chuck including a workpiece support surface, clamping layer, heating layer, thermal control system, and sealing band is disclosed. The sealing band surrounds an outer perimeter of the electrostatic chuck including at least a portion of the workpiece surface. The sealing band has a width greater than about 3 millimeters (mm) up to about 10 mm. Plasma processing apparatuses and systems incorporating the electrostatic chuck are also provided.
    Type: Grant
    Filed: May 3, 2024
    Date of Patent: March 25, 2025
    Assignees: Beijing E-Town Semiconductor Technology Co., Ltd., Mattson Technology, Inc.
    Inventor: Maolin Long
  • Patent number: 12253871
    Abstract: Described embodiments include a circuit for dampening overshoot in a voltage regulator. The circuit includes a first and second offset voltage circuits, each having an input coupled to an input voltage terminal. A first comparator has a first comparator input coupled to the first offset output, and a second comparator input coupled to a reference voltage terminal. A second comparator has a third comparator input coupled to an output of the second offset circuit, and a fourth comparator input coupled to a voltage regulator output. An OR gate has first and second logic inputs and a logic output. The first and second logic inputs are coupled to the outputs of the first and second comparators, respectively. A turn-off circuit has a turn-off input coupled to the logic output, and is configured to provide a turn-off signal at a turn-off output to stop current flow from the voltage regulator output.
    Type: Grant
    Filed: January 17, 2024
    Date of Patent: March 18, 2025
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Saurabh Rai, Venkateswarlu Ramaswamy Tiruvamattur, Ramakrishna Ankamreddi
  • Patent number: 12242292
    Abstract: Systems and methods as described herein may take a variety of forms. In an example, a circuit includes a first voltage stepdown module and a second voltage stepdown module. The first voltage stepdown module has a supply voltage and a first reference voltage as inputs, and an intermediate stepped down voltage as an output, the intermediate stepped down voltage being electrically coupled to a feedback input of the first voltage stepdown module. The second voltage stepdown module includes a low-dropout voltage regulator having the intermediate stepped down voltage and a second reference voltage as inputs and a target voltage as an output.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: March 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bindu Madhavi Kasina, Szu-Chun Tsao, Jaw-Juinn Horng