Abstract: In an embodiment a current limiting circuit includes a circuit configured to detect when an input or output current of a DC to DC converter exceeds or falls below a threshold and a controller configured to store a first value representative of a level of an output voltage of the DC to DC converter in response to the input or output current exceeding or falling below a first threshold, store a second value representative of the level of the output voltage in response to the input or output current falling below a further threshold and modify a control signal based on the first and second values, wherein the control signal is modified based on the first and second values so that the control signal brings the output voltage to an intermediate voltage level between the level of the output voltage represented by the first value and the level of the output voltage represented by the second value.

Abstract: A low-dropout voltage regulator is provided. The low-dropout voltage regulator includes a differential amplifier pair, a secondary amplification circuit that is self-stabilized, an output circuit, and a frequency compensation circuit. The secondary amplification circuit includes a first amplification transistor and a second amplification transistor. The first amplification transistor includes a first terminal, a second terminal, and a third terminal. The second amplification transistor includes a first terminal, a second terminal, and a third terminal. The second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form an input terminal of the secondary amplification circuit to be connected to an output terminal of the differential amplifier pair.

Abstract: A multi-level inverter having one or more banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Abstract: A linear voltage regulator includes a transistor, an error amplifier, a feedback circuit and a compensation circuit. The transistor has a first terminal for receiving an input voltage, a second terminal for providing an output voltage, and a control terminal. The error amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the output terminal is coupled to the control terminal of the transistor. The feedback circuit receives the output voltage and generates a feedback voltage lower than the output voltage. The compensation circuit is configured to receive the feedback voltage and generate a compensation voltage at the second input terminal of the error amplifier. The compensation circuit includes a compensation capacitor for introducing a zero point into an open-loop transfer function of the linear voltage regulator to improve system stability.

Abstract: A bandgap reference circuit includes a bandgap reference core circuit that includes a first bipolar transistor having a first emitter current density and a first base-emitter voltage, a second bipolar transistor having a second emitter current density that is smaller than the first emitter current density and having a second base-emitter voltage, a resistor that is connected to the emitter of the second bipolar transistor, and a differential amplifier circuit that is configured to control first and second emitter currents through the first and second bipolar transistors, respectively, such that a sum of the second base-emitter voltage and a voltage drop across the resistor approximates the first base-emitter voltage. The bandgap reference circuit further includes a first replica bipolar transistor that emulates an operating point of the first bipolar transistor and a second replica bipolar transistor that emulates an operating point of the second bipolar transistor.

Abstract: A PFC circuit includes: a boost inductor, an auxiliary winding, an auxiliary switch tube, a main switch tube, a clamping capacitor, a series resistor and a control module; the boost inductor and the auxiliary winding have mutual inductance, a first terminal of the auxiliary winding is connected to a first terminal of the auxiliary switch tube, a second terminal of the auxiliary switch tube is connected to a first terminal of the clamping capacitor, a second terminal of the clamping capacitor is connected to a first terminal of the series resistor, and a second terminal of the series resistor is connected to a second terminal of the auxiliary winding; the main switch tube is connected between the boost inductor and the ground; and the control module is respectively connected to a control terminal of the main switch tube and a control terminal of the auxiliary switch tube.

Abstract: A controlling circuit for a low-power low dropout regulator includes the low-power low dropout regulator, a current load detector and a bias current circuit. The low-power low dropout regulator has a first transmitting terminal and a second transmitting terminal. The first transmitting terminal is configured to transmit a first voltage, the second transmitting terminal is configured to transmit a second voltage, and the low-power low dropout regulator adjusts a voltage difference between the first voltage and the second voltage. The current load detector detects the first voltage and the second voltage, and compares the reference voltage with the second voltage to generate a detected signal. The bias current circuit generates a bias voltage and a reference current, and the low-power low dropout regulator dynamically adjust a bias current of the low-power low dropout regulator, so that the bias current is positively correlated with the reference current.

Abstract: The present application provides a distributed LDO regulator structure without an external capacitor. The structure includes one CORE module; and one or more POWER modules driven by one of the CORE modules. The CORE module comprises a mirror source voltage generating circuit and a built-in LDO regulator circuit. An output end of an operational amplifier and a gate of the sixth PMOS together serve as a control voltage end of the POWER module. A negative input end of the operational amplifier is connected to a drain of the fifth PMOS and a source of the sixth PMOS by means of a first resistor, wherein a connection end serves as an output end of the built-in LDO regulator circuit. POWER modules having the same output voltage are connected to each other in parallel.

Abstract: A device includes a first impedance; a reference current generation circuit configured to generate a reference current according to a first potential difference, a reference voltage, and a first impedance value of the first impedance; a current mirror circuit configured to output an output current having a first ratio to the reference current according to the reference current; a second impedance configured to generate an output voltage according to a second impedance value of the second impedance, a voltage of a first node which is the same as the first potential difference, and the output current; and a negative feedback circuit configured to generate a feedback voltage according to the voltage of the first node, and adjust the output voltage according to the feedback voltage. There is a second ratio that is inversely proportional to the first ratio between the second impedance value and the first impedance value.

Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.

Abstract: Systems and methods are disclosed related to low-power dynamic offset calibration of an error amplifier. An analog linear voltage regulator circuit tracks changes between a reference voltage and a regulated voltage to keep the regulated voltage as close as possible to the reference voltage. The analog linear voltage regulator includes an error amplifier that measures the error between the reference and regulated voltages and feedback circuitry. The error amplifier and feedback circuitry should be calibrated to correct for any offset within the circuits. The described offset calibration technique not only compensates for the offset in the error amplifier but also cancels any mismatch in the feedback network. During operation, conditions such as temperature and supply voltage may vary causing the offset to change. The technique is low power and dynamically cancels the offset even when the linear regulator is operating to supply the desired voltage.

Abstract: A bandgap module and a linear regulator are provided. The linear regulator includes the bandgap module and an error amplifier. The voltage supply voltage includes a bandgap circuit, a lowpass filter, and a start-up module. The voltage supply voltage generates a bandgap voltage. The lowpass filter filters the bandgap voltage and generates a reference voltage accordingly. The start-up module includes a first start-up circuit and a second start-up circuit. The bandgap voltage is increased to a predefined value when the bandgap module operates in a first phase. The bandgap voltage maintains at the predefined value when the bandgap module operates in a second phase. The second phase is after the first phase.

Abstract: A power conversion system includes a power conversion circuit and a start circuit. The power conversion circuit includes a first terminal, a second terminal, an output capacitor, at least one switch unit, a flying capacitor and a magnetic element. The flying capacitor is connected between the first terminal and the second terminal. The output capacitor is electrically connected with the first terminal or the second terminal. The start circuit is configured to control the power conversion circuit to pre-charge. A first terminal of the start circuit is electrically connected with the first terminal, and a second terminal of the start circuit is electrically connected with the second terminal. During a start process of the power conversion circuit, the at least one flying capacitor and the output capacitor are pre-charged by the start circuit.

Abstract: A method for regulating a voltage reference signal includes providing a first output current during a first interval and a boosted output current during a second interval to generate a low-dropout voltage reference signal based on a first power supply voltage, a second power supply voltage, and a reference voltage level. The method includes, during the second interval, compensating for a voltage drop caused by providing the boosted output current. The first output current may be provided in a first mode of operation. The boosted output current and voltage drop compensation may be provided in a boosted mode of operation.

Abstract: A voltage regulator circuit includes a first amplifier, a second amplifier and a transistor. Respective first input terminals of the first and second amplifiers are coupled to a first reference voltage and a second reference voltage, respectively. A connection terminal of the transistor is coupled to a supply voltage. A control terminal of the transistor is selectively coupled to one of respective output terminals of the first and second amplifiers. When the control terminal of the transistor is coupled to the output terminal of the first amplifier, another connection terminal of the transistor is coupled to a second input terminal of the first amplifier to output a regulated voltage. When the control terminal of the transistor is coupled to the output terminal of the second amplifier, the another connection terminal of the transistor is coupled to a second input terminal of the second amplifier to output the regulated voltage.

Abstract: An electronic device including: a reference voltage generator circuit to generate a reference voltage based on a first and second voltage, the reference voltage generator circuit including: a first current source to supply a first current to each of a first and second node; an amplifier to amplify a difference between the first voltage of the first node and the second voltage of the second node and to output a difference voltage corresponding to the amplified difference; a first bipolar junction transistor (BJT) connected to the first node; a first resistor connected to the second node; a second BJT connected between the first resistor and ground; a second resistor connected between the second node and ground; and a first transistor to be supplied with a second current from the first current source; and an adaptive cascode circuit to generate a bias voltage applied to a gate of the first transistor.

Abstract: A non-volatile memory device comprises memory cells, a first regulator, a second regulator, a first switch, a second switch and capacitor coupling switches. The first regulator comprises a first capacitor, and generates a first voltage at a first node connected to a first subset of the memory cells, to provide the first voltage to the first subset. The second regulator comprises a second capacitor, and generates a second voltage at a second node. The first switch selectively couples the second node to a second subset of the memory cells, to provide the second voltage to the second subset. The second switch selectively couples the first node to the second subset to also provide the first voltage to the second subset. The capacitor coupling switches selectively couple the second capacitor in parallel to the first capacitor when the first switch is deactivated, and the second switch is activated.

Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Abstract: A voltage regulator including an amplifier, a start signal generator and a power transistor is provided. The amplifier has a first positive input terminal, a second positive input terminal, and a negative input terminal to receive a start signal, a reference voltage and a feedback voltage respectively. An output terminal of the amplifier generates a driving voltage. The start signal generator is coupled to the first positive input terminal of the amplifier and generates the start signal, which is incremental, during a startup time interval in a voltage bypass mode. The power transistor generates an output voltage according to the driving voltage based on an operating power. In the voltage bypass mode, the reference voltage is equal to the operating power. A soft-start effect can be effectively achieved by the voltage regulator in the voltage bypass mode.

Abstract: Disclosed is a digital LDO regulator capable of performing asynchronous binary search using a binary-weighted PMOS array. The digital LDO regulator includes a PMOS array unit including a binary-weighted PMOS array and that binary searches the PMOS array asynchronously, and a mode determining unit that operates in at least one of a fine mode, a coarse mode, and a medium mode, based on an output voltage of the PMOS array unit.