Abstract: A display apparatus includes a substrate with a first area and a second area outside the first area, a plurality of pixels located in the first area, a power supply line located in the second area and having a through-hole penetrating the power supply line, a first insulating layer covering the power supply line and filling the through-hole thereof, a test pad located on the first insulating layer and electrically insulated from the power supply line, wherein the test pad overlaps a region defined by the through-hole, a second insulating layer covering the test pad, and a bridge located on the second insulating layer and electrically insulated from the test pad, and electrically connected to the power supply line via a first contact hole in the first insulating layer and the second insulating layer. The test pad is disposed beneath the bridge.

Abstract: A display apparatus includes a substrate comprising a display area and a pad area located outside the display area. A plurality of date lines is in the display area. A plurality of connection wires is in the display area. The plurality of connection wires is connected to the plurality of data lines and is configured to transfer data signals from the pad area to the plurality of data lines. An insulating film covers the plurality of connection wires. Each of the plurality of connection wires comprises a plurality of branches that diverge from a body of each connection wire the insulating film comprises a protrusion in a gap between adjacent branches of the plurality of branches.

Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light-reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.

Abstract: A display apparatus includes: a glass substrate; a light emitting device included in a pixel structure disposed on one principal surface of the glass substrate; an input electrode, disposed on the one principal surface, for inputting a driving signal to the light emitting device; and a back connection member disposed on the other principal surface of the glass substrate so as to be electrically connected to the input electrode. A back insulating layer is disposed on the other principal surface, and a top face of the back insulating layer is located above a top face of the back connection member.

Abstract: One object of this invention is to provide a novel light-emitting device with low power consumption. The light-emitting device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first electrode, a second electrode, and a light-emitting layer. The second light-emitting element includes the first electrode, a third electrode, and the light-emitting layer. The second electrode comprises only a first conductive film, and the third electrode comprises a second conductive film and a third conductive film. The first electrode has a function of reflecting light. The second conductive film has functions of reflecting light and transmitting light. The first conductive film and the third conductive film each have a function of transmitting light.

Abstract: A display device may including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: A substrate that includes a core layer comprising a first surface and a second surface, at least one first dielectric layer located over a first surface of the core layer, at least one second dielectric layer located over a second surface of the core layer, high-density interconnects located over a surface of the at least one second dielectric layer, interconnects located over the surface of the at least one second dielectric layer, and a solder resist layer located over the surface of the at least one second dielectric layer. A first portion of the solder resist layer that is touching the high-density interconnects includes a first thickness that is equal or less than a thickness of the high-density interconnects. A second portion of the solder resist layer that is touching the interconnects includes a second thickness that is greater than a thickness of the interconnects.

Abstract: The present invention relates to semiconductor manufacturing parts used in a dry etching process. Semiconductor manufacturing parts comprising a SiC deposition layer, of the present invention, comprises: a base material; and a SiC deposition layer formed on the surface of the base material, wherein the thickness ratio of the base material and the SiC deposition layer is 2:1 to 100:1.

Abstract: A high frequency module includes a power amplifier and a substrate on which the power amplifier is mounted. The power amplifier includes a first external terminal and a second external terminal formed on a mounting surface. The substrate includes a first land electrode and a second land electrode formed on one principal surface. The first external terminal is connected to the first land electrode, and the second external terminal is connected to the second land electrode. A distance from the mounting surface to a connection surface of the first external terminal is shorter than a distance from the mounting surface to a connection surface of the second external terminal, and a distance from a connection surface of the first land electrode to the one principal surface is longer than a distance from a connection surface of the second land electrode to the one principal surface.

Abstract: A display device includes a display region including a plurality of first regions, and a plurality of second regions arranged with a certain gap between the plurality of first regions, wherein each of the plurality of first regions includes a transistor, a first organic layer, a wiring, a first organic insulating layer on the wiring and the transistor, a display element on the first organic insulating layer, a first sealing layer on the display element and stacked in order with a first inorganic insulating layer, a second organic insulating layer and a second inorganic insulating layer, each of the plurality of second regions includes the wiring, a second organic layer on the wiring, a second sealing layer stacked in order with the first inorganic insulating layer and the second inorganic insulating layer, and a thickness of the second organic layer is smaller than the thickness of the first organic layer.

Abstract: A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer.

Abstract: The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.

Abstract: An optoelectronic component includes an optoelectronic semiconductor chip that generates primary radiation during intended operation of the semiconductor chip, which primary radiation is coupled out via an emission side of the semiconductor chip, an optical element on the emission side and including a plurality of transmission fields arranged laterally side by side, wherein each transmission field is individually and independently electrically controllable, the transmission fields each include an electrochromic material, the transmission fields are such that, by electrically driving a transmission field, the transmittance of the electrochromic material for a radiation coming from the direction of the semiconductor chip during operation is changed and transmittance of the optical element in the region of the respective transmission field is changed for the respective radiation.

Abstract: A method may include providing a substrate, the substrate comprising a substrate base and a patterning stack, disposed on the substrate base. The substrate may include first linear structures in the patterning stack, the first linear structures being elongated along a first direction; and second linear structures in the patterning stack, the second linear structures being elongated along a second direction, the second direction forming a non-zero angle with respect to the first direction. The method may also include selectively forming a set of sidewall spacers on one set of sidewalls of the second linear structures.

Abstract: A display device includes a display substrate including a display area and a pad area located around the display area, a plurality of light emitting elements located on the display area of the display substrate, a plurality of pads located on the pad area of the display substrate and connected to the plurality of light emitting elements, a flexible film attached to the display substrate, a plurality of lead wires disposed on the flexible film, and an anisotropic conductive film disposed between the display substrate and the flexible film. The anisotropic conductive film is disposed between each of the plurality of pads and a corresponding one of the plurality of lead wires overlapping each other to form an electrical connection therebetween. The flexible film has a light transmittance of 60% or more with respect to a visible light wavelength range.

Abstract: There are provided semiconductor packages including a redistribution substrate and a semiconductor chip mounted on the redistribution substrate. The redistribution substrate may include a lower protective layer, a first conductive pattern disposed on the lower protective layer, a first insulating layer surrounding the first conductive pattern and disposed on the lower protective layer, and a second insulating layer disposed on the first insulating layer. The first insulating layer may include a first upper surface that includes a first flat portion extending parallel to an upper surface of the lower protective layer, and a first recess facing the lower protective layer and in contact with the first conductive pattern. The first recess may be directly connected to the first conductive pattern.

Abstract: A pixel structure includes an original light emitting diode die and a repairing light emitting diode die emitting light of a same color, and an extending conductor. The original light emitting diode die includes a first epitaxial layer, and a first electrode and a second electrode disposed at opposite sides of the first epitaxial layer. The repairing light emitting diode die includes a second epitaxial layer, and a third electrode and a fourth electrode disposed at a same side of the second epitaxial layer. The extending conductor includes a first portion, a second portion and a cut-off region. The first portion is electrically connected to the second electrode of the original light emitting diode die. The second portion is electrically connected to the third electrode of the repairing light emitting diode die. The cut-off region is located in the first portion or between the first portion and the second portion.

Abstract: A display device includes a display panel including a display area and a non-display area, a first output pad set, a second output pad set, and a buffer pad set that are disposed in the non-display area, and a path change circuit. In an exemplary embodiment, the path change circuit is configured to change a signal delivery path such that a signal delivered through the first output pad set or the second output pad set is delivered through the buffer pad set, when an enable signal is input.

Abstract: A display device includes a substrate including a display area to display an image and a pad area positioned around the display area; a first pad unit disposed on the pad area, and including a first terminal region having a plurality of first pad terminals arranged in a first direction; and a printed circuit board including a base film and a second pad unit positioned at one side of the base film, the second pad unit being coupled with the first pad unit by electrically connecting with the plurality of first pad terminals.

Abstract: Provided is a semiconductor device that includes a semiconductor substrate, an interconnection layer that is formed on a first face of the semiconductor substrate, at least one of a structural element that is formed to the interconnection layer, or a structural element that is formed in the semiconductor substrate from the first face side of the semiconductor substrate, a semiconductor-through-electrode that is positioned and formed, from a second face side of the semiconductor substrate opposite to the first face, so as to have a predetermined positional relationship with respect to the structural element, and a metallic-diffusion-preventing insulating layer that is formed from the first face side of the semiconductor substrate in a position, and with a shape, surrounding the semiconductor-through-electrode in the semiconductor substrate.