Abstract: A light-emitting element including a first electrode, a second electrode, and an EL layer provided between the first and second electrodes is provided. The first electrode includes a conductive layer, a first transparent conductive layer in contact with the conductive layer, and a second transparent conductive layer in contact with the first transparent conductive layer. The first transparent conductive layer contains a first oxide. The second transparent conductive layer contains a second oxide. The conductive layer has a function of reflecting light. The first oxide contains In and M (M represents Al, Si, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). The second oxide contains In. The resistivity of the second transparent conductive layer is lower than that of the first transparent conductive layer. The thickness of the second transparent conductive layer is greater than or equal to that of the first transparent conductive layer.

Abstract: Provided are an image sensor and a method of manufacturing the same. The image sensor may include a plurality of light detection elements arranged to correspond to a plurality of pixel regions, a color filter layer on the plurality of light detection elements and including a plurality of color filters arranged to correspond to the plurality of light detection elements, and a photodiode device portion on the color filter layer. The photodiode device portion may have curved structures. The photodiode device portion may include an organic material-based photodiode layer, a first electrode between the photodiode layer and the color filter layer, and a second electrode on the photodiode layer. The photodiode device portion may have curved convex structures respectively corresponding to the plurality of color filters.

Abstract: A microelectronic structure may be formed comprising a microelectronic package having a plurality of interconnects and a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the solder resist structure includes a first structure which forms an electrical connection between a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein solder resist structure includes a second structure which prevents second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer.

Abstract: The present disclosure relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a corresponding display panel and display device. The array substrate includes a display area and a non-display area, wherein the display area includes a plurality of pixel regions and a pixel definition region between various pixel regions. Furthermore, the array substrate further includes a base substrate, as well as a patterned metal layer and a patterned light-blocking layer superimposed in the pixel definition region on the base substrate, wherein the patterned light-blocking layer is closer to a light incident side of the array substrate than the patterned metal layer is, and the patterned light-blocking layer is made of a non-metallic material. Besides, an orthogonal projection of the patterned light-blocking layer on the pixel definition region at least partially overlaps that of the patterned metal layer on the pixel definition region.

Abstract: A display device may includes: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: An image sensor may include an organic photo-sensing device configured to selectively sense first visible light and a photo-sensing device array including a first photo-sensing device configured to selectively sense second visible light, a second photo-sensing device configured to selectively sense third visible light, and a third photo-sensing device configured to selectively sense mixed light of the second visible light and the third visible light. The image sensor may include a color filter array including a first color filter configured to selectively transmit the second visible light, a second color filter configured to selectively transmit the third visible light, and a third color filter configured to transmit mixed light of the second visible light and the third visible light. At least the first photo-sensing device and the second photo-sensing device may be at different depths in a substrate and may be laterally offset from each other.

Abstract: A method may include providing a substrate, the substrate comprising a substrate base and a patterning stack, disposed on the substrate base. The substrate may include first linear structures in the patterning stack, the first linear structures being elongated along a first direction; and second linear structures in the patterning stack, the second linear structures being elongated along a second direction, the second direction forming a non-zero angle with respect to the first direction. The method may also include selectively forming a set of sidewall spacers on one set of sidewalls of the second linear structures.

Abstract: A display device includes a substrate including a display area to display an image and a pad area disposed around the display area; and a first pad unit positioned on the pad area, and including a first terminal region having a plurality of first pad terminals arranged in a first direction, in which each of the plurality of first pad terminals includes: a plurality of first connection pad terminals arranged in a first row disposed at a first angle relative to the first direction; a plurality of second connection pad terminals spaced apart from the plurality of first connection pad terminals, and arranged in a second row disposed at a second angle relative to the first direction; and a first terminal connection line configured to connect one of the plurality of first connection pad terminals and one of the plurality of second connection pad terminals, and having at least one bent shape.

Abstract: Provided are display device and method for fabricating the same. According to an aspect of the present disclosure, there is provided a display device comprising: a first substrate; at least one wavelength conversion layer disposed on the first substrate; a capping layer disposed on the wavelength conversion layer and comprising a porous layer; and a first polarizing layer disposed on the capping layer.

Abstract: A standard cell CMOS device includes metal oxide semiconductor transistors having gates formed from gate interconnects. The gate interconnects extend in a first direction. The device further includes M1 layer interconnects. The M1 layer interconnects are parallel to the gate interconnects and extend in the first direction only. The device further includes a M0 layer interconnect. The M0 layer interconnect extends directly over a first gate interconnect and extends in a second direction orthogonal to the first direction only. The M0 layer interconnect is below the M1 layer and is isolated from directly connecting to the first gate interconnect. The device further includes a layer interconnect that is different from the M1 layer interconnects and the M0 layer interconnect. The layer interconnect is connected to the M0 layer interconnect and is directly connected to a second gate electrode.

Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

Abstract: A structure of the avalanche photodiode type includes a first P doped semiconducting zone, a second multiplication semiconducting zone adapted to supply a multiplication that is preponderant for electrons, a fourth P doped semiconducting “collection” zone. One of the first and second semiconducting zones forms the absorption zone. The structure also includes a third semiconducting zone formed between the second semiconducting zone and the fourth semiconducting zone. The third semiconducting zone has an electric field in operation capable of supplying an acceleration of electrons between the second semiconducting zone and the fourth semiconducting zone without multiplication of carriers by impact ionisation.

Abstract: A light emitting device includes a light emitting element and a mounting substrate on which the light emitting element is mounted such that the mounting substrate faces an upper side of the light emitting element. The light emitting element includes a substrate, first and second light emitting cells each including a semiconductor layered structure that includes an n-side semiconductor layer and a p-side semiconductor layer in order from a substrate side, a first insulating layer, wiring electrodes, and a second insulating layer. One of the wiring electrodes is electrically connected to the n-side semiconductor layer of the first light emitting cell and to the p-side semiconductor layer of the second light emitting cell. The mounting substrate includes wiring terminals, one of which is electrically connected to the n-side semiconductor layer of the first light emitting cell and to the p-side semiconductor layer of the second light emitting cell.

Abstract: The technique disclosed in the Description adjusts a modulation level to enable prevention of partial concentration of carriers in a recovery operation. A semiconductor device includes: a semiconductor layer of a first conductivity type; a first impurity layer of the first conductivity type, the first impurity layer being partially diffused in an underside of the semiconductor layer and higher in impurity concentration than the semiconductor layer; and a plurality of second impurity layers of a second conductivity type, the second impurity layers being partially diffused in a surface of the semiconductor layer, wherein the first impurity layer is formed, in a plan view, between the second impurity layers and in a position that does not overlap the second impurity layers, and only the semiconductor layer exists between the second impurity layers in the surface of the semiconductor layer.

Abstract: A method of manufacturing an organic light emitting diode (OLED) display device includes: providing a substrate including a display area and a non-display area; forming an organic light emitting diode element in the display area; forming a barrier wall around the display area and spaced apart from the organic light emitting diode element; performing a plasma treatment on the substrate on which the organic light emitting diode element is formed; and forming a thin film encapsulation layer for coating the organic light emitting diode element, wherein forming the thin film encapsulation layer includes: forming at least one inorganic layer; and forming at least one organic layer inwardly of the barrier wall.

Abstract: A display device includes a organic light emitting device and an encapsulation structure disposed on the organic light emitting device that seals the organic light emitting device. The encapsulation structure includes a first inorganic encapsulation layer disposed on the organic light emitting device, an organic layer disposed on the first inorganic encapsulation layer, and a second inorganic encapsulation layer disposed on the organic layer. The organic layer includes a first organic layer disposed on the first inorganic encapsulation layer and a second organic layer disposed on the first organic layer. An atomic ratio of carbon to silicon in the first organic layer is less than an atomic ratio of carbon to silicon in the second organic layer.

Abstract: A method of forming a semiconductor structure includes the steps: providing a substrate; forming a dielectric over the substrate; forming an opening recessed under a top surface of the dielectric; forming a barrier layer on a sidewall of the opening; performing a physical vapor deposition (PVD) to form a copper layer over the barrier layer, a corner of the opening intersecting with the top surface and the top surface with a predetermined resputter ratio so that the ratio of the thickness of the copper layer on the barrier layer and the thickness of the copper layer over the top surface is substantially greater than 1.

Abstract: Provided is a solid-state imaging device that includes: a semiconductor substrate having photodiodes formed for respective pixels, the photodiodes performing photoelectric conversion; color filters that pass light in the colors corresponding to the respective pixels, the color filters being stacked on the light incident surface side of the semiconductor substrate; and a light shielding film provided between the color filters of the respective pixels, the light shielding film being formed by stacking a first light shielding film and a second light shielding film, the first light shielding film and the second light shielding film being formed with two different materials from each other. The first light shielding film is formed with a metal having a light shielding effect, and the second light shielding film is formed with a resin having photosensitivity. The present technology can be applied to back-illuminated CMOS image sensors, for example.

Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.

Abstract: A chip part according to the present invention includes a substrate having a penetrating hole, a pair of electrodes formed on a front surface of the substrate and including one electrode overlapping the penetrating hole in a plan view and another electrode facing the one electrode, and an element formed on the front surface side of the substrate and electrically connected to the pair of electrodes.