Abstract: In a spread spectrum receiver, a first despread signal is produced by a despreading circuit corresponding to a first symbol rate. The despreading circuit is responsive to a command signal for subsequently producing a second despread signal corresponding to the second symbol rate. A symbol rate estimation circuit is provided for estimating, from the first despread signal, the transmitted symbol rate of the spread spectrum signal as one of the first and second symbol rates. If the transmitted symbol rate is estimated as the first symbol rate, the despreading circuit continues producing the first despread signal. If the transmitted symbol rate is estimated as the second symbol rate, the estimation circuit supplies the command signal to the despreading circuit to produce the second despread signal. A decoding circuit decodes the first and second despread signals.

Abstract: In the method and device for tuning a first oscillator with a second oscillator respective response signals of the first oscillator are produced from corresponding frequency-shifted and/or phase-shifted signals of the second oscillator. The first oscillator is tuned to the second oscillator according to the difference of the respective response signals. For amplitude correction a quotient is formed by dividing an output signal by the sum of the response signals. The method and device according to the invention are especially useful in a rotation rate sensor. The invention also includes a rotation rate sensor, which includes a device for determining rotation rate from the oscillations of a first and second oscillator and the device for tuning the first oscillator with the second oscillator.

Abstract: Disclosed is an apparatus and method for low complexity, phase independent reception of FSK signals. A finite series of delay elements produces a plurality of equidistant samples of a received FSK signal. The plurality of equidistant samples is processed by an arithmetic unit using a phase independent algorithm to obtain an estimate of the received signal. The estimate of the received signal is then compared to a threshold value to determine if the estimate corresponds to a binary 1 or binary 0, which increments a counter corresponding to each binary value. Multiple estimates are counted over a baud interval of the received FSK signal and a binary 1 or binary 0 is output as a received data signal value depending upon which binary value the counter having the higher value corresponds to.

Abstract: A wireless network transmits digital data. The network includes an active transceiver to transmit carrier waves at a succession of preselected frequencies and a transponder. The transponder transmits digital data to the active transceiver by partially reflecting the carrier waves.

Abstract: This invention is particularly useful as a system for digital communications over channels that suffer from impulse noise, and particularly over return cable TV channels, downstream cable TV channels, and digital subscriber loops (DSL) channels for high speed communications over twisted pair copper lines.

Abstract: A system employs a modified Jakes' fading model to generate a fading signal having substantially equivalent autocorrelation values for in-phase (I) and quadrature-phase (Q) components. A Walsh transform may be applied to generate multiple, uncorrelated I and Q components, for multiple fading signals. A complex Rayleigh fading signal according to the modified complex Jakes fading model is provided by a generator having M pairs of I and Q paths. Each pair of I and Q paths includes a corresponding complex carrier generator 201 (M an integer and 1≦n≦M) generating a complex carrier signal with frequency, &ohgr;n, where &ohgr;n is cos ((4n−3&pgr;)/4M). Each of the I paths has a circuit that separates the real component of the corresponding carrier signal to provide a real carrier signal cos (&ohgr;nt). Similarly, each of the Q paths has a circuit that separates the imaginary component of the corresponding complex carrier signal to provide an imaginary carrier signal sin (&ohgr;nt).

Abstract: The present invention is an apparatus and method for performing a Gaussian Minimum Shift Keying baseband modulation based on a reference phase to be simplified. The invention mainly comprises: a memory unit storing a plurality of parameters and their corresponding tabular data of a low pass Gaussian filter, the parameters and their corresponding tabular data being simplified in advance; the low pass filter being used for reducing the bandwidth of the apparatus and increasing the utilization of the bandwidth; and a processing unit based on the input digital data and the tabular data in the memory unit to generate the digital in-phase signal In and the digital quadrature-phase signal Qn.

Abstract: A communications node includes a controller for 1) initializing a counter and resetting a FIFO buffer; 2) determining if a predetermined number of data packets have been transmitted; 3) transmitting the data packets after the FIFO buffer is partially filled if the number of data packets transmitted is less than the predetermined number, incrementing the counter, and returning to step (2); 4) directing a transceiver to be in a receive mode if the predetermined number of data packets have been transmitted; 5) determining if a command signal has been detected; 6) processing a backlink command if a command signal has been detected, and then directing the transceiver to be in transmit mode, clearing the counter, and returning to step(2); and 7) setting the receiver in a transmit mode if no command signal has been detected, and then clearing the counter and returning to step (2).

Abstract: Systems and methods for precisely controlling the amount of redundancy introduced by a turbo encoding process. Bits having predetermined values are introduced into the turbo encoding input stream and then deleted from the turbo encoding output stream. At the receiver end, the bits having predetermined values are reintroduced into the encoded information stream as having been received with a maximum confidence level. Coding rate may be varied by varying the number of bits having predetermined values which are inserted at the encoder input. This scheme permits the amount of redundancy to be varied according to system requirements.

Abstract: A delay locked loop generates an advanced clock signal synchronized with a reference clock signal. The delay locked loop includes an input buffer, a variable delay circuit, a delay compensation circuit, a phase shifter, a delay controller, a phase sensing pump and a phase inversion controller. The variable delay circuit includes a multiplicity of delay terminals. The number of enabled delay terminals is controlled by a counting signal group. In the phase shifter, the phase of an output signal of the variable delay circuit generates the advanced clock signal with a phase of the reference clock signal. When the compared phase difference is more than Π, the phase shifter inverts a delayed clock signal to generate the advanced clock signal. When the compared phase difference is less than Π, the delayed clock signal is non-inverted to be generated as the advanced clock signal.

Abstract: A method of parallel suppression of interference, and corresponding stage and receiver is disclosed according to the invention, parallel suppression of interference is carried out starting from the signals selected by a maximum likelihood criterion based on the calculation of a metric and the search for the smallest possible metric.

Abstract: An M-ary signal constellation within an N-dimensional space is defined, preferably such that each of the M symbols reside upon the surface of an N-dimensional sphere and such that a minimum distance between symbols is maximized. N orthogonal functions are used as the bases for representing the N-dimensional symbols for transmission. Orthogonal functions exhibiting orthogonality in frequency, time and/or space are also described for this purpose. Furthermore, conventional QAM symbol encoding may be used to represent the N-dimensional symbols, thereby facilitating the use of conventional modulation techniques. In this manner, higher dimensional modulation schemes may be realized.

Abstract: A crystal oscillator which configures a voltage controlled oscillator having a variable oscillation frequency is also used as a crystal oscillator of an oscillator for generating a fixed frequency. Control input is integrated by an integrator, a phase of a frequency-divided signal obtained by dividing a fixed clock by a frequency divider is controlled by the integrated value to vary a frequency. Every time a phase-shifting amount at the time becomes to correspond to one clock, a frequency division ratio at dividing the clock is changed from a predetermined frequency division ratio for one time of frequency division to absorb the phase shifting amount for one clock, thereby operating as a voltage controlled oscillator. Thus, the voltage controlled oscillator having the frequency accuracy of a fixed clock is realized.

Abstract: A method and apparatus for frequency tracking is described. The present invention provides a tracking mechanism for removing the effects of error due to frequency offset as well as compensation for frequency error due to doppler in a plurality of multipath signals. Each finger of a RAKE receiver utilizing the present invention will compute a frequency error for that finger. The weighted average of all of these frequency errors is calculated and filtered to provide a control signal for varying the frequency of IF and RF frequency synthesizers, accounting for the common frequency offset seen at each finger. Additionally, each finger is equipped with a rotator for providing frequency adjustment specific to that finger. The frequency of each finger is adjusted through feedback of the frequency error for that finger.

Abstract: In a multivalue modulation type with one pilot symbol inserted for every 3 or more symbols, signal points of each one symbol immediately before and after a pilot symbol are modulated using a modulation type different from that for pilot symbols. In this way, it is possible to suppress deterioration of the accuracy in estimating the reference phase and amount of frequency offset by pilot symbols and improve the bit error rate characteristic in the signal to noise ratio in quasi-coherent detection with symbols whose symbol synchronization is not completely established.

Abstract: An asynchronous digital system, an asynchronous data path circuit, an asynchronous digital signal processing circuit and an asynchronous digital signal processing method, which enables improved processing speed while maintaining high reliability are provided by dividing the overall chip into blocks with a specified area, forming the connection between the blocks by applying thereto a delay insensitive (Dl) model or a quasi delay insensitive (QDI) model, while forming each block by applying thereto a scalable delay insensitive (SDI) model.

Abstract: A synchronous digital communications network incorporating a number of nodes arranged in path protected rings and has two or more timing reference sources. The reference sources each allocated an artificial ranking of unique quality level values and these quality level values are transmitted as a section overhead message to provide a unique identifier for each source. Identification of the source to a node enables that node to be aware of a synchronization signal that has in fact originated from that node so as to prevent the setting up of synchronization loops. In a further embodiment the technique is extended to protection path identification for signals coupled between adjacent rings in a network having ring topology.

Abstract: A small-scale timer assembly includes a PWM signal generator including a selector for selecting one of a plurality of clock sources, a timer for counting based on the selected clock source to deliver an overflow signal, a comparator for comparing the count in the timer against a setting to deliver a coincidence signal, and a signal processor for generating a PWM signal based on the overflow signal and the coincidence signal, and a count controller for counting the number of overflow signals to allow the selector to select another of the clock sources. The PWM signal is used for generating a sinusoidal signal.

Abstract: A non-frequency-hopping node and a method for using such a node to transmit and receive data in a frequency-hopping system are disclosed. In one embodiment, a non-frequency-hopping node interacts with a frequency-hopping spread-spectrum (FHSS) system, which comprises a wireless medium or electromagnetic airwaves, a frequency-hopping node coupled to the wireless medium and an access point coupled to the wireless medium. The non-frequency-hopping node connects to the wireless medium and listens for an active signal generated by the FHSS system on a predetermined frequency channel. Upon detecting the active signal, the non-frequency-hopping node exchanges information with the FHSS system on the predetermined frequency channel.

Abstract: The present invention provides a method and an apparatus for providing a multiple access isochronous network that is capable of accommodating isochronous and asynchronous traffic. In accordance with the present invention, a non-zero thresholding mechanism is utilized at the receivers of the receiver/transmitter pairs communicating over the network to determine whether a given sub-channel is idle, or whether the receive buffer of a receiver operating in the receive mode is to be updated with a binary 0 or a binary 1. Utilizing the non-zero thresholding mechanism allows for the possibility that nothing is being sent over a particular sub-channel during one or more symbol periods. Utilizing the non-zero thresholding mechanism enables asynchronous and isochronous transport to occur on an isochronous framework without the need for stuffing bits onto the channel. Signals received over a sub-channel are demodulated and correlated to generate correlation results.