Abstract: A standalone direct current (DC) power supplying system, which is not connected to commercial power, includes a power conditioner that supplies generated power W2 of a power generator to a DC bus, DC/DC converters that convert a bus voltage Vbs and supply load power (WLa+WLb) to load appliances, bidirectional DC/DC converters that supply a constant DC current from the DC bus to storage batteries or from the storage batteries to the DC bus, and an energy management system. When the generated power W2 exceeds the load power (WLa+WLb), the energy management system causes the converters to supply a constant DC current with a common charging rate to the storage batteries, and when the generated power W2 falls below the load power (WLa+WLb), the energy management system causes the converters to supply a constant DC current with a common discharging rate from the storage batteries to the DC bus.

Abstract: A RF switching arrangement (400) is described including a bias swap circuit (30). The bias swap circuit switches the bias voltage dependent on the state of the RF switch. This improves the performance of the RF switch without requiring charge pump circuitry.

Abstract: A voltage switching circuit selectively transfers voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal. The voltage switching circuit includes a first transistor and a second transistor. The first transistor is formed on a first well on a substrate, and is coupled between the first input terminal and the first output terminal. The second transistor is formed on a second well different from the first well, and is coupled to the second input terminal. In a first mode in which a first voltage applied to the first input terminal is transferred to the first output terminal and the second output terminal, the first transistor is turned on and the second transistor is turned off.

Abstract: A system and method for supplying electric energy to a mining vehicle and a mining vehicle are provided. Electric energy is supplied to the mining vehicle using a system including a bipolar LVDC supply having a certain total voltage. The mining vehicle has at least a first energy unit and a second energy unit. The first energy unit is connected to a part of the certain total voltage and the second energy unit is connected to another part of the certain total voltage.

Abstract: This specification describes a power distribution system comprising a first section that receives power from a first source. The power at the first section is adjusted by a rectifier coupled to a power bus of the first section. The system includes a second section that is separate from the first section and that receives power from a second source. The power at the second section is adjusted by a rectifier coupled to a power bus of the second distribution section. The system includes a swing rectifier connected to each of the first and second sections. The swing rectifier is configured to provide power to the first power bus and to the second power bus and to dynamically adjust the power capacity of the first section that is available to computing loads, and to dynamically adjust the power capacity of the second section that is available to computing loads.

Abstract: A method determines a pin-to-pin delay between clock signals having integrally related frequencies. The method includes generating a delay code corresponding to a delay between a first signal edge of a first clock signal received by a first node of an integrated circuit and a second signal edge of a second clock signal received by a second node of the integrated circuit. The delay code is based on a first time code corresponding to the first signal edge, a second time code corresponding to the second signal edge, a first skew code, a second skew code, and a period of the first clock signal or the second clock signal. The first clock signal has a first frequency, the second clock signal has a second frequency, and the second frequency is integrally related to the first frequency.

Abstract: An example analog signal multiplexer includes two differential input signal ports for receiving a first and a second differential input signals, IN1 and IN2. The multiplexer further includes a differential output signal port with two output terminals OUT+ and OUT?, for outputting a signal based on one or more of the input signals IN1 and IN2. Furthermore, the multiplexer includes a pair of load elements, and an additional differential output signal port that has two output terminals TERM+ and TERM?. The load elements are not coupled directly to the output terminals OUT+ and OUT?, but, rather, are coupled to the output terminals of the additional output signal port, TERM+ and TERM?, enabling a modular approach where multiple instances of the multiplexer may be combined on an “as-needed” basis to realize multiplexing between a larger number of differential inputs that a single multiplexer would allow.

Abstract: Provided is a wireless power transmission device. A wireless power transmission device includes: at least one antenna for wireless power transmission disposed on one side of a magnetic shielding sheet; a support plate having at least one receiving groove formed therein for receiving the antenna for wireless power transmission; and an antenna for wireless communication disposed along a side portion of the support plate.

Abstract: Various embodiments include a switching device for disconnecting a current path in a DC supply system, said current path comprising inductances at the source end and the load end, the switching device comprising: two series-connected switching modules; wherein each of the series-connected switching modules comprises a controllable semiconductor switching element and a series circuit; the series circuit including a resistor and a capacitor connected in parallel to the controllable semiconductor switching element.

Abstract: A device for switching a high-voltage source, comprising: a plurality of switching devices coupled in series starting from a first switching device and ending in a last switching device, said device enabling coupling of said high-voltage source with at least a selected one of said switching devices; a voltage limiter coupled with said switching devices; and a switching time synchronizer; wherein said first switching device is configured to directly receive a control signal for changing a switching state of said device, said first switching device is configured to facilitate a cascaded transition of switching states in successive said switching devices in said series, where said switching time synchronizer is configured to synchronize a time at which transitions to said switching states of successive said switching devices take effect, and said voltage limiter is configured to limit overvoltage conditions to said switching devices during said transitions.

Abstract: Apparatus and method for controlling reactive power. In one embodiment, the apparatus comprises a bidirectional power converter comprising a switched mode cycloconverter for generating AC power having a desired amount of a reactive power component.

Abstract: A single-pole double-throw switch includes switching units which are set between a first port and a second port and between the first port and a third port, respectively, and are configured to perform complementarily. The each switching unit includes an antenna port, a circuit port, a transmission line configured to couple them, and a switching element connected between the transmission line and a ground. The switching element includes a parallel circuit including a transistor and an inductor connected in parallel, and a capacitor connected in series with the parallel circuit. The transmission line has a characteristic impedance different from a impedance seen inside the switching unit from the antenna port and a impedance seen inside the switching unit from the circuit port.

Abstract: The invention provides a dynamic D flip-flop, and a data operation unit, a chip, a hash board and a computing device using the same. The dynamic D flip-flop comprises: an input terminal, an output terminal and at least one clock signal terminal; a first latch unit for transmitting data of the input terminal and latching the data under control of a clock signal; a second latch unit for latching data of the output terminal and inversely transmitting the data latched by the first latch unit under control of a clock signal; and an output driving unit for inverting and outputting the data received from the second latch unit; wherein the second latch unit outputs in high level, low level and high impedance states by means of a single element under control of a clock signal. Therefore, the invention can effectively reduce chip area, power consumption, and logic delay.

Abstract: As disclosed herein, a level shift circuit includes devices that are responsive to an ESD signal for placing those devices in a specific condition in response to the ESD signal indicating an ESD event. In some embodiments, the devices are transistors in current paths that are placed in a condition such that during an ESD event, voltage differentials in the current paths across voltage domain boundaries do not damage the circuitry of the level shift circuit. In some embodiments, some of the same devices that are responsive to the ESD event are also responsive to a signal to that detects the absence of a power supply voltage of one of the domains and places those devices in a condition to disable the level shift circuit if the power supply voltage is not present.

Abstract: The present application discloses a driving device for a power device, which includes a control circuitry configured to receive at least a system switching command and a feedback signal of a power device, and to generate a pull-up strength control signal or a pull-down strength control signal according to the received signals; and a pull-up array and/or a pull-down array, coupled between the control circuitry and the power device, and configured to provide a corresponding pull-up or pull-down strength for the power device according to the pull-up or pull-down strength control signal. The present application also discloses the corresponding electric appliance and power device driving method.

Abstract: A clock product includes a first phase-locked loop circuit including a first frequency divider. The first phase-locked loop circuit is configured to generate a first clock signal tracking a first reference clock signal and a second reference clock signal. The first phase-locked loop circuit is controlled by a first divide value and a first divide value adjustment based on the first reference clock signal. The clock product includes a circuit including a second frequency divider. The circuit is configured to generate a second clock signal based on the first clock signal, a second divide value, and a second divide value adjustment. The second clock signal tracks the second reference clock signal. The second divide value adjustment is based on the first divide value adjustment and opposes the first divide value adjustment.

Abstract: A device includes a first transistor coupled to an input voltage source and to an output voltage node and an amplifier comprising a first input, a second input, and an output. The device also includes a second transistor coupled to the input voltage source and the first input of the amplifier and a third transistor coupled to the second transistor and a ground node. The third transistor includes a control terminal coupled to the output of the amplifier. The device also includes a first voltage-controlled voltage source coupled to a control terminal of the first transistor and a control terminal of the second transistor and a second voltage-controlled voltage source coupled to the first transistor and the second input of the amplifier.

Abstract: A locked-loop circuit includes phase synchronization circuitry to synchronize a DCO clock phase to a reference clock phase. Sampling circuitry sequentially samples the reference clock with each of N sampling clocks having offset phases, a first one of the N sampling clocks comprising a master sampling clock. Edge detection logic accumulates phase information from the multiple sampling clocks and determines, based on the accumulated phase information, whether any of the sampling clocks other than the master sampling clock correspond to edge detection signals that occurred early with respect to a rising edge of the master sampling clock. Index logic generates index values for any of the determined early edge detection signals. The index logic transfers the generated index values to a master phase transfer logic unit. Phase adjust logic adjusts the master clock phase based on a selected one of the generated index values.

Abstract: In an embodiment, a circuit provided by the present invention includes a transistor connected to allow current to flow from a voltage supply to an output port. The circuit further includes a resistance ladder digital-to-analog converter (RDAC) configured to receive a digital input that indicates a voltage scaling factor. The RDAC is further configured to receive an input voltage (VB) at a voltage input port and produce an output voltage (VA). The circuit further includes an amplifier having an output port connected to a gate of the first transistor, an inverting input port receiving the output voltage (VA), and a non-inverting input connected to the output port of the first transistor.

Abstract: A magnetic shielding sheet is provided. The magnetic shielding sheet according to an embodiment of the present invention comprises: a plate-shaped magnetic sheet made of a magnetic material containing a metal component; and a cover member for covering the entire surface of the magnetic sheet so as to prevent the surface of the magnetic sheet from being exposed to the outside.