Abstract: A device includes a first transistor coupled to an input voltage source and to an output voltage node and an amplifier comprising a first input, a second input, and an output. The device also includes a second transistor coupled to the input voltage source and the first input of the amplifier and a third transistor coupled to the second transistor and a ground node. The third transistor includes a control terminal coupled to the output of the amplifier. The device also includes a first voltage-controlled voltage source coupled to a control terminal of the first transistor and a control terminal of the second transistor and a second voltage-controlled voltage source coupled to the first transistor and the second input of the amplifier.

Abstract: A locked-loop circuit includes phase synchronization circuitry to synchronize a DCO clock phase to a reference clock phase. Sampling circuitry sequentially samples the reference clock with each of N sampling clocks having offset phases, a first one of the N sampling clocks comprising a master sampling clock. Edge detection logic accumulates phase information from the multiple sampling clocks and determines, based on the accumulated phase information, whether any of the sampling clocks other than the master sampling clock correspond to edge detection signals that occurred early with respect to a rising edge of the master sampling clock. Index logic generates index values for any of the determined early edge detection signals. The index logic transfers the generated index values to a master phase transfer logic unit. Phase adjust logic adjusts the master clock phase based on a selected one of the generated index values.

Abstract: In an embodiment, a circuit provided by the present invention includes a transistor connected to allow current to flow from a voltage supply to an output port. The circuit further includes a resistance ladder digital-to-analog converter (RDAC) configured to receive a digital input that indicates a voltage scaling factor. The RDAC is further configured to receive an input voltage (VB) at a voltage input port and produce an output voltage (VA). The circuit further includes an amplifier having an output port connected to a gate of the first transistor, an inverting input port receiving the output voltage (VA), and a non-inverting input connected to the output port of the first transistor.

Abstract: A magnetic shielding sheet is provided. The magnetic shielding sheet according to an embodiment of the present invention comprises: a plate-shaped magnetic sheet made of a magnetic material containing a metal component; and a cover member for covering the entire surface of the magnetic sheet so as to prevent the surface of the magnetic sheet from being exposed to the outside.

Abstract: A slew rate control circuit is disclosed. The slew rate control circuit includes an input port to receive an input signal, a transmitter to transmit the input signal to an output port and an impedance control circuit coupled between the transmitter and the output port. The impedance control circuit has an adjustable impedance that is configured to be adjusted during a rise and a fall of the input signal using a trim code and an one shot pulse.

Abstract: A scan flip-flop includes a multiplexer, a first latch, a second latch, an output buffer and a clock buffer. The multiplexer selects one of a data input signal and a scan input signal based on an operation mode. The first latch latches an output of the multiplexer. The second latch latches an output of the first latch. The output buffer generates an output signal based on an output of the second latch. The clock buffer generates a first clock signal and a second clock signal that control operation of the first latch and the second latch. The first latch, the second latch, and the clock buffer are sequentially arranged along a first direction. A first clock line supplying the first clock signal and a second clock line supplying the second clock signal have a cross couple connection.

Abstract: Techniques facilitating dynamic control of ZZ interactions for quantum computing devices. In one example, a quantum coupling device can comprise a biasing component that is operatively coupled to first and second qubits via respective first and second drive lines. The biasing component can facilitate dynamic control of ZZ interactions between the first and second qubits using off-resonant microwave signals applied via the respective first and second drive lines.

Abstract: Embodiments relate to a phase interpolator cell. The phase interpolator cell includes a multiplexer configured to select between a first pull-up network and a second pull-up network. The first pull-up network includes a first pull-up transistor controlled by a first clock signal and is connected between a first input of the multiplexer and a first power supply. The second pull-up network includes a second pull-up transistor controlled by a second clock signal and is connected between a second input of the multiplexer and the first power supply.

Abstract: An electrical energy harvesting system includes at least one variable capacitor, preferably of electro-active polymer, two voltage sources, and a half-bridge network. The voltage sources are arranged in series with an interconnecting node between a first polarity terminal of the first voltage source and a second opposite polarity terminal of the second voltage source. For each variable capacitor the half-bridge network includes a pair of diodes in series with a common node therebetween, connected in parallel with the first voltage source, an inductor connected between the common node and a first terminal of the variable capacitor, a first switch in parallel with the first diode, and a second switch in parallel with the second diode. The second terminal of the variable capacitor is connected to the first polarity terminal of the second voltage source.

Abstract: The present invention relates to a wireless power transfer apparatus. The wireless power transfer apparatus includes: a resonant circuit unit including a plurality of coils and a plurality of capacitor elements respectively connected to the plurality of coils; and a controller configured to calculate individual quality factor of each of the plurality of coils and a total quality factor of the plurality of coils, at a resonant frequency, and calculate whether foreign matter exists on a charging surface, based on the total quality factor and the individual quality factor, at the resonance frequency. Accordingly, foreign matter on the charging surface can be detected more easily.

Abstract: A power transmission device which can increase a frequency change width (frequency dispersion region) while curbing output fluctuations. The power transmission device that wirelessly transmits power to a power receiving device includes an inverter configured to convert a voltage into an alternating current voltage with a drive frequency, a power supply configured to generate the voltage to be supplied to the inverter, a power transmission coil configured to be supplied with the alternating current voltage and generate an alternating current magnetic field, and a voltage changing unit configured to spontaneously change an output voltage of the power supply, wherein the inverter is configured to control the drive frequency in response to a change in the output voltage.

Abstract: A wireless power transmitting and charging system is disclosed. A method for operating a power transmitter of the wireless power transmitting and charging system comprises the steps of: maintaining a ping value table where ping signal conditions are mapped according to the height of a power receiver; recognizing the power receiver by varying a ping signal according to the ping signal conditions recorded in the ping value table; and controlling a charging mode according to a message received from the power receiver.

Abstract: This application relates to a method and apparatus for outputting signals. In one aspect, the apparatus includes a signal control unit configured to generate two or more control signals upon two or more conditions, which respectively correspond to the two or more control signals being satisfied. The apparatus also includes a signal output unit configured to output a final output signal depending on the two or more control signals upon an input signal being inputted into the signal output unit.

Abstract: A current sensor is for determining the level of the current of a conductor of a low-voltage circuit. In an embodiment, it includes a current transformer including a magnetic core. The magnetic core is an annular core having a core inner diameter, a middle diameter and a core outer diameter. The annular core is wound with a secondary winding, including an inner opening with an inner diameter and an outer circumference with an outer diameter. The secondary winding supplies the circuit with electrical energy. The wound annular core is configured such that the difference between the middle diameter as the minuend and the inner diameter as the subtrahend is 0.5 to 0.6 times smaller than the difference between the outer diameter as the minuend and the inner diameter as the subtrahend, to achieve an optimum for supplying energy and determining the level of the current in connection with the circuit.

Abstract: A circuit assembly includes a first signal branch connecting a signal connection to an electrical load via a semiconductor switch and a second signal branch connecting the signal connection to the electrical load via a relay. When a sensor detects a polarity change in an electrical signal within a test time interval, a controller may close the semiconductor switch at a first signal time such that electrical energy is supplied to the electrical load, actuate the relay at a second signal time after the semiconductor switch has been closed, and open the semiconductor switch after the relay has been closed such that electrical energy is supplied to the electrical load solely via the second signal branch.

Abstract: A skew sensor for detecting skew between two input signals is provided. The skew sensor includes at least two skew detectors. The first skew detector receives either a first clock signal or a second clock signal as a first input signal, and the other one of the first clock signal and the second clock signal delayed by a first delay difference induced by one or more delay elements as a second input signal. The second skew detector receives either the first clock signal or the second clock signal as the first input signal, and the other one of the first clock signal and the second clock signal optionally delayed by a second delay difference induced by one more delay elements, wherein the second delay difference is different from the first delay difference, as the second input signal. Skew is measured between the first clock signal and the second clock signal.

Abstract: In a delay control circuit having a plurality of series-coupled delay stages, an input signal is routed through one of the series-coupled delay stages via a first delay element if a first delay control value is in a first state, the first delay element imposing a first signal propagation delay according to a first bias signal. If the delay control value is in a second state, the input signal is routed through the one of the series-coupled delay stages via a second delay element instead of the first delay element, the second delay element imposing a second signal propagation delay according to a second bias signal. The first and second bias signals are calibrated such that the second signal propagation delay exceeds the first propagation delay by a predetermined time interval that is substantially briefer than the first signal propagation delay.

Abstract: A system resets leakage states of a superconducting qubit to a qubit subspace by using a dedicated electrical circuit on a timescale faster than a natural decay process. One system comprises a qubit including a qubit transition frequency and multiple qubit leakage transition frequencies; and a filter circuit coupled to the qubit for leakage mitigation based on the qubit frequency and the multiple qubit leakage transition frequencies, wherein the filter circuit causes dissipation at the leakage transition frequencies while isolating the qubit transition frequency. Another system comprises a qubit including a qubit transition frequency and multiple qubit leakage transition frequencies; and a tunable dissipative cavity circuit coupled to the qubit for leakage mitigation based on the qubit frequency and the multiple qubit leakage transition frequencies, wherein the tunable dissipative cavity circuit causes the leakage transition frequencies to dissipate while isolating the qubit transition frequency.

Abstract: An electronic circuit and method are provided. The electronic circuit includes an in-phase (I)-quadrature (Q) amplifier including an I cascode branch and a Q cascode branch, the IQ amplifier configured to receive a differential input and control signals, control, based on the control signals, gate voltages in the I cascode branch and gate voltages in the Q cascode branch, generate an I output signal with the I cascode branch, and generate a Q output signal with the Q cascode branch, and a quadrature coupler configured to perform quadrature summation of the I output signal and the Q output signal and generate a final phase shifted output.

Abstract: A wireless-power-transmission-system includes a bridge with a tank-capacitor coupled thereto, a sense-resistor coupled between the bridge and an input of a regulator, a switching-circuit having first and second inputs coupled across the sense-resistor, and a gain-stage having first and second inputs capacitively coupled to first and second outputs of the switching-circuit. An ADC digitizes output of the gain-stage by comparing the output to a reference voltage, and a temperature-independent current source is coupled to a reference-resistor to generate the reference voltage. In a reset-phase, the switching-circuit shorts the inputs of the gain-stage to one another, and the gain-stage shorts its inputs to its output. The switching-circuit, in a first-chopping-phase, couples the sense-resistor between the first and second inputs of the gain-stage, and in a second-chopping-phase, couples the sense-resistor in reverse between the second and first inputs of the gain-stage.