Patents Examined by Long Le
  • Patent number: 9161049
    Abstract: The invention provides a system and method for decoding and deblocking a video frame having a plurality of macroblocks. The system of the invention comprises a decoder configured to decode the macroblocks, a deblock configured to deblock the macroblocks, and a deblock buffer comprising a plurality of counters corresponding to the plurality of macroblocks respectively. Each counter corresponds to a macroblock group comprising a predetermined amount of neighboring macroblocks. In response to a counter is incremented to a fixed value, the macroblock group corresponds to the counter is deblocked.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: October 13, 2015
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Lien-Hsiang Sung
  • Patent number: 9159648
    Abstract: A wiring substrate includes: a core substrate made of glass and having: a first surface; a second surface opposite to the first surface; and a side surface between the first surface and the second surface; and an insulating layer and a wiring layer, which are formed on at least one of the first surface and the second surface of the core substrate. A plurality of concave portions are formed in the side surface of the core substrate to extend from the first surface to the second surface, and a resin is filled in the respective concave portions.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: October 13, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Naoyuki Koizumi, Jun Furuichi, Yasuyoshi Horikawa
  • Patent number: 9153455
    Abstract: Methods of forming semiconductor devices, memory cells, and arrays of memory cells include forming a liner on a conductive material and exposing the liner to a radical oxidation process to densify the liner. The densified liner may protect the conductive material from substantial degradation or damage during a subsequent patterning process. A semiconductor device structure, according to embodiments of the disclosure, includes features extending from a substrate and spaced by a trench exposing a portion of a substrate. A liner is disposed on sidewalls of a region of at least one conductive material in each feature. A semiconductor device, according to embodiments of the disclosure, includes memory cells, each comprising a control gate region and a capping region with substantially aligning sidewalls and a charge structure under the control gate region.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 6, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Christopher J. Larsen, David A. Daycock, Kunal Shrotri
  • Patent number: 9142540
    Abstract: A semiconductor device includes a substrate, a gate positioned on the substrate, a drain and a source formed in the substrate at respective two sides of the gate, and a doped region formed in the source. The drain and the source comprise a first conductivity type and the doped region comprises a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: September 22, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ning He, Lu-An Chen, Tien-Hao Tang
  • Patent number: 9140545
    Abstract: Early techniques for object inspection relied on human inspectors to visually examine objects for defects. However, automated object inspection techniques were subsequently developed due to the labor intensive and subjective nature of human operated inspections. Additionally, object characteristics such as object power and object thickness need to be determined after the objects have been examined for defects. Conventionally, corresponding inspection stations are along the manufacturing lines for determining each of the object characteristics. However, the need for human intervention and time spent to move the objects from one inspection station to another adversely affect the efficiency of the object manufacturing process. An embodiment of the invention disclosed describes a high-resolution object inspection system for performing object inspection.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: September 22, 2015
    Assignee: VISIONXTREME PTE LTD
    Inventors: Victor Vertoprakhov, Tian Poh Yew
  • Patent number: 9142681
    Abstract: A metal oxide layer is in contact with an interlayer insulating layer covering a transistor, and has a stacked-layer structure including a first metal oxide layer having an amorphous structure and a second metal oxide layer having a polycrystalline structure. In the first metal oxide layer, there are no crystal grain boundaries, and grid intervals are wide as compared to those in a metal oxide layer in a crystalline state; thus, the first metal oxide layer easily traps moisture between the lattices. In the second metal oxide layer having a polycrystalline structure, crystal parts other than crystal grain boundary portions have dense structures and extremely low moisture permeability. Thus, the structure in which the metal oxide layer including the first metal oxide layer and the second metal oxide layer is in contact with the interlayer insulating layer can effectively prevent moisture permeation into the transistor.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: September 22, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiro Watanabe, Mitsuo Mashiyama, Takuya Handa, Kenichi Okazaki
  • Patent number: 9111870
    Abstract: Microelectronic packages and methods for fabricating microelectronic packages are provided. In one embodiment, the method includes encapsulating a device stack within a molded panel having a frontside and a backside. The device stack contains an upper semiconductor die and an interconnect buffer layer, which is formed over the upper semiconductor die and which is covered by the frontside of the molded panel. Material is removed from the frontside the molded panel to expose the interconnect buffer layer therethrough. One or more frontside redistribution layers are produced over the frontside of the molded panel and electrically coupled to the upper semiconductor die through the interconnect buffer layer. The molded panel is then singulated to yield a microelectronic package including a molded package body containing the device stack.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: August 18, 2015
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventor: Michael B. Vincent
  • Patent number: 9099523
    Abstract: A semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the buried layer. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the buried layer.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: August 4, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Akram A. Salman, Farzan Farbiz, Amitava Chatterjee, Xiaoju Wu
  • Patent number: 9100598
    Abstract: An imaging apparatus includes: an imaging unit for capturing an image of a fluorescent sample; a pixel shift unit for changing the relative position of the imaging unit for the image; an image correction unit for correcting the gray-scale levels of plural pieces of image data using the histograms of the image data acquired by the imaging unit at different relative positions; and an image combination unit for combining the plural pieces of image data corrected by the image correction unit.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: August 4, 2015
    Assignee: OLYMPUS CORPORATION
    Inventors: Shigeto Kaminaga, Shinichiro Aizaki
  • Patent number: 9063180
    Abstract: A device includes an electromagnetic field sensor which detects an intensity of an electromagnetic field; and a single video camera which captures video of space in which the electromagnetic field sensor is included. A determining unit is configured to determine at least a two-dimensional location of the electromagnetic field sensor by analyzing the video captured by the video camera; and a visualizing unit is configured to visualize the space distribution of the electromagnetic field, based on the intensity of the electromagnetic field detected by the electromagnetic field sensor and the two-dimensional location determined by the determining unit.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: June 23, 2015
    Assignee: KANAZAWA UNIVERSITY
    Inventor: Satoshi Yagitani
  • Patent number: 9053982
    Abstract: A cluster of semiconductor fins is formed on an insulator layer. A masking material layer is formed over the array of semiconductor fins such that spaces between adjacent semiconductor fins are filled with the masking material layer. A photoresist layer is applied over the masking material layer, and is lithographically patterned. The masking material layer is etched to physically expose a sidewall surface of a portion of an outermost semiconductor fin in regions not covered by the photoresist layer. A recessed region is formed in the insulator layer such that an edge of the recessed region is formed within an area from which a portion of the semiconductor fin is removed. The photoresist layer and the masking material layer are removed. Within the cluster, a region is provided that has a lesser number of semiconductor fins than another region in which semiconductor fins are not etched.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: June 9, 2015
    Assignee: International Business Machines Corporation
    Inventors: Markus Brink, Josephine B. Chang, Michael A. Guillorn, HsinYu Tsai
  • Patent number: 9035364
    Abstract: An active device and a fabricating method thereof are provided. The active device includes a buffer layer, a channel, a gate, a gate insulation layer, a source and a drain. The buffer layer is disposed on a substrate and has a positioning region. A thickness of a portion of the buffer layer in the positioning region is greater than a thickness of a portion of the buffer layer outside the positioning region. The channel is disposed on the buffer layer and in the positioning region. The gate is disposed above the channel. The gate insulation layer is disposed between the channel and the gate. The source and the drain are disposed above the channel and electrically connected to the channel.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: May 19, 2015
    Assignee: Au Optronics Corporation
    Inventors: Chih-Pang Chang, Hsing-Hung Hsieh
  • Patent number: 9030533
    Abstract: Adjusting overlay positioning in stereoscopic video, including: receiving overlay data including a plurality of overlays, each overlay having a lateral axis value, a vertical axis value, and a depth value; receiving and displaying the stereoscopic video to a user as at least one of a video preview display and a stereoscopic display, each display including an overlay from the overlay data, wherein a position of the overlay in each display is based on the lateral axis value, the vertical axis value, and the depth value of the overlay, and wherein the video preview display includes interfaces for adjusting the position of the overlay in each display; receiving input from the user related to the depth value of the overlay; and adjusting the position of the overlay in the video preview display based on the input from the user.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: May 12, 2015
    Assignees: Sony Corporation, Sony Corporation of America, Sony Pictures Entertainment Inc.
    Inventors: Robert Aubey, Jr., Peter Avventi, Dennis Adams, Yoshikazu Takashima, John Ying, Tommy Choy, George Reis, Michael Thompson, Kiruthika Krishnadevarajan, Don C. Eklund, II
  • Patent number: 9030537
    Abstract: An image display apparatus includes a signal control unit for receiving an input of an image signal, and converting to a signal for displaying each of a right eye image and a left eye image at least two times continuously; and a display panel, input with the signal converted by the signal control unit, for alternately displaying the right eye image continuing two or more times, and the left eye image continuing two or more times.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: May 12, 2015
    Assignee: Sony Corporation
    Inventors: Yuji Nakahata, Tsuyoshi Kamada, Toshiaki Suzuki, Makoto Nakagawa
  • Patent number: 9013043
    Abstract: A semiconductor element includes: a transparent substrate; a stack structure formed on the transparent substrate and having a metal oxide layer partially exposed through sidewalls of the stack structure; a plurality of leads spacingly formed on the stack structure and extending to the sidewalls of the stack structure; an insulating film covering the exposed portions of the metal oxide layer; a metal film formed on the leads; and a solder mask layer disposed on the metal film, the stack structure and the insulating film. As such, the insulating film prevents short circuits from occurring between adjacent leads so as to improve the product yield.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: April 21, 2015
    Assignee: Xintec Inc.
    Inventor: Hung-Chang Chen
  • Patent number: 9001197
    Abstract: This document discusses a stereoscopic image display device. In the stereoscopic image display device, a display device displays first image data during an Nth (where N is a positive integer) frame period and displays second image data during an (N+1)th frame period. A polarization conversion device converts light which is output from the display device into first polarized light in response to a first driving voltage during the Nth frame period and converts light which is output from the display device into a second polarized light in response to a second driving voltage during the (N+1)th frame period. The phase of a point of time at which scanning of at least one of the first and second image data starts is differently synchronized with the phase of a point of time at which scanning of at least one of the first and second driving voltage starts.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: April 7, 2015
    Assignee: LG Display Co., Ltd.
    Inventor: Sungmin Jung
  • Patent number: 8993373
    Abstract: Methods of doping a solar cell, particularly a point contact solar cell, are disclosed. One surface of a solar cell may require portions to be n-doped, while other portions are p-doped. At least one lithography step can be eliminated by the use of a blanket doping of species having one conductivity and a patterned counterdoping process of species having the opposite conductivity. The areas doped during the patterned implant receive a sufficient dose so as to completely reverse the effect of the blanket doping and achieve a conductivity that is opposite the blanket doping. In some embodiments, counterdoped lines are also used to reduce lateral series resistance of the majority carriers.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: March 31, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Nicholas Bateman, John Graff
  • Patent number: 8994115
    Abstract: A semiconductor structure for facilitating an integration of power devices on a common substrate includes a first insulating layer formed on the substrate and an active region having a first conductivity type formed on at least a portion of the first insulating layer. A first terminal is formed on an upper surface of the structure and electrically connects with at least one other region having the first conductivity type formed in the active region. A buried well having a second conductivity type is formed in the active region and is coupled with a second terminal formed on the upper surface of the structure. The buried well and the active region form a clamping diode which positions a breakdown avalanche region between the buried well and the first terminal. A breakdown voltage of at least one of the power devices is a function of characteristics of the buried well.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: March 31, 2015
    Assignee: Silanna Semiconductor U.S.A., Inc.
    Inventors: Jacek Korec, Boyi Yang
  • Patent number: 8969980
    Abstract: A micro-electromechanical system (MEMS) device includes a housing and a base. The base includes a port opening extending therethrough and the port opening communicates with the external environment. The MEMS die is disposed on the base and over the opening. The MEMS die includes a diaphragm and a back plate and the MEMS die, the base, and the housing form a back volume. At least one vent extends through the MEMS die and not through the diaphragm. The at least one vent communicates with the back volume and the port opening and is configured to allow venting between the back volume and the external environment.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: March 3, 2015
    Assignee: Knowles Electronics, LLC
    Inventor: Sung Bok Lee
  • Patent number: 8964004
    Abstract: A system for providing a three-dimensional representation from a single image includes a reflector apparatus for providing an image of a scene comprising three adjacent views of the scene. The apparatus defines a left light path, a center light path, and a right light path, wherein each of the left light path and the right light path comprise opposed reflective surfaces for redirecting light, whereby light passing through the left light path, light passing through the right light path, and light passing through the center light path converge at a nodal point of an imager to create an image of the scene providing three adjacent views of the scene arrayed in a three-by-one rectangular grid. A client computing device receives data from the imager and transforms the data into a stereoscopic image or an image-plus-depth rendering, and/or converts or switches back and forth between two-dimensional and three-dimensional images.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: February 24, 2015
    Assignee: Amchael Visual Technology Corporation
    Inventor: Fuhua Cheng