Abstract: A semiconductor device having strain material is disclosed. In a particular embodiment, the semiconductor device includes a first cell including a first gate between a first drain and a first source. The semiconductor device also includes a second cell adjacent to the first cell. The second cell includes a second gate between a second drain and a second source. The semiconductor device further includes a shallow trench isolation area between the first source and the second source. A first amount of strain material over the first source and over the second source is greater than a second amount of strain material over the first drain and over the second drain.
Abstract: Methods and systems for masking audio noise are disclosed. One apparatus includes a silence detector configured to detect a period of substantial silence in an audio signal; a masking noise source operably coupled to the silence detector, the masking noise source configured to generate a noise signal in response to the silence detector detecting the period of substantial silence; and at least one combining device operably coupled to the masking noise source, the at least one combining device configured to contribute to combining the audio signal and the noise signal. A method includes detecting a period of substantial silence in an audio signal; and combining masking noise with the audio signal during the period of substantial silence.
Abstract: The present invention discloses a high-reflectivity and low-defect density LED structure. A patterned dielectric layer is embedded in a sapphire substrate via semiconductor processes, such as etching and deposition. The dielectric layer is formed of two materials which are alternately stacked and have different refractive indexes. An N-type semiconductor layer, an activation layer and a light emitting layer which is a P-type semiconductor layer are sequentially formed on the sapphire substrate. An N-type electrode and a P-type electrode are respectively coated on the N-type semiconductor layer and the P-type semiconductor layer. The dielectric layer can lower the defect density of the light emitting layer during the epitaxial growth process. Further, the dielectric layer can function as a high-reflectivity area to reflect light generated by the light emitting layer and the light is projected downward to be emitted from the top or the lateral. Thereby is greatly increased the light-extraction efficiency.
Abstract: An optical element package includes: an optical element in a form of a chip, and a lens resin having a convex lens surface covering an optical functional surface of the optical element. The convex lens surface is formed as a rough surface having a plurality of minute convex curved surfaces having a vertex in a direction perpendicular to a plane in contact with each part of the convex lens surface.
Abstract: An interconnect includes an elastic body, an electric conductor and a spacer. The elastic body has a first surface, a second surface, a first hole extending from the first surface to the second surface, and a second hole extending from the first surface to the second surface. The electric conductor is disposed in the first hole of the insulating body for contacting one of a plurality of balls of the first integrated circuit package and one of a plurality of conductor pads of the second integrated circuit package. The electric conductor includes an elastic body and electric conductor particles disbursed in the elastic body. The spacer is disposed in the second hole.
Abstract: An integrated electronic circuit has a thin layer portion based on hafnium oxide. This portion additionally contains magnesium atoms, so that the portion is in the form of a hafnium-and-magnesium mixed oxide. Such a portion has a high dielectric constant and a very low leakage current. It is particularly suitable for forming a part of a gate insulation layer of a MOS transistor or a part of a MIM capacitor dielectric.
Type:
Grant
Filed:
April 25, 2008
Date of Patent:
April 10, 2012
Assignees:
Centre National de la Recherche Scientifique-CNRS, Institut National Polytechnique de Grenoble
Abstract: MEMS structures that include silicon carbide micromechanical components, as well as methods of forming and using the same, are provided. The silicon carbide micromechanical components may be integrated on the same structure with electronic components that control or detect movement of the micromechanical components. MEMS structures of the invention may be used in a variety of applications including microsensor and microactuator applications.
Abstract: A nonvolatile semiconductor apparatus of the present invention comprises (103), a second electrode (105), and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), a resistance value of the resistance variable layer being switchable reversibly in response to an electric signal applied between the electrodes (103), (105), wherein the resistance variable layer (104) comprises an oxide containing tantalum and nitrogen.
Abstract: Provided are a three-dimensional semiconductor device and a method of operating the same. The three-dimensional semiconductor device includes: a plurality of word line structures on a substrate; active semiconductor patterns between the plurality of word line structures; and information storage elements between the plurality of word line structures and the active semiconductor patterns. Each of the plurality of word line structures includes a plurality of word lines spaced apart from each other and stacked, and the active semiconductor patterns include electrode regions and channel regions, the electrode regions and the channel regions having different conductive types and being alternately arranged.
Abstract: An efficient long-wavelength light-emitting diode has a resonant-cavity design. The light-emitting diode preferably has self-organized (In,Ga)As or (In,Ga)(As,N) quantum dots in the light-emitting active region, deposited on a GaAs substrate. The light-emitting diode is capable of emitting in a long-wavelength spectral range of preferably 1.15-1.35 ?m. The light-emitting diode also has a high efficiency of preferably at least 6 mW and more preferably at least 8 mW at an operating current of less than 100 mA and a low operating voltage of preferably less than 3V. In addition, the light-emitting diode preferably has an intensity of maxima, other than the main maximum of the emission spectrum, of less than 1% of an intensity of the main maximum. This combination of parameters makes such a device useful as an inexpensive optical source for various applications.
Type:
Grant
Filed:
November 18, 2009
Date of Patent:
April 3, 2012
Assignee:
Innolume GmbH
Inventors:
Alexey Kovsh, Igor Krestnikov, Sergey Mikhrin, Daniil Livshits
Abstract: A memory cell of a non-volatile memory device, comprises: a select transistor gate of a select transistor on a substrate, the select transistor gate comprising: a gate dielectric pattern; and a select gate on the gate dielectric pattern; first and second memory cell transistor gates of first and second memory cell transistors on the substrate at opposite sides of the select transistor, each of the first and second memory cell transistor gates comprising: a tunnel insulating layer pattern; a charge storage layer pattern on the tunnel insulating layer pattern; a blocking insulating layer pattern on the charge storage layer pattern; and a control gate on the blocking insulating layer pattern; first and second floating junction regions in the substrate between the select transistor gate and the first and second memory cell transistor gates respectively; and first and second drain regions in the substrate at sides of the first and second memory cell transistor gates respectively opposite the first and second float
Abstract: A display panel including a first substrate, a second substrate opposite to the first substrate and a display medium between the first substrate and the second substrate is provided. The first substrate has a scan line, a data line and an active device electrically connected to the scan line and the data line. The second substrate has a common electrode layer, an insulting layer covering the common electrode layer, a pixel electrode on the insulating layer and a contact structure on the insulating layer. More specifically, the contact structure is electrically connected to the pixel structure and electrically connected to the active device on the first substrate.
Type:
Grant
Filed:
August 18, 2010
Date of Patent:
March 27, 2012
Assignee:
Au Optronics Corporation
Inventors:
Tsung-Chin Cheng, Zeng-De Chen, Seok-Lyul Lee
Abstract: A method of depositing a film of a metal chalcogenide including the steps of: contacting an isolated hydrazinium-based precursor of a metal chalcogenide and a solvent having therein a solubilizing additive to form a solution of a complex thereof; applying the solution of the complex onto a substrate to produce a coating of the solution on the substrate; removing the solvent from the coating to produce a film of the complex on the substrate; and thereafter annealing the film of the complex to produce a metal chalcogenide film on the substrate. Also provided is a process for preparing an isolated hydrazinium-based precursor of a metal chalcogenide as well as a thin-film field-effect transistor device using the metal chalcogenides as the channel layer.
Type:
Grant
Filed:
August 27, 2009
Date of Patent:
March 13, 2012
Assignee:
International Business Machines Corporation
Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.
Abstract: In a gate driver of a display device, a plurality of first stages each transmit a first gate signal having a first gate-on voltage to first gate lines, and a plurality of second stages each transmit a second gate signal having a second gate-on voltage to second gate lines and output a carry signal corresponding to the second gate signal. Each first stage outputs the first gate-on voltage based on a third gate-on voltage of the carry signal from a previous second stage, and each second stage outputs the second gate-on voltage based on the third gate-on voltage of the carry signal from the previous second stage.
Type:
Grant
Filed:
May 28, 2008
Date of Patent:
March 13, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sung-Man Kim, Bong-Jun Lee, Hong-Woo Lee
Abstract: This disclosure describes techniques of automatically identifying a direction of a speech source relative to an array of directional microphones using audio streams from some or all of the directional microphones. Whether the direction of the speech source is identified using audio streams from some of the directional microphones or from all of the directional microphones depends on whether using audio streams from a subgroup of the directional microphones or using audio streams from all of the directional microphones is more likely to correctly identify the direction of the speech source. Switching between using audio streams from some of the directional microphones and using audio streams from all of the directional microphones may occur automatically to best identify the direction of the speech source. A display screen at a remote venue may then display images having angles of view that are centered generally in the direction of the speech source.
Abstract: A packaging assembly (30), such as a ball grid array package, is formed which distributes power across an interior region of an integrated circuit die (52) by using an encapsulated patterned leadframe conductor (59) that is disposed over the die (52) and bonded to a plurality of bonding pads (45) formed in a BGA carrier substrate (42) and in the interior die region, thereby electrically coupling the interior die region to an externally provided reference voltage.
Type:
Grant
Filed:
May 10, 2007
Date of Patent:
March 6, 2012
Assignee:
Freescale Semiconductor, Inc.
Inventors:
James P. Johnston, Chu-Chung Lee, Tu-Anh N. Tran, James W. Miller, Kevin J. Hess
Abstract: A phase change material including a high adhesion phase change material formed on a dielectric material and a low adhesion phase change material formed on the high adhesion phase change material. The high adhesion phase change material includes a greater amount of at least one of nitrogen and oxygen than the low adhesion phase change material. The phase change material is produced by forming a first chalcogenide compound material including an amount of at least one of nitrogen and oxygen on the dielectric material and forming a second chalcogenide compound including a lower percentage of at least one of nitrogen and oxygen on the first chalcogenide compound material. A phase change random access memory device, and a semiconductor structure are also disclosed.