Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.

Abstract: A lateral double diffused metal oxide semiconductor (LDMOS) device and a method of manufacturing the same. A LDMOS device may include a high voltage well formed over a substrate, a reduced surface field region formed thereover which may be adjacent a body region, and/or an isolation layer. An isolation layer may include a predetermined area formed over a reduced surface field region, may be partially overlapped with a top surface of a substrate and/or may include an area formed adjacent a high voltage well. A low voltage well may be formed over a substrate. A gate electrode may extend from a predetermined top surface of a body region to a predetermined top surface of an isolation layer. A drain region may be formed over a low voltage well. A source region may be formed over a body region and may have at least a portion formed under a gate electrode.

Abstract: The invention relates to a method for producing semiconductor components, wherein a layer composite (6) containing a semiconductor material is formed on a growth substrate (1), a flexible carrier layer is applied to the layer composite (6), the flexible carrier layer is cured to form a self-supporting carrier layer (2), and the growth substrate (1) is stripped away. As an alternative, the carrier layer (2) may have a base layer (2b) and an adhesion layer (2a) adhering on the layer composite.

Abstract: An exemplary LCD includes a frame memory configured for receiving a plurality of first gradations of current frame and outputting a plurality of second gradations of preceding frame pre-stored therein; a comparator configured for receiving, comparing the first gradations with the second gradation to generate a comparison result; a luminance detector configured for detecting a luminance degree of each of pixel according to the gradations of current frame; a calculator configured for calculating a complication degree of a picture to be displayed in current frame; and a gradation processor configured for receiving the first gradations of current frame to be displayed on the LCD panel, generating a plurality of pairs of compensating gradations according to the gradation of each pixel, and selecting one pair of the compensating gradations to be outputted to the LCD panel according to a received comparison result, a received luminance degree, and a received complication degree.

Abstract: The liquid crystal display device of this invention includes a plurality of picture element regions each defined by a first electrode provided on a face of a first substrate facing a liquid crystal layer and a second electrode provided on a second substrate so as to oppose the first electrode via the liquid crystal layer sandwiched therebetween. In each of the picture element regions, the first electrode has a plurality of openings and a solid portion, the liquid crystal layer is in a vertical orientation state when no voltage is applied between the first electrode and the second electrode, and when a voltage is applied between the first electrode and the second electrode, a plurality of liquid crystal domains each in a radially-inclined orientation state are respectively formed in the plurality of openings and the solid portion by inclined electrode fields generated at respective edge portions of the openings of the first electrode.

Abstract: A method of depositing a film of a metal chalcogenide including the steps of: contacting an isolated hydrazinium-based precursor of a metal chalcogenide and a solvent having therein a solubilizing additive to form a solution of a complex thereof; applying the solution of the complex onto a substrate to produce a coating of the solution on the substrate; removing the solvent from the coating to produce a film of the complex on the substrate; and thereafter annealing the film of the complex to produce a metal chalcogenide film on the substrate. Also provided is a process for preparing an isolated hydrazinium-based precursor of a metal chalcogenide as well as a thin-film field-effect transistor device using the metal chalcogenides as the channel layer.

Abstract: A display device includes first and second substrates, and first and second alignment keys. The first and second substrates have first and second display regions and first and second peripheral regions, respectively. The first alignment key is disposed in the first peripheral region of the first substrate. The first alignment key includes a first pattern and a second pattern. The second alignment key is disposed in the second peripheral region of the second substrate such that the second alignment key faces the first alignment key. As a result, first alignment key may be formed through a procedure of forming the pixel electrode. Therefore, there exists no deviation between the first alignment key and the pixel electrode and the first alignment key may be easily detected because of the first pattern that is opaque, so that misalignment is prevented.

Abstract: A method of driving a display device includes outputting an upper data signal array of a (n+1)th frame to an upper display area of a display panel during a first frame period; and, outputting a lower data signal array of a nth frame to a lower display area of the display panel during the first frame period is provided. The display panel has at least an upper display area and a lower display area which may be independently operable, the display areas communicating with a memory device storing and outputting a signal data array of a (n+1)th frame to an upper display area of a display panel during a first frame period; and, outputting a lower data signal array of a nth frame to a lower display area of the display panel during the first frame period.

Abstract: A display apparatus includes a spatial light modulator and an illumination unit for supplying light to the spatial light modulator. The power consumed by the illumination unit is reduced by adjusting both the intensity of light emitted by the illumination unit and video words that are supplied to the spatial light modulator in accordance with what is to be displayed.

Abstract: A planar transformer structure, which can be constructed in an integrated semiconductor circuit without using traditional metallic windings. To avoid large thermal expansion of metallic spiral windings and associated mechanical stress on a metal-semiconductor interface, it is suggested that highly doped semiconductor materials with or without silicides and salicides can be used to form windings or conducting paths because their thermal expansion coefficients are similar to that of semiconductor material. The planar semiconductor transformer may find application for low-power and signal transfer that needs electrical isolation.

Abstract: A process for connecting two bodies forming parts of an electromechanical, fluid and optical microsystem, wherein a welding region is formed on a first body; an electrically conductive region and a spacing region are formed on a second body; the spacing region extends near the electrically conductive region and has a height smaller than the electrically conductive region. One of the first and second bodies is turned upside down on the other, and the two bodies are welded together by causing the electrically conductive region to melt so that it adheres to the welding region and collapses until its height becomes equal to that of the spacing region. Thereby it is possible to seal active parts or micromechanical structures with respect to the outside world, self-align the two bodies during bonding, obtain an electrical connection between the two bodies, and optically align two optical structures formed on the two bodies.

Abstract: An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.

Abstract: Nanotube and graphene transducers are disclosed. A transducer according to the present invention can include a substrate, a plurality of semiconductive structures, one or more metal pads, and a circuit. The semiconductive structures can be nanotubes or graphene located entirely on a surface of the substrate, such that each of the semiconductive structures is supported along its entire length by the substrate. An electrical property of the semiconductive structures can change when a force is applied to the substrate. The metal pads can secure at least one of the semiconductive structures to the substrate. The circuit can be coupled to at least some of the semiconductive structures to provide an output responsive to the change in the electrical property of the semiconductive structures, so as to indicate the applied force.

Abstract: A sealing apparatus for sealing by resin a semiconductor wafer having semiconductor elements on its surface. The apparatus includes an upper mold and a tower mold having an area where the semiconductor wafer is mounted, the lower mold having an uneven surface in the area and a shock absorber under the lower mold.

Abstract: One embodiment of the present invention provides a method for fabricating a high-power light-emitting diode (LED). The method includes etching grooves on a growth substrate, thereby forming mesas on the growth substrate. The method further includes fabricating indium gallium aluminum nitride (InGaAlN)-based LED multilayer structures on the mesas on the growth substrate, wherein a respective mesa supports a separate LED structure. In addition, the method includes bonding the multilayer structures to a conductive substrate. The method also includes removing the growth substrate. Furthermore, the method includes depositing a passivation layer and an electrode layer above the InGaAlN multilayer structures, wherein the passivation layer covers the sidewalls and bottom of the grooves.

Abstract: A semiconductor integrated circuit device including a dummy via is disclosed. In the semiconductor integrated circuit device, problems such as reduction in the designability and increase in fabrication cost which result from the existence of a dummy wire connected to the dummy via are suppressed. The semiconductor integrated circuit device includes a substrate and three or more wiring layers formed on the substrate. The dummy via connects between a first wiring layer and a second wiring layer. The dummy wire connected to the dummy via exists in the second wiring layer. A protrusion amount of the dummy wire is smaller than a protrusion amount of an intermediate wire included in a stacked via structure.

Abstract: In an organic light emitting display, a first pixel and a second pixel share a data line, a select scan line, and a driving element, and a field is divided into first and second subfields. An organic light emitting element of the first pixel is driven by a first emission control signal transmitted to a first emit scan line, and an organic light emitting element of the first pixel is driven by a second emission control signal transmitted to a second emit scan line. The first emission control signal has a low-level pulse in the first subfield, the second emission control signal has a low-level pulse in the second subfield, and a select signal transmitted to the select scan line has a low-level pulse in each of the first and second subfields. In addition, a scan driver for driving the select signal line, the first emit scan line, and the second emit scan line is provided.

Abstract: The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can include exposure of a semiconductor material to steam and H2, with the H2 being present to a concentration of from about 2% to about 40%, by volume. An oxide structure formed under the bottom corner of a transistor gate stack can have a bottom surface with a topography that includes a step of at least about 50 ?, and an upper surface directly over the bottom surface and having a topography that is substantially planar. Methodology of the present invention can be utilized to form semiconductor constructions suitable for incorporation into highly integrated circuitry. The highly integrated circuitry can be incorporated into electronic systems, and can, for example, be utilized in processors and/or memory storage devices.

Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include diketonate ligands and/or ketoimine ligands.

Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.