Patents Examined by Lonnie A. Knox
  • Patent number: 5995731
    Abstract: Multiple memory arrays (215, 225) in embedded applications are each tightly coupled to their own Built-In Self-Test (BIST) controller to form BISTed memory cells (210, 220) supporting structural and retention testing. Testing on multiple BISTed memories (210, 220) is initiated by common INVOKE (230), RETENTION (240), and RELEASE (250) signals. DONE and HOLD signals are combined (260, 280) from the multiple BISTed memories (210, 220) and delayed to generate a global "all memory" DONE (265) and HOLD (285) signals. FAIL signals are combined (270) from the multiple BISTed memories (210, 220) to generate a global "any memory" FAIL (275) signal. The BISTed memories can be combined in multiple stages to meet power limitations.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: November 30, 1999
    Assignee: Motorola, Inc.
    Inventors: Alfred Larry Crouch, Jennifer Lynn McKeown, Clark Gilson Shepard
  • Patent number: 5991528
    Abstract: An expert manufacturing system generates a manufacturing plan for producing a part in an automated manufacturing system. The expert manufacturing system generates a multipurpose manufacturing geometry definitions file. The expert manufacturing system includes a rule-based expert system which uses the manufacturing geometry definitions file to generate the manufacturing plan in the form of a neutral source code file. The neutral source code is converted to machine-specific program code directly executable by a device controller, such as a logic controller or motion controller. The expert manufacturing system also includes a parametric drawing generation program for generating drawing of the part, and a computer simulation program for simulating the manufacturing plan for producing the part.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: November 23, 1999
    Assignee: Reliance Electric Industrial Company
    Inventors: Jay A. Taylor, Dennis R. Swift, Gerard L. Zychowski, Dennis R. Thompson, William A. Kramer
  • Patent number: 5991522
    Abstract: Circuit data for a digital/analog hybrid circuit is classified as those for types of data such as a net, a circuit symbol, a symbol pin, and an outside terminal. A conversion rule for each type of classified circuit data is specified by a conversion rule collator. Classified circuit data is converted by a circuit model builder according to the specified conversion rule to convert the digital/analog hybrid circuit to a circuit suited for digital simulation.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: November 23, 1999
    Assignee: Fujitsu Limited
    Inventor: Akihisa Shoen
  • Patent number: 5991527
    Abstract: A system for simulating a production environment in which a plurality of components are subject to a plurality of different processes to generate an end product. The system comprises a plurality of modules, each module representing one of said processes and a set of data carriers, representing said components. Each module comprises read circuitry for reading data from a data carrier and means for providing an indication representing whether an attempted transaction of the module is valid or invalid. The validity or invalidity of the transaction is based on a predetermined job route which defines a valid predetermined sequence and timing of processes for each component or set of components. Each data carrier carries a unique identification which can be read by the read circuitry and which represents a component or a set of components.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Plint & Partners, Ltd.
    Inventors: Adrian George Plint, Dean Gardiner, Amir Davidov
  • Patent number: 5983006
    Abstract: This invention illustrates a method is provided for analyzing cross-coupling between an attacker signal line, upon which an attacker signal resides, and a victim signal line, upon which a victim signal resides. The method in this invention comprises the acts of selecting the victim signal, selecting the attacker signal, performing timing filtering upon a number of signal lines in order to identify a set of potential attacker signals, performing logic filtering upon a number of signal lines to identify a second set of potential attacker signals, and reducing the effects of the cross-coupling between the attacker signal line and the victim signal line.
    Type: Grant
    Filed: December 31, 1997
    Date of Patent: November 9, 1999
    Assignee: Intel Corporation
    Inventors: Roy Carlson, Hans J. Greub
  • Patent number: 5983010
    Abstract: A method of describing the structure of a building which includes first selecting a core structural information template, determining the orientation of the core structure, determining dimensions for the core, and reviewing and adjusting default dimensions for the core. Second, addition structural information templates are selected if the building has a composite structure, with the additional structures being additions to the core or to other additions. Third, for each addition, the orientation of the structure is determined, dimensions are determined, default dimensions are reviewed and adjusted, and the position of attachment to the core or to other additions is determined. Finally, the predefined core and addition structural information templates are used to process the collected information from the foregoing steps for the purpose of calculating areas of surfaces and volumes of spaces.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: November 9, 1999
    Assignees: Jeffrey Earl Murdock, Peter James Moffat
    Inventors: Jeffrey Earl Murdock, Peter James Moffat
  • Patent number: 5974243
    Abstract: Enhanced capability design-rule halos for use in Computer Aided Design (CAD) software programs are described. Such enhanced halos, created around a design feature at the design rule distance from that feature, have the following characteristics: beveled corners for closer placement of adjacent non-parallel and/or non-perpendicular design features, level-to-level design rule halos, following a bend or turn in a design feature, the design rule halo automatically adapts to bends or turns in the design feature and associated changes in the design feature following the bend, following a bend or turn in a design feature, the design feature and the design rule halo automatically snap back, as required, to avoid a design rule violation with respect to an adjacent design feature, and the design-rule halo is prevented from extending closer to an adjacent design feature than the design rule distance. These actions are performed real-time and interactively.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: October 26, 1999
    Assignee: Hewlett-Packard Company
    Inventors: David C. Moh, Jack D. Benzel, Michael J. Bennett
  • Patent number: 5970471
    Abstract: An apparatus and method are provided for presenting a plurality of product images for review by a user on a computer including a display, a memory, and an input device. The method includes the steps of displaying a plurality of product images on the display, providing product image review boxes on the display for a side-by-side comparison of selected product images, receiving a user input selecting a product image from the plurality of product images displayed on the display, and displaying the selected product image in one of the review boxes for a side-by-side comparison with at least one other selected product image. The product images include both a product image and a selected background image. The step of displaying the selected product image includes the step of integrating the product image with a selected background image to provide a customized product image on the display.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: October 19, 1999
    Assignee: Charles E. Hill & Associates, Inc.
    Inventor: Charles E. Hill
  • Patent number: 5963733
    Abstract: Method and system for simulating forest management is provided. The forestry simulation system includes a library of object-oriented modules for simulating forest resources and various forestry management actions. The method includes initiating a simulation of forest resources over a pre-determined period of time using the object-oriented forest resource modules and description of forest resources such as trees and stands. Forestry management actions are periodically applied to the simulated forest resources. The object-oriented forestry simulation system also includes a windowed graphical user interface that is used to view multiple forestry management factors as the forestry simulation progresses. The method and system use object-oriented technologies to create a library of programmable components that is comprehensive, customizable and reflective of real world forest management.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: October 5, 1999
    Assignee: Assisi Software Corporation
    Inventor: Richard T. Howard
  • Patent number: 5963731
    Abstract: Each of a plurality of simulation programs is linked with a data conversion library and is executed as a simulation process. A data conversion process is executed in correspondence with each simulation process. In exchanging data resulted from simulation by the simulation process of one of the simulation programs with simulation processes of the other simulation programs, the data conversion process provided for a sending simulation process determines a receiving simulation process to which the data is to be sent, and sends the data to the data conversion process corresponding to the receiving simulation process. The data conversion process for the receiving simulation process performs data conversion for absorbing difference between the base of the sending simulation process and the base of the receiving simulation process, and transfers the data after the conversion to the receiving simulation process.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: October 5, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Nobutoshi Sagawa, Mikio Nagasawa, Sigeo Ihara, Katsuro Kikuchi, Masahiko Hirao, Kirin Ka, Satoshi Itoh, Yoshio Suzuki
  • Patent number: 5963725
    Abstract: In a computer program simulation system, a simulation control unit calculates a simulation time until a machine language instruction execution simulation has an influence on a peripheral circuit simulation, and a simulation time notification unit provided in the simulation control unit notifies the calculated simulation time to a peripheral circuit simulation unit. The peripheral circuit simulation unit executes the peripheral circuit simulation for the notified simulation time. Thereafter, a machine language instruction execution simulation unit executes the machine language instruction execution simulation for the same time as the time in which the peripheral circuit simulation unit has executed the peripheral circuit simulation. Thus, the overhead such as communication between the simulation units and a preprocessing can be omitted so that the simulation processing speed can be elevated.
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: October 5, 1999
    Assignee: NEC Corporation
    Inventor: Masaharu Inoue
  • Patent number: 5949993
    Abstract: A method for generating software development tools to be used in hardware and software development. The invention is utilized by processing a hardware description and a syntax description of programmable electronics, such as a microprocessor, and generating a set of development tools useful to a hardware and/or software developer. Some of these tools include, for example, simulators, assemblers, decoders, disassemblers, behavior semantics, and attribute grammars.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: September 7, 1999
    Assignee: Production Languages Corporation
    Inventor: David Carroll Fritz
  • Patent number: 5946481
    Abstract: The invention presents a method and apparatus for forming a restricted model from a system model to reduce the computational resources required to formally verify the system design, without substantially reducing the ability to test all system model functions, or properties. In general, the restricted model is formed by restricting the range of assumable values of system model variables and system model inputs to a restricted set of values, based on the values assumed by the system model variables and system model inputs during a partial search of the system model. The restricted model can then be fully searched by a conventional verification tool to identify system design errors. Advantageously, the restricted model requires less computational resources to verify the system design (i.e. through a full search) than the original system model.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: August 31, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Robert Paul Kurshan, Carlos Manuel Roman
  • Patent number: 5943245
    Abstract: Variable speed AC motors are selected in accordance with user defined characteristics. A reference database containing information on a selected variety of frame/modules is modified in accordance with selected input data. The complexity of selecting an appropriate sized frame/module is simplified by utilizing key information about the motor electromagnetic characteristics as well as how they will vary due to operation at some user/application-defined operating conditions. The user/application-defined operating conditions are multi-dimensional, and include cooling/enclosure variations, ambient temperature, altitude, service factor, minimum, nominal, and maximum speeds (and corresponding continuous and momentary load torques at each of these speeds). This allows a person without intimate knowledge of motor characteristics to choose an optimal combination of motor and corresponding variable voltage, variable frequency supply for a particular application.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: August 24, 1999
    Assignee: Reliance Electric Industrial Company
    Inventors: Michael J. Melfi, John R. Early, Wesley L. Haynes
  • Patent number: 5926402
    Abstract: A simulation method for performing a simulation with respect to a trace object that an event occurs depending on a probability in a domain to be analyzed. The simulation method includes the step of dividing a flowing field into cells serving as domains to be analyzed, the step of arranging molecules serving as the target object in the cells, the step of performing the simulation such that the molecules are moved in the cells and the number of stickings or a sticking amount occurring on a wall surface or a film portion as the result of the movement larger than the number of times of the event or a change amount led by the probability, and the step of outputting, as a simulation result, a film profile obtained as the result of the simulation.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: July 20, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Tatsuta, Yuusuke Sato, Naoki Tamaoki, Hiroshi Komiyama, Yasuyuki Egashira
  • Patent number: 5920491
    Abstract: A computer implemented process simulates the application of a tension force in an element of an assembly. The process defines a finite element model for the element, and creates a pre-tension surface in the finite element model of the element for applying the tension force. Conditions are prescribed relative to the pre-tension surface for applying the tension force in the simulation. The conditions include prescribing an assembly load including either a tension force or tightening adjustment. The assembly load is then applied to the pre-tension surface of the element to simulate the tension in the element of the assembly. The results of the simulation are then evaluated for structural integrity, and subsequent structural redesign of the element is performed when necessary.
    Type: Grant
    Filed: January 14, 1997
    Date of Patent: July 6, 1999
    Assignee: Hibbitt, Karlsson and Sorenson, Inc.
    Inventors: Hugh David Hibbitt, Joop C. Nagtegaal
  • Patent number: 5910903
    Abstract: A method and apparatus for verifying, analyzing and optimizing a distributed simulation conducted on one or more simulation components from one or more control computers where the present invention may be overlaid onto a distributed simulation as may be conducted by technologies now known for conducting such simulations, where each simulation component has simulator middleware which is operatively connected to a control computer and where the control computer has agent-applications which it may send to the simulator middleware of one or more selected simulation components to perform a task such as gathering data about a simulation entity and return that data to the control computer for subsequent analysis such as calculating average characteristics or effectiveness of simulation components and having tools for optimizing the distributed simulation by modifying or creating agent-applications to send to selected simulators which change the parameters of the distributed simulation and re-run the distributed simu
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: June 8, 1999
    Assignee: PRC Inc.
    Inventors: Jerry M. Feinberg, Christopher H. Johnson, Bruce W. Stalcup
  • Patent number: 5905886
    Abstract: An emulator controls two single port memories by switching to exclusively connect the single port memories to a target microcomputer and a control microcomputer.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: May 18, 1999
    Assignees: Mitsubishi Electric Semiconductor Software Co., Ltd., Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akihiro Uegaki, Tadayuki Akatsuki
  • Patent number: 5892939
    Abstract: A system for, and method of, emulating, on a non-native computer, a native environment for a visual display object file for a real time process control system and a real time process control system employing the emulator. The visual display object file contains a drawing command, an address pointer for communicating data with the real time process control system and a rule for interpreting data received from a touch-sensitive screen.
    Type: Grant
    Filed: October 7, 1996
    Date of Patent: April 6, 1999
    Assignee: Honeywell Inc.
    Inventors: William L. Call, Laurence A. Clawson, Paul S. Connolly, Ronald J. Freimark, Jay W. Gustin, Michael L. Hodge, Paul McGaugh, Donald W. Moore, Elliott H. Rachlin, Steven C. Ramsdell
  • Patent number: 5870317
    Abstract: This invention relates to a novel process with attendant methods and apparatus for testing interlocks on machine barrier guards or equivalent safeguards. The process simulates the breaching of the interlocked safeguard to test the interlock without shutting down the machine operation. Failed interlocks are identified and their status warned against. Furthermore, the associated barrier guards may be physically locked to prevent access to their protected space while allowing normal machine operations until maintenance is practical. The testing process makes possible the reliable interlocking of fixed guards and may be automated to prevent bypassing or sabotage of interlocked safeguarding systems.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: February 9, 1999
    Inventors: Ralph L. Barnett, Theodore Liber