Abstract: A composition and associated method for chemical mechanical planarization (or other polishing) are described. The composition contains an abrasive, benzenesulfonic acid compound, a per-compound oxidizing agent, and water. The composition affords tunability of removal rates for metal, barrier layer materials, and dielectric layer materials in metal CMP processes. The composition is particularly useful in conjunction with the associated method for metal CMP applications (e.g., step 2 copper CMP processes).

Abstract: It is often desirable to release graphene from its growth substrate. Present graphene release techniques can damage the graphene and produce significant quantities of hazardous waste. Electrowetting techniques can be used in alternative approaches for releasing graphene from its growth substrate. Methods for releasing graphene by electrowetting can include providing a metal substrate having graphene adhered thereto, applying a dielectric layer to the graphene to form a coated structure, placing the coated structure in a liquid medium, establishing an electrical potential between the metal substrate and a conductor disposed proximate to at least a portion of the dielectric layer such that the electrical potential induces infiltration of the liquid medium between at least a portion of the metal substrate and the graphene, and releasing the graphene from the metal substrate in the presence of the infiltrated liquid medium. The electrical potential can be maintained until the graphene is released.

Abstract: Methods are provided for fabricating semiconductor integrated circuits including isolated trench features. In one embodiment, a method includes providing a semiconductor substrate with an overlying process layer. A trench pattern to be etched into the process layer is determined and that trench pattern is decomposed into first and second patterns, the second pattern including an isolated trench. First and second lithographic masks are formed to implement the first and second patterns, the second mask implementing the second pattern, the isolated trench, and a plurality of density balancer patterns symmetrically positioned with respect to the isolated trench. A first resist layer is patterned with the first lithographic mask and the process layer is etched with the first resist layer. A second resist layer is patterned with the second lithographic mask and the process layer is etched with the second resist layer to implement the required trench pattern in the process layer.

Abstract: A piezoelectric actuator which is provided on the flow path formation substrate, and a protection substrate which is bonded to the flow path formation substrate on the piezoelectric actuator side, the method including: bonding the flow path formation substrate on which the piezoelectric actuator is formed, and the protection substrate to form a bonded body; bonding a sealing member to the protection substrate of the bonded body on the surface side opposite the flow path formation substrate, and disposing a protection material containing a nitro compound in a space between the sealing member and the protection substrate.

Abstract: Provided is a method of manufacturing a wire grid polarizer in which a stable color coordinate can be implemented. According to the present invention, in a process where a second grid pattern of metal pattern is formed over a first grid pattern made of resin material, metal layer is deposited in a concave portion formed between adjacent first grid patterns to form void portion and a width and a height of the second grid pattern are adjusted depending on adjustment of a width of the voids, and thereby improving a process efficiency.

Abstract: A method of producing a semiconductor substrate product, the method containing: a step of preparing an aqueous solution containing 7% by mass or more and 25% by mass or less of a quaternary alkyl ammonium hydroxide; a step of preparing a semiconductor substrate having a silicon film comprising a polycrystalline silicon film or an amorphous silicon film; and a step of heating the aqueous solution at 80° C. or higher and applying the resultant aqueous solution onto the semiconductor substrate to etch at least a part of the silicon film.

Abstract: A method for preparing a patterned directed self-assembly layer for reducing directed self-assembly pattern defectivity using direct current superpositioning is provided. A substrate having a block copolymer layer overlying a first intermediate layer, said block copolymer layer comprising a first phase-separated polymer defining a first pattern and a second phase-separated polymer defining a second pattern in said block copolymer layer is provided. A first plasma etching process using plasma formed of a first process composition to remove said second phase-separated polymer while leaving behind said first pattern of said first phase-separated polymer is performed. A second plasma etching process to transfer said first pattern into said first intermediate layer using plasma formed of a second process composition is performed.

Abstract: A method for manufacturing a FinFET includes forming a merging spacer, through a plurality of sidewall pattern-transferring processes, and modifying a first interval between adjacent first mandrels as shorter than twice of thicknesses of a nitride layer, which is formed on the first mandrels and contoured thereto, followed by a first spacer being formed on a sidewall thereof, so that a FinFET composed of a plurality of fin-shaped structures having a non-integral multiple of pitches as well as an integral multiple of pitches can be manufactured.

Abstract: A method of forming a silicon containing confinement ring for a plasma processing apparatus useful for processing a semiconductor substrate comprises inserting silicon containing vanes into grooves formed in a grooved surface of an annular carbon template wherein the grooved surface of the annular carbon template includes an upwardly projecting step at an inner perimeter thereof wherein each groove extends from the inner perimeter to an outer perimeter of the grooved surface. The step of the grooved surface and a projection at an end of each silicon containing vane is surrounded with an annular carbon member wherein the annular carbon member covers an upper surface of each silicon containing vane in each respective groove. Silicon containing material is deposited on the annular carbon template, the annular carbon member, and exposed portions of each silicon containing vane thereby forming a silicon containing shell of a predetermined thickness.

Abstract: Disclosed herein is a CMP slurry composition. The CMP slurry composition includes cerium oxide particles, an adsorbent for adsorbing the cerium oxide particles to a polishing pad, an adsorption adjusting agent for adjusting adsorption performance of the adsorbent, and a pH adjusting agent. The CMP slurry composition may improve polishing efficiency of a patterned oxide layer and lifespan of a diamond disc conditioner.

Abstract: Methods and apparatus for processing a substrate in a multi-frequency plasma processing chamber are disclosed. The base RF signal pulses between a high power level and a low power level. Each of the non-base RF generators, responsive to a control signal, proactively switches between a first predefined power level and a second predefined power level as the base RF signal pulses. Alternatively or additionally, each of the non-base RF generators, responsive to a control signal, proactively switches between a first predefined RF frequency and a second predefined RF frequency as the base RF signal pulses. Techniques are disclosed for ascertaining in advance of production time the first and second predefined power levels and/or the first and second predefined RF frequencies for the non-base RF signals.

Abstract: A method of removing oxide from metallic powder. The method comprises: providing a powder defined by a plurality of particles, each particle in the plurality of particles having a metallic core and an oxide layer surrounding the metallic core; etching the plurality of particles, wherein the oxide layer is removed from each particle in the plurality of particles, leaving only the metallic core; coating each particle in the etched plurality of particles with an organic layer; dispersing the etched plurality of particles; and providing the powder as dispersed particles that are absent an oxide layer surrounding the metallic core, each metallic core being coated with an organic layer. The steps of etching, coating and dispersing are performed in situ with the plurality of particles disposed in liquid, absent any exposure of the metallic cores to air.

Abstract: The invention relates to an improved method for fabricating the amplification gap of an avalanche particle detector in which two parallel electrodes are spaced apart by dielectric spacer elements. A foil including a bulk layer made of dielectric material sandwiched by two mutually parallel metallic electrodes is provided, and holes are formed in one of the metallic layers by means of photolithography. The amplification gap is then formed in the bulk layer by means of carefully controlled etching of the bulk material through the holes formed in one of the metallic layers. The invention not only provides a simplified fabrication process, but also results in a detector with enhanced spatial and energy resolution.

Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.

Abstract: A block copolymer for manufacturing a nanowire and a method of manufacturing the same are disclosed. The block copolymer and the method of manufacturing a nanowire using the same are used to fabricate a nanowire having a diameter of less than or equal to 30 nm and a porous nanowire having a diameter within the same range and pores with a diameter of less than or equal to 10 nm.

Abstract: A method of removing silicon-dioxide from silicon powder. The method comprises: providing a silicon powder defined by each particle having a silicon core and a silicon dioxide layer surrounding the silicon core; dispersing the particles in a dispersing solution; adding an etching solution, wherein the etching solution removes the silicon dioxide layer; adding an organic solvent, thereby producing an organic phase and an aqueous phase, the organic phase comprising the silicon cores and the organic solvent, and the aqueous phase comprising the dispersing solution, the etching solution, and the etching by-products; coating each silicon core with an organic material; draining out the aqueous phase; washing the organic phase, wherein the remaining material from the aqueous phase is removed; and providing the silicon powder as a plurality of silicon cores each absent a silicon dioxide layer and having an organic coating.

Abstract: A method of making a semiconductor assembly including the steps of: (i) providing an initial-state assembly including: (a) a fin layer, and (b) a hard mask layer located on top of at least a portion of the fin layer; (ii) performing a first material removal on the initial-state assembly, by CMP, to yield a second-state assembly; and (iii) performing a second material removal on the second-state assembly to yield a third-state assembly. In the first material-removal step: (i) any remaining portion of the soft sacrificial layer is removed, (ii) a portion of the fin layer is removed, and (iii) the lower portion of the hard mask layer is used as a stop layer for the second material removal.

Abstract: The present invention provides methods for fabricating a stent using a chemical treatment to smooth, polish or strengthen the stent. One such treatment involves exposing the stent to acetone or a similar solvent. In certain embodiments, the additional step comprises placing the stent in a bath containing acetone, or a similar solvent, where the bath also contains the polymer the stent is composed of. The acetone bath step may be conducted at a temperature that is below the glass transition temperature. The present invention also provides for methods of fabricating a stent using an acetone bath that comprises poly (lactic) acid. Other embodiments provide for methods of fabricating a stent using an acetone bath that comprises poly (lactic) acid and polyethylene glycol.

Abstract: A chemical solution including an aqueous solution, an oxidizing agent, and a pH stabilizer selected from quaternary ammonium salts and quaternary ammonium alkali can be employed to remove metallic materials in cavities for forming a semiconductor device. For example, metallic materials in gate cavities for forming a replacement gate structure can be removed by the chemical solution of the present disclosure with, or without, selectivity among multiple metallic materials such as work function materials. The chemical solution of the present disclosure provides different selectivity among metallic materials than known etchants in the art.

Abstract: A method of manufacturing a piezoelectric vibration reed is provided. The piezoelectric vibration reed includes a pair of vibrating arm portions and a base portion. The pair of vibrating arm portions is disposed in parallel to each other. The base portion is configured to integrally support proximal end portions of the pair of vibrating arm portions in a longitudinal direction of the vibrating arm portions. The method of manufacturing the piezoelectric vibration reed forms a slit-shaped notched portion at a crotch portion located between the proximal end portions of the pair of vibrating arm portions.