Patents Examined by Mahmoud Dahimene
  • Patent number: 9896762
    Abstract: A method of forming layers of film on a patterned surface, including depositing a film on the patterned surface during a PEALD/PPECVD process in a processing apparatus and etching the film during the etching process in the processing apparatus.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: February 20, 2018
    Assignee: ASM IP HOLDING B.V.
    Inventor: Toshihisa Nozawa
  • Patent number: 9892969
    Abstract: A process of forming an electronic device includes providing a substrate having a major surface; etching a portion of a the substrate to define a trench extending from the major surface, wherein the portion of the trench has a first width, W1, along the major surface and a second width, W2, at a bottom of the portion of the trench, and wherein the first width is greater than the second width; depositing a protective layer along side surfaces of the portion of the trench; etching the substrate to extend a depth of the trench after depositing the protective layer; and removing the protective layer.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: February 13, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Takumi Horie
  • Patent number: 9892934
    Abstract: A method of removing a halogen includes performing a heating treatment on a halogen-containing film at a pressure higher than 1 atm and a temperature higher than 100 degrees C. in order to suppress a deterioration of the halogen-containing film while keeping an organic solvent, which is in a liquid phase and exhibits a polarity, in contact with a surface of the halogen-containing film.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: February 13, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Ryuichi Asako
  • Patent number: 9881794
    Abstract: In some embodiments, a method of a semiconductor process includes conformally forming a spacer layer over a plurality of mandrels that are disposed over a mask layer, portions of the spacer layer disposed over opposing sidewalls of adjacent ones of the plurality of mandrels defining trenches therebetween, filling the trenches with a dummy material, and removing first portions of the dummy material in the trenches, thereby forming a plurality of openings in the dummy material. The method further includes filling the plurality of openings with a first material, removing a remaining portion of the dummy material in the trenches, and removing the plurality of mandrels after the removing the dummy material.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: January 30, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Yi-Nien Su
  • Patent number: 9881806
    Abstract: A method of manufacturing a semiconductor device including a wafer using a plasma etching device which includes a chamber, a chuck provided in the chamber to dispose a wafer to be processed thereon, a focus ring disposed at a peripheral edge portion of the chuck, and a gas supplying mechanism configured to supply various types of gases depending a radial position of the wafer. The method includes: placing a wafer formed with an organic film on the chuck; introducing an etching gas which etches the organic film on the wafer from the process gas supplying mechanism to a central portion of the wafer; introducing an etching inhibiting factor gas having a property of reacting with the etching gas to the peripheral edge portion of the wafer from the gas supplying mechanism; and performing plasma etching on the wafer using the etching gas.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 30, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takayuki Katsunuma, Masanobu Honda, Kazuhiro Kubota, Hironobu Ichikawa
  • Patent number: 9870899
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 16, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9870932
    Abstract: A method for etching a substrate and removing byproducts includes a) setting process parameters of a processing chamber for a selective dry etch process; b) setting process pressure of the processing chamber to a first predetermined pressure in a range from 1 Torr to 10 Torr for the selective dry etch process; c) selectively etching a first film material of a substrate relative to a second film material of the substrate in the processing chamber during a first period; d) lowering pressure in the processing chamber to a second predetermined pressure that is less than the first predetermined pressure by a factor greater than or equal to 4; and e) purging the processing chamber at the second predetermined pressure for a second period.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: January 16, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Pilyeon Park, Joydeep Guha
  • Patent number: 9859165
    Abstract: A method for forming a semiconductor device structure is provided. The method includes receiving a structure having a first portion and a second portion, and a top surface of the first portion is higher than a top surface of the second portion. The method also includes forming a first material layer over the first portion and the second portion of the structure and forming a first material layer over the first portion and the second portion of the structure. The method further includes thinning the second material layer until the first material layer is exposed and removing a portion of the second material layer over the second portion of the structure to expose the first material layer thereunder. In addition, the method includes thinning the first material layer to expose the structure.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: January 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Chieh Wu, Hui-Chi Huang
  • Patent number: 9846357
    Abstract: According to one embodiment, a photomask manufacturing method for patterning a multilayer film into a mask pattern in the multilayer film is provided. The photomask manufacturing method includes preparing a substrate including the multilayer film provided on the substrate, obtaining an amount of position variation before and after the multilayer film is patterned if a position of the mask pattern is deviated before and after patterning the multilayer film, forming the mask pattern at a position deviated by the amount of the position variation from a target position, if the multilayer film is patterned and a pattern of the multilayer film is formed at the target position, and patterning the multilayer film with the mask pattern.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: December 19, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kosuke Takai
  • Patent number: 9837304
    Abstract: Method of manufacturing a semiconductor device is described that uses sidewall protection of a recessed feature to prevent loss of critical dimension during a cleaning process to remove etch residue. According to one embodiment, the method includes providing a substrate containing a film thereon having a recessed feature with a sidewall and a bottom portion, depositing a conformal film on the sidewall and on the bottom portion, removing the conformal film from the bottom portion in an anisotropic etching process, where the remaining conformal film forms a protection film on the sidewall, and performing a cleaning process that removes etch residue from the recessed feature without etching the protection film or the sidewall.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 5, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Robert D. Clark, Kandabara N. Tapily
  • Patent number: 9824893
    Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: November 21, 2017
    Assignee: Lam Research Corporation
    Inventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick A. Van Cleemput, Bart J. van Schravendijk
  • Patent number: 9812334
    Abstract: A corrosion method of a passivation layer (320) of a silicon wafer (300) includes: pouring hydrofluoric acid solution (100) into a container (200) with an open top; putting the silicon wafer (300) to the opening of the container (200) and one side of the silicon wafer (300) with the passivation layer (320) is opposite to the hydrofluoric acid solution (100); the hydrogen fluoride gas generated from the volatilization of the hydrofluoric acid solution (100) corrodes the passivation layer (320) of the silicon wafer (300), the corrosion time is larger or equal to (thickness of the passivation layer/corrosion rate). By means of the corrosion of the passivation layer of silicon wafer by the fluoride gas generated from the volatilization of the hydrofluoric acid solution, the fluoride gas can fully touch the passivation layer; therefore the passivation layer can be completely corroded, and the corrosion precision is high.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: November 7, 2017
    Assignee: CSMC Technologies Fab1 Co., Ltd.
    Inventor: Qiliang Sun
  • Patent number: 9803286
    Abstract: Provided is a method of etching a copper layer. The method includes generating plasma of a processing gas within a processing container which accommodates an object to be processed that includes the copper layer and a metal mask formed on the copper layer. The metal mask contains titanium. In addition, the processing gas includes CH4 gas, oxygen gas, and a noble gas. In an exemplary embodiment, the metal mask may include a layer made of TiN.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: October 31, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Keiichi Shimoda, Kei Nakayama
  • Patent number: 9803107
    Abstract: The present invention relates to a polishing agent including: cerium oxide particles; a water-soluble polyamine; potassium hydroxide; at least one selected from an organic acid and a salt thereof; and water, in which the polishing agent has a pH of 10 or more, a polishing method using the polishing agent, and a method for manufacturing a semiconductor integrated circuit device.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: October 31, 2017
    Assignee: ASAHI GLASS COMPANY, LIMITED
    Inventors: Masaru Suzuki, Toshihiko Otsuki
  • Patent number: 9805945
    Abstract: Disclosed is a method for selectively etching a first region made of silicon oxide to a second region made of silicon nitride. The method includes: performing a first sequence once or more to etch the first region; and performing a second sequence once or more to further etch the first region. The first sequence includes: a first step of generating plasma of a processing gas containing a fluorocarbon to form a fluorocarbon-containing deposit on a workpiece; and a second step of etching the first region by radicals of the fluorocarbon. The second sequence includes: a third step of generating plasma of a processing gas containing a fluorocarbon gas to form a fluorocarbon-containing deposit on a workpiece; and a fourth step of generating plasma of a processing gas containing oxygen gas and an inert gas in the processing container.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: October 31, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Hidaka, Soichiro Kimura, Masaru Sugimoto
  • Patent number: 9779941
    Abstract: In a method of forming patterns of a semiconductor device, an object layer is formed on a substrate. A plurality of guiding pillars and at least one guiding dam are formed on the object layer. A self-aligned layer including a block copolymer is formed in a space between the guiding pillars and the guiding dam, such that first blocks aligned around the guiding pillars and second blocks aligned around the guiding dam are formed. A trim pattern at least partially covering the guiding dam is formed. The first blocks are transferred in the object layer.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 3, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-Han Park
  • Patent number: 9779986
    Abstract: Provided is a plasma treatment method including: placing a substrate carrier holding a substrate on a stage; adjusting a distance between a cover and the stage to a first distance in which the cover covers a frame without coming into contact with the substrate carrier; performing a plasma treatment on the substrate placed on the stage after the adjusting of the distance; carrying the substrate together with the substrate carrier out from a reaction chamber after the performing of the plasma treatment; and removing an adhered substance adhered to the cover by generating plasma in the inside of the reaction chamber after the carrying of the substrate, in which the distance between the cover and the stage in the removing of the adhered substance is a second distance greater than the first distance.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: October 3, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Harikai, Noriyuki Matsubara, Hideo Kanou, Mitsuru Hiroshima, Syouzou Watanabe, Toshihiro Wada
  • Patent number: 9773674
    Abstract: A method of etching a layer including at least one pattern that has flanks is provided, including at least one step of modifying the layer by putting the layer in presence with a plasma into which CxHy is introduced and which includes ions heavier than hydrogen; and wherein the plasma creates a bombardment of ions with a hydrogen base coming from the CxHy, the bombardment being anisotropic according to a main direction of implantation parallel to the flanks and so as to modify portions of the layer that are inclined with respect to the main direction and so as to retain unmodified portions on the flanks, wherein chemical species of the plasma form a carbon film on the flanks; and at least one step of removing the modified layer to be etched using a selective etching of modified portions of the layer with respect to the carbon film.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: September 26, 2017
    Assignee: COMMISARIAT A L'ENERGIE ATOMIQUE AUX ENERGIES ALTERNATIVES
    Inventor: Nicolas Posseme
  • Patent number: 9767991
    Abstract: For a first period of time, a higher radiofrequency power is applied to generate a plasma in exposure to a substrate, while applying low bias voltage at the substrate level. For a second period of time, a lower radiofrequency power is applied to generate the plasma, while applying high bias voltage at the substrate level. The first and second periods of time are repeated in an alternating and successive manner for an overall period of time necessary to produce a desired effect on the substrate. In some embodiments, the first period of time is shorter than the second period of time such that on a time-averaged basis the plasma has a greater ion density than radical density. In some embodiments, the first period of time is greater than the second period of time such that on a time-averaged basis the plasma has a lower ion density than radical density.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: September 19, 2017
    Assignee: Lam Research Corporation
    Inventors: Zhongkui Tan, Qian Fu, Ying Wu, Qing Xu
  • Patent number: 9766590
    Abstract: The method makes it possible to produce a decorated component for a timepiece or piece of jewellery. This component provided with the decoration may be, for example, a watch hand. To produce said component, a base substrate is used and a micromachining operation is performed on or in the base substrate to obtain an upper part of the component, which is provided with the decoration. The decoration is produced through the thickness of the upper part and in a programmed pattern. Thereafter, the upper part is placed on a luminescent or colored substance to obtain the component.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: September 19, 2017
    Assignee: Nivarox-FAR S.A.
    Inventor: Marc Stranczl