Patents Examined by Metasebia Retebo
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Patent number: 9236857Abstract: A voltage detection circuit includes a reference voltage and current supply configured to generate a reference voltage and a reference current; a switching element configured to shift from an off-state to an on-state when the reference voltage is higher than a predetermined threshold voltage; a current mirror circuit allowing a current corresponding to the reference current to flow through the switching element in the on-state; a capacitive element coupled in series to the current mirror circuit and charged with the current flowing through the switching element; and an inverter configured to output an enable signal activated based on a terminal voltage of the capacitive element.Type: GrantFiled: July 15, 2014Date of Patent: January 12, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Shinji Miyamoto, Ichiro Yamane, Hirokuni Fujiyama
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Patent number: 9231579Abstract: Techniques relating to buffer circuits. In one embodiment, a circuit includes a first transistor configured as a source follower and a feed-forward path coupled to the gate terminal of the first transistor and the drain terminal of the first transistor. In this embodiment, the feed-forward path includes circuitry configured to decouple the feed-forward path from a DC component of an input signal to the gate terminal of the first transistor. In this embodiment, the circuitry is configured to reduce a drain-source voltage of the first transistor based on the input signal. In some embodiment, the feed-forward path includes a second transistor configured as a source follower and the source terminal of the second transistor is coupled to the drain terminal of the first transistor. In various embodiments, reducing the drain-source voltage may improve linearity of the first transistor.Type: GrantFiled: November 7, 2013Date of Patent: January 5, 2016Assignee: Silicon Laboratories Inc.Inventors: Ruifeng Sun, Mustafa H. Koroglu, Ramin Khoini Poorfard, Yu Su, Krishna Pentakota, Pio Balmelli
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Patent number: 9226371Abstract: An apparatuses, methods and systems for providing user control of an environmental parameter of a structure are disclosed. One method includes establishing a direct communication link between a user device and a fixture located within the structure, receiving, by a central controller, information of the user device from the fixture through a first communication link, receiving, by the central controller, control information from the user device through a second communication link, and communicating, by the central controller, the control information to the fixture, wherein the fixture controls the environmental parameter based on the control information.Type: GrantFiled: June 26, 2012Date of Patent: December 29, 2015Assignee: enLighted, Inc.Inventor: Tanuj Mohan
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Patent number: 9224571Abstract: A photocathode high-frequency electron-gun cavity apparatus of the present invention is provided with a high-frequency acceleration cavity (1), a photocathode (8, 15), a laser entering port (9), a high-frequency power input coupler port (10), and a high-frequency resonant tuner (16). Here, the apparatus adopts an ultra-small high-frequency accelerator cavity which contains a cavity cell formed only with a smooth and curved surface at an inner face thereof without having a sharp angle part for preventing discharging, obtaining higher strength of high-frequency electric field, and improving high-frequency resonance stability.Type: GrantFiled: September 26, 2011Date of Patent: December 29, 2015Assignees: INTER-UNIVERSITY RESEARCH INSTITUTE CORPORATION, HIGH ENERGY ACCELERATOR RESEARCH ORGANIZATIONInventors: Junji Urakawa, Nobuhiro Terunuma, Toshikazu Takatomi
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Patent number: 9218764Abstract: A display device according to an embodiment includes a display panel including a display area having pixel areas, and a non-display area surrounding the display area. The display area includes first power lines for providing a first power to the pixel areas. The display device further includes a driver electrically connected to the first power lines of the display panel. The driver includes a driving integrated circuit, signal output pads connected to the driving integrated circuit and configured to output signals, a power supply line disposed outside the signal output pads and configured to supply the first power, and power output pads connected to the power supply line and configured to output the first power from the power supply line to the first power lines, wherein the power output pads are alternatingly disposed with the signal output pads.Type: GrantFiled: June 26, 2013Date of Patent: December 22, 2015Assignee: LG Display Co., Ltd.Inventors: Joong-Sun Yoon, Soon-Il Yun
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Patent number: 9210011Abstract: A transmitter, such as a voltage mode driver (VMD)-based push-pull source-series terminated (SST) transmitter, is provided that can consume less current as the amplitude of a voltage output is decreased. The transmitter includes a transmitter circuit having a first branch and a second branch. While the first branch is activated to send an analog output signal, the second branch is deactivated, and vice versa. One or more bit values of an input binary signal can be used to selectively activate and deactivate the first and second branches.Type: GrantFiled: September 23, 2011Date of Patent: December 8, 2015Assignee: Intel CorporationInventors: Giacomo Rinaldi, Stefano Giaconi
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Patent number: 9209773Abstract: A controlled impedance microwave surface to surface interface utilizes compression contact technologies.Type: GrantFiled: January 11, 2013Date of Patent: December 8, 2015Assignee: Lockheed Martin CorporationInventors: Steven H. Arlin, Raymond J. Chagnon, Ronald L. Squillacioti
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Patent number: 9201440Abstract: A semiconductor integrated circuit device has, as a current monitor circuit, a circuit in which n-channel type MISFETs are connected in series with each other. Based on a delay time of a speed monitor circuit in a state where a substrate bias is being applied to the p-channel type MISFETs, a first voltage value of a first substrate bias to be applied to the p-channel type MISFETs is determined. Next, based on a current flowing through an n-channel type MISFET in a state where the first substrate bias is being applied to the p-channel type MISFETs of the current monitor circuit and a second substrate bias is being applied to the n-channel type MISFETs of the current monitor circuit, a second voltage value of the second substrate bias to be applied to the n-channel type MISFETs is determined.Type: GrantFiled: June 20, 2014Date of Patent: December 1, 2015Assignee: Renesas Electronics CorporationInventors: Hideki Makiyama, Toshiaki Iwamatsu
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Patent number: 9201813Abstract: Signal distribution circuitry for use in an integrated circuit, the signal distribution circuitry comprising: first and second output nodes, for connection to respective output signal lines; first and second supply nodes for connection to respective high and low voltage sources; and switching circuitry connected to the first and second output nodes and the first and second supply nodes and operable based on an input signal to conductively connect the first and second output nodes either to the first and second supply nodes, respectively, in a first state when the input signal has a first value, or to each other, in a second state when the input signal has a second value different from the first value, so as to transmit output signals dependent on the input signal via such output signal lines.Type: GrantFiled: September 12, 2013Date of Patent: December 1, 2015Assignee: SOCIONEXT INC.Inventors: Ian Juso Dedic, Gavin Lambertus Allen
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Patent number: 9197198Abstract: The present disclosure includes circuits and methods for latching signals. In one embodiment, two inverters are configured back to back to latch a signal. Each inverter includes a capacitor configured between control terminals of inverter transistors. In one embodiment, the circuit is part of a comparator. First and second voltages are received on control terminals of differential transistors, and a differential output signal is coupled to two back to back inverters. In one embodiment, a circuit is disabled and a voltage on a control terminal of a transistor in an inverter is set below a reference, such as a power supply, to increase the speed of the circuit.Type: GrantFiled: October 29, 2013Date of Patent: November 24, 2015Assignee: QUALCOMM IncorporatedInventors: Omid Rajaee, Dinesh J Alladi
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Patent number: 9190708Abstract: An electromagnetic band gap device is provided, comprising: a conductive plane; a non-conductive substrate located over the conductive plane; and an electromagnetic band gap unit cell that includes a first via located in the non-conductive substrate and filled with a conductive material, a second via located in the non-conductive substrate and filled with the conductive material, a first conductive surface located on the non-conductive substrate over the first via, and a second conductive surface located on the non-conductive substrate over the second via, wherein the electromagnetic band gap unit cell is configured to operate as an LC resonant circuit in conjunction with the conductive plane, at least one gap is located in the electromagnetic band gap unit cell, the at least one gap being located in the first via, in the first conductive surface, in the second conductive surface, and in the second via.Type: GrantFiled: March 5, 2013Date of Patent: November 17, 2015Assignee: Freescale Semiconductors, Inc.Inventor: Walter Parmon
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Patent number: 9166595Abstract: A configurable flip-flop circuit has modifiable connections between its circuit elements that allow it to be modified for primary and secondary uses. For example, the flip-flop circuit can be modified to provide secondary functions of NOR and NAND gates during an implementation of an ECO. At other times, the flip-flop circuit can be used to deliver normal flip-flop functionality. A configurable latch circuit is provided that can be modified to provide an output signal or an inverted output signal. A scan circuit is provided that can provide the functionality of a multiplexer.Type: GrantFiled: December 27, 2013Date of Patent: October 20, 2015Assignee: FREESCALE SEMICONDUCTOR, INCInventors: Gaurav Gupta, Shiva Belwal, Ashish Goel
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Patent number: 9167657Abstract: An organic light emitting device includes a first electrode formed over a substrate; an intermediate layer that is formed over the first electrode and includes an organic light emitting layer; a second electrode that includes a central electrode unit disposed in a central region and a peripheral electrode unit disposed in a peripheral region, the intermediate layer being disposed between the first and second electrodes; and a power unit configured to apply voltages to the first electrode and the second electrode. The power unit is configured to apply different voltages to the first electrode, the central electrode unit, and the peripheral electrode unit.Type: GrantFiled: April 11, 2012Date of Patent: October 20, 2015Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Sang-Hoon Yim, Ok-Keun Song, Young-Mo Koo
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Patent number: 9160052Abstract: A Lange coupler comprises an unbroken peripheral ground conductor surrounding input, through, coupled and isolated conductor strips coupled to input, through, coupled and isolated ports of the Lange coupler respectively, wherein the peripheral ground conductor and input and through conductor strips are arranged on a first metal layer.Type: GrantFiled: February 28, 2013Date of Patent: October 13, 2015Assignee: NXP, B.V.Inventors: Olivier Tesson, Patrice Gamand, Sidina Wane
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Patent number: 9136831Abstract: According to the invention, there is provided a frequency to voltage converter for generating an output voltage proportional to the frequency of input signal. It comprises a switched capacitor circuit for receiving input signal and generating an input current proportional to said frequency, the switched capacitor having a capacitor charging and discharging at said frequency; an operational transconductance amplifier (OTA) for receiving at least one control voltage representative of the input current and generating current proportional to the at least one control voltage; at least one negative feedback circuit connecting input and output of the OTA, each negative feedback circuit comprising: a control transistor coupled to a node of the OTA; a diode connected transistor coupled to the control transistor for sensing current flowing through the control transistor; and a feedback transistor coupled to another node of the OTA.Type: GrantFiled: July 5, 2012Date of Patent: September 15, 2015Assignee: INDIA INSTITUTE OF TECHNOLOGY, BOMBAYInventors: Gowdhaman Santosh Kumar, Shojaei Baghini Maryam, Anavangot Vineeth, Mukherjee Jayanta
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Patent number: 9136849Abstract: An integer frequency divider capable of achieving a 50% duty cycle includes a source clock input end that provides a source clock, and two or more latches connected in series according to a connection order. Each of the latches includes: a signal input stage, configured to receive an input signal; a clock receiving stage, configured to treat the source clock as an input clock and an inverted clock of the source clock as an inverted signal of the input clock when the latch corresponds to an odd number in the connection order, and to treat the inverted clock as the input clock and the source clock as the inverted signal of the input clock when the latch corresponds to an even number in the connection order; and a signal output stage, configured to output an output signal according to the input signal and the source clock.Type: GrantFiled: July 7, 2014Date of Patent: September 15, 2015Assignee: MStar Semiconductor, Inc.Inventor: Sheng-Che Tseng
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Patent number: 9136817Abstract: A filter module includes: reception filters connected between an antenna terminal and a reception terminal; and a module substrate, wherein a first reception filter that is at least one reception filter of the reception filters is embedded in the module substrate, and a second reception filter that is at least another one reception filter is mounted on a surface of the module substrate so as to overlap the first reception filter.Type: GrantFiled: June 7, 2013Date of Patent: September 15, 2015Assignee: TAIYO YUDEN CO., LTD.Inventor: Jun Tsutsumi
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Patent number: 9121772Abstract: A temperature data coding unit 100 increases the data resolution in a high temperature range and reduces the data resolution in a low temperature range, and makes the data length of the temperature data a fixed length. When carrying out numerical estimation of the fixed length code value in terms of a 2's complement numerical code value, the temperature data coding unit 100 generates coded data that increases with an increase of the pre-coded temperature data in terms of the 2's complement numerical code value.Type: GrantFiled: January 25, 2013Date of Patent: September 1, 2015Assignee: Mitsubishi Electric CorporationInventor: Teruaki Tanaka