Abstract: In a teletext decoder circuit the character generator supplies picture elements at a rate of nominally approximately 6 MHz under the control of display pulses occurring at the same rate. These display pulses are derived from reference clock pulses which occur at a rate which is not a rational multiple of 6 MHz. The character generator comprises a generator circuit which receives the reference clock pulses and selects, from each series of N reference clock pulses, as many pulses as correspond to the number of horizontal picture elements constituting a character, while the time interval of N reference clock pulses corresponds to the desired width of the characters to be displayed. The character generator supplies picture elements of distinct length, while the length of a picture element is dependent on the ordinal number of this picture element in the character.

Abstract: A teletext decoder is provided with a page memory having rows (R0 to R73) for storing corresponding packets of teletext data, the page memory being provided with at least one extra memory bit (F1, F2) for each row thereof, the extra memory bits constituting flags (F1, F2) which may be selectively set by the processor software in order to initiate selective action in respect of those packets which correspond to the flagged rows. The selective action might be to permit or prevent packets being written into memory or to alert the processor that immediate processing of a flagged packet is required.

Abstract: A teletext decoder arrangement has a page memory comprising a large number of chapters or portions in which individual pages can be stored. The arrangement has a plurality of data acquisition circuits which can acquire separate pages simultaneously. A register file is provided having a word location for each data acquisition circuit. A processor can load a memory chapter pointer byte into a word location when a page is to be acquired by the related data acquisition circuit so as to allot the memory chapter identified by the pointer byte for the storage of that page. In a practical embodiment four 4-bit word locations can have any one of 16 different 4-bit pointer bytes loaded into them to identify any one of 16 different memory chapters.

Abstract: A system for video recorder programming using existing television broadcast teletext transmissions. The programs required are chosen from schedules displayed on teletext pages, the necessary control information is loaded automatically into a video recorder, and program labels are transmitted to ensure that the correct programs will be recorded even if program timings are altered. All the control information for achieving the above are fitted into the coding structure of a teletext transmission using extension packets additional to data packets containg display data. The invention also extends to a video recorder with its own teletext decoder for processing the control information.

Abstract: The circuit disclosed provides for operation in wide ranges of temperature with high temporal stability. It comprises a quartz clock providing the point frequency, a delay circuit with N outputs to delay the clock signal by 1 to N increments with a value 1/NFP from one output to the following one. A decoding and control logic circuit receives the N shifted signals ad the external line synchronization and codifies the rank of the first shifted signal which follows the line synchronization. A selection logic circuit controlled by this information on rank selects the corresponding output.

Abstract: The pixel clock of a system for receiving, sampling, and digitally storing the information contained in an analog sampled-data video signal is automatically synchronized and stabilized so that the received data is sampled by said system at or near the center of each successive received pixel period. A preset counter is employed to determine whether the receiving system clock is running at a predetermined number of pixel periods per horizontal sweep; any variation from the predetermined number is sensed and converted to a DC voltage level which is used to adjust the receiving system clock automatically to the correct number of periods per sweep. Synchronization of the receiving system clock is accomplished by triggering it with the sync pulse portions of the received video signal.

Abstract: Upon receipt of an interlaced television signal, the field generator generates a first selector signal arbitrarily selecting one of the fields as top field and a second field selector signal selecting the other as bottom field. The received television signal is entered into memory under control of the field selector signals. When readout from the memory occurs on the same line that is currently being recorded, the same field selector signal is maintained for another field, effectively switching the top and bottom assignments.

Abstract: A television broadcasting method and apparatus. The broadcasting method generally includes the steps of multiplexing signals from a plurality of channels over a single carrier frequency, and transmitting the multiplexed signals to a reception circuit. The multiplexed signals are then demultiplexed at the reception circuit. The demultiplexed signals are then separated into separate channels, and then stored for a predetermined period of time. The signals of the selected channel are then decompressed and reconstructed on a real-time basis and are then displayed or viewed also on a real-time basis.

Abstract: A television signal for a television transmission system conveys a motion information signal in addition to the vision signal. At the transmission side each field of a picture is subdivided into a plurality of regions and up to a given number of the most dominant motion vectors appropriate to a region are generated. These motion vectors are transmitted as the motion information signal and in a receiver are separated from the television signal in a decoder (12). The spatially offset pixels are identified in a first spatial offset circuit (14) from a vision signal delayed by a picture memory (16) and compared in a picture information comparison circuit (17) with pixels in the corresponding field of the current picture to identify the motion vector indicating the pixel of corresponding magnitude.

Abstract: A helmet mountable display system includes separate optical paths for providing a respective image to the left and right eye of an observer for stereoscopic viewing. Each of a first and second plurality of spaced apart, substantially point light sources supply a respective group of modulated rays of light. The rays of each group are collimated by a respective input lens and the collimated rays from each input lens are directed so that their envelopes all intersect at the same point. A horizontal and a vertical deflecting surface are disposed on opposite sides of the intersection point. Electro-mechanical drivers move the surfaces which scan all the collimated rays. The scanned rays from each group are focused onto a respective screen by a respective output lens to form a raster scanned image. The screens are divided into a plurality of contiguous zones with a ray from each light source assigned to a corresponding zone, which reduces the vertical scan angle excursions required.

Abstract: A synchronizing signal automatic selecting circuit comprising a signal inverter for inverting synchronizing signal from a synchronizing signal separating circuit, a synchronizing signal detector for detecting synchronizing signal when a synchronizing signal is inputted to a horizontal and horizontal/vertical synchronizing signal input terminal and grounding the output signal of the signal inverter, a polarity detecting circuit for detecting the synchronizing signal polarity of the horizontal and horizontal/vertical synchronizing signal input terminal and a vertical synchronizing signal separator for separating the vertical synchronizing signal from the output signal of a transistor. The circuit is designed to automatically select with priority the synchronizing signal where the composite video signal and the synchronizing signal are inputted at the same time to a monitor used for a peripheral equipment of a computer without using a switch.

Abstract: A video signal generator employs a host subsystem (11), display controller system (18), display generator subsystem (20), refresh memory subsystem (24), and video data system (28) to process pixel data in parallel to achieve high pixel frequency rates permitting large flicker-free images. To achieve high pixel frequencies, parallel processing is maintained from the bit map memory (36) until the data is processed by the digital-to-analog converter (DAC) (54). The display generator subsytem (20) outputs a multi-bit digital data address signal (35) which is used to address a plurality of bit map memory (BMM) arrays (36). The BMM arrays (36) operate in parallel, and the data (35) is read into a portion of each BMM array (37, 39) until the array (37, 39) is filled. The data is read out of the arrays (37, 39) in parallel (32) and into a plurality of BMM output multiplexers (MOM) (38), new data continuously being read into each BMM array (37, 39).

Abstract: A video program system (VPS) signal superimposed on a television signal is continuously stored in an input buffer. A determination process circuit determines whether or not the VPS signal stored in the input buffer is a normal signal. When the VPS signal stored in the input buffer is a no-signal, a count value of a no-signal counter is counted. When the count value of the no-signal counter exceeds a predetermined count value, the circuit determines that the VPS signal detected from the television signal is the no-signal. When VPS signals corresponding to various programs are stored in the input buffer, a count value of an error counter is counted. When the count value of the error counter exceeds a predetermined count value, the circuit determines that the input state of the VPS signal detected from the television signal is unstable. When the same VPS signal is continuously stored in the input buffer, the circuit determines that the VPS signal detected from the television signal is a normal signal.

Abstract: An apparatus for use in for a system indicating at least first and second pictures in a screen of a horizontal scan type display, includes a first circuit for measuring the pulse width or duration of a horizontal synchronism signal for the first picture, and a second circuit for determining a horizontal indication start position of the second picture on the basis of the measured pulse width or duration of a horizontal synchronism signal.

Abstract: A system for transmitting and receiving signals representing a high-definition television (HDTV) image is disclosed. The signals are sent over two conventional 6 MHz NTSC channels. A first signal, the main signal, is developed by encoding circuitry from HDTV source signals to be compatible with existing NTSC receivers in that it produces a display on those receivers which is not significantly distorted. The main signal includes psychophysically hidden video information which may be used by an extended definition receiver to produce a widescreen image having a higher level of detail than a conventional video image. A second signal, the auxiliary signal, is developed at the transmitter by decoding the main signal and subtracting the decoded main signal from the original HDTV source signals. The auxiliary signal, which includes frequency components from 0 Hz to 20 MHz is split into three bands, A (0 Hz-6MHz), B (6 MHz-12 MHz) and C (12 MHz-18 MHz).

Abstract: A video signal processing circuitry which comprises a first arithmetic circuit adapted to receive a line sequential signal, a first 1H delay circuit for delaying an output from the first arithmetic circuit for a length of time equal to one horizontal period, a second 1H delay circuit for delaying an output from the first 1H delay circuit for a length of time equal to one horizontal period, a second arithmetic circuit adapted to receive the line sequential signal and the output from the second 1H delay circuit, a coefficient multiplier for varying the level of the output from the second arithmetic circuit according to a predetermined coefficient, an adder for summing the output from the first arithmetic circuit and the output from the second 1H delay circuit, a level control circuit for controlling the level of an output from the adder, and a switching device for sequentially providing an output from the level control circuit to first and second output terminals one for each horizontal period and also for sequ

Abstract: A sound and image transmission system which is applicable to television-telephony, uses a single transmission line and multiplexes the image signal and the sound signal with an output which is essentially identical to the rhythm of an encoded image and the sound of the latter image. The encoder and decoder for the image processing lines function for only part of the time, but faster than if they functioned continuously.

Abstract: A signal combining circuit for adaptively combining first and second signals includes a comparator to develop a control signal to indicate when the combination of the first and second signals will have an amplitude exceeding a predetermined amplitude in one polarity sense. In the absence of the control signal the first and second signals are combined. On the occurrence of the control signal the first signal is combined with a further signal related to the first signal and a reference value.

Abstract: A synchronizing signal separation circuit for separating a composite synchronizing signal having a variable peak voltage subject to changes from a composite video signal, the composite synchronizing signal including a vertical synchronizing signal having a predetermined level for controlling vertical scanning in a television receiver. The separation circuit includes a composite separation circuit for separating the composite synchronizing signal from the composite video signal received from a source of video signals and a charge control circuit for maintaining the stability and the predetermined level of the vertical synchronizing signal after changes in synchronizing signal peak voltage.

Abstract: A time compressed color difference signal included in a high definition television signal is roughly compensated for its units of an interval of one-half of a transmission sampling interval in a range obtained by multiplying the amount of a horizontal motion vector by a compression rate. In addition, the time compressed color difference signal roughly compensated for its finely compensated for in a horizontal direction in units of an interval of one-half of the transmission sampling interval or less by a one-dimensional or two-demensional spacial filter. Futhermore, the time compressed color difference signal is compensaed for in a vertical direction by a distance corresponding to the amount of a vertical motion vector.