Patents Examined by Michael E. Adjodha
  • Patent number: 5693234
    Abstract: With the proposed method, a masking device (5) with an aperture (6) is placed on the substrate (8), the masking device (5) and the region to be etched (90) on the substrate surface (9) forming a hollow chamber (11) which communicates with the reaction chamber (4) only via the aperture (6). The recess (10) is produced with the aid of corrosive radicals produced in the reaction chamber. In this way, a recess (10) with a smooth and precisely adjustable depth contour is obtained.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: December 2, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventor: Dethard Peters
  • Patent number: 5690838
    Abstract: A magnetic recording medium excellent in corrosion resistance and rubbing reliability is realized by forming a number of concavities and convexities on the surface of a protective layer formed on a substrate and applying dry etching with a noble gas after the formation of the concavities and convexities to form a modified layer having hydrophobic nature on the surface of the protective layer.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: November 25, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Yoshihiro Moriguchi, Youichi Inomata, Hiroshi Yashiki, Yoshiki Kato, Kenichi Gomi, Hideaki Tanaka
  • Patent number: 5690841
    Abstract: A method of producing sealed cavity structures in the surface layer of a selectively etchable substrate (1), comprises: a) depositing a masking layer (2) of etchable material on the substrate (1), b) by means of etching, opening at least one hole (3) in the masking layer (2) down to the substrate surface, c) through said hole or holes (3) in the masking layer (2) selectively etching the substrate (1) in under the masking layer (2) so as to form one more cavities (4) which extend under the masking layer, and d) sealing said hole or holes (3) in the masking layer (2).
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: November 25, 1997
    Assignee: Pharmacia Biotech AB
    Inventor: H.ang.kan Elderstig
  • Patent number: 5688410
    Abstract: An object of the invention is to enhance the ashing speed of resist. A parallel plate electrode type plasma etching device is used in a mixed gas atmosphere of SF.sub.6 gas and O.sub.2 gas with the concentration of SF.sub.6 gas defined within 5 vol. % to 15 vol. %. A substrate to be treated, coated with a resist of hydrocarbon polymer is placed on a lower electrode. A high frequency electric power is applied to an upper electrode and lower electrode placed parallel to each other, and a plasma of mixed gas is generated in the reactor. A chemical reaction is induced in the resist and active ions of the plasma to vaporize and remove the resist.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 18, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaru Kajitani, Satoshi Yabuta, Katsuhiro Kawai, Masaya Okamoto
  • Patent number: 5688360
    Abstract: A semiconductor wafer polishing apparatus includes a housing and a turntable mounted in the housing. The turntable has an axis of rotation and a surface for affixing a semiconductor wafer. The polishing apparatus also includes a motor mounted to the housing and connected to the turntable to supply a torque for rotating the turntable about the axis of rotation. A polishing assembly is connected to the housing and extends adjacent to the turntable surface. A polishing pad is affixed to the polishing assembly and is positionable to contact the semiconductor wafer. Some polishing pads are cylindrical in form. Other polishing pads have a conical form.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: November 18, 1997
    Assignee: National Semiconductor Corporation
    Inventor: Rahul Jairath
  • Patent number: 5688383
    Abstract: A method for decreasing the microwave surface impedance of high-temperature superconducting thin films comprises (a) applying, preferably by spin-coating, a protective coating (preferably poly(methyl methacrylate) or polyimide) to the surface of a high-temperature superconducting thin film, such as Tl.sub.2 Ba.sub.2 CaCu.sub.2 O.sub.8 ; (b) exposing the coated thin film to low angle ion milling at an incident angle of 5.degree. to 30.degree. (preferably 10.degree. to 20.degree.) relative to the surface of the coated film; and (c) optionally including the step of removing any residual protective coating from the surface of the thin film, such as by exposure to an oxygen plasma.
    Type: Grant
    Filed: February 22, 1996
    Date of Patent: November 18, 1997
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Philip Shek Wah Pang
  • Patent number: 5688409
    Abstract: A new process and an improved process for fabricating device layers with ultrafine features. In one embodiment a device layer to be patterned is deposited above a substrate and a photoresist layer is deposited above that device layer. A reticle having a first transparent layer and a second opaque layer is used to pattern the photoresist layer. The reticle includes a first region with a first phase and a second region with a second phase such that the incident radiation is shifted when passing through the reticle. The second reticle layer is disposed above the first reticle layer and proximate to the location where the first region transitions to the second region of the first reticle layer. A stepper is used to expose the photoresist to radiation through the reticle. The critical dimensions of the device layer being patterned are controlled by adjusting the partial coherence of the stepper during exposure.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: November 18, 1997
    Assignee: Intel Corporation
    Inventors: Giang T. Dao, Joseph C. Langston
  • Patent number: 5688411
    Abstract: A removing unit for removing coating from the edge of a substrate has a vertical unit body housing a pair of pipes connected to a solvent reservoir and having respective solvent supply parts. The unit body has a head disposed in an upper end portion thereof. The head has a horizontal slot which opens at opposite ends thereof and at one side thereof for receiving an edge of a substrate. Solvent is supplied into the slot, drawn therealong and discharged from an end of the slot, all in a contained manner. A edge of a substrate is horizontally inserted into the slot so as to be immersed in the solvent contained in the slot, and the unit body is moved along the substrate edge so that the solvent cleans undesired coating from the edge.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: November 18, 1997
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Junji Kutsuzawa, Yoshihito Kai, Hidenori Miyamoto, Futoshi Shimai
  • Patent number: 5685947
    Abstract: A chemical-mechanical polishing process is described that provides high etch rates while at the same time minimizing the consumption of abrasives. This is achieved by embedding and dispersing the abrasive within the body of the material that is to be subjected to chemical-mechanical polishing.
    Type: Grant
    Filed: August 3, 1995
    Date of Patent: November 11, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Huan Chi Tseng, Ying-Chen Chao
  • Patent number: 5686339
    Abstract: A method for fabricating a capacitor of a semiconductor device, includes the steps of: forming a first insulating layer and then a second insulating layer on the first insulating layer; removing the second insulating layer of a first electrode region of a capacitor; forming a side wall at a side of the second insulating layer; etching the first insulating layer by using the side wall of the second insulating layer as a mask so as to form a contact hole; forming a first electrode of a capacitor on the side wall and on the contact hole; forming a dielectric layer on the first electrode of the capacitor; and forming a second electrode of the capacitor on the dielectric layer.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: November 11, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventors: Chang-Jae Lee, Hwan Myeong Kim
  • Patent number: 5683595
    Abstract: A particle beam is irradiated locally to a film of an alloy or compound containing atoms of two or more elements, causing atoms of a specific element in the film to selectively recoil to the outside of the film, such that there is formed, inside of the film, a zone in the form of a pattern in which the rate of the atoms of the specific type is smaller than in other portions of the film. In the fine pattern thus formed, the thickness is substantially equal to that of the film, and other sizes are determined according to the particle beam irradiation zone. For example, when a focused ion beam is used as the particle beam, there can be formed a fine pattern on the 10-nm level with precision of the order of nm. This fine pattern can be a quantum wire, a quantum dot or the like. It is therefore possible to produce, with good reproducibility, a device in which a quantum effect has been utilized.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: November 4, 1997
    Assignee: Shimadzu Corporation
    Inventor: Shinji Nagamachi
  • Patent number: 5683596
    Abstract: A method for etching compound solid state material by a meltback method that provides fast etching speed and a smooth surface, and in which the problem of fast saturation of the solvent is solved, high workability is achieved, and the range of application targets is wide. Etching is performed at a desired location on the surface of the compound solid state material. A solvent for the material is placed in contact with a part of the surface of the material, and at least one part of the other surface of the solvent is placed in contact with the atmosphere, such that at least one volatile component of the structural component of the material that dissolves in the solvent easily evaporates.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: November 4, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Yawara Kaneko
  • Patent number: 5681424
    Abstract: A method of cleaning an etching chamber, with a high throughput, of a plasma processing apparatus for etching by use of hydrogen bromide (HBr) as an etching gas while holding a wafer on an electrode by electrostatic chuck. When the static charge on the wafer electrostatically chucked on the electrode is eliminated after the completion of the etching, O.sub.2 gas is introduced into the etching chamber from a gas flow-rate controller. A plasma of O.sub.2 gas is generated to cause the electric charge on the wafer to flow to the earth through the plasma, and at the same time, the interior of the etching chamber is cleaned.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: October 28, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Go Saito, Motohiko Yoshigai, Kenji Fujimoto
  • Patent number: 5679215
    Abstract: Surfaces having semiconductor oxides, metal oxides and hydrocarbons deposited thereon in a vacuum plasma processing chamber are in situ cleaned by introducing water vapor and SF.sub.6 and/or NF.sub.3 gas in the presence of a plasma discharge. The vapor and gas react to form gaseous HF, and an acidic gas including at least one of H.sub.2 SO.sub.4 and HNO.sub.3. The discharge ionizes and dissociates the HF and acidic gases to form gaseous reactants for the deposits. The reactants chemically react with the deposits, including the oxides and hydrocarbons, to vaporize these deposits. The vaporized deposits are pumped out of the chamber by the same pump which normally evacuates the chamber to a vacuum. Oxygen and/or H.sub.2 O.sub.2 vapors are introduced in the presence of the plasma to additionally clean the surfaces.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: October 21, 1997
    Assignee: Lam Research Corporation
    Inventors: Michael S. Barnes, Arthur Kenichi Yasuda
  • Patent number: 5679269
    Abstract: The present invention relates to semiconductor devices comprising as one of their structural components diamond-like carbon as an insulator for spacing apart one or more levels of a conductor on an integrated circuit chip. The present invention also relates to a method for forming an integrated structure and to the integrated structure produced therefrom. The present invention further provides a method for selectively ion etching a diamond-like carbon layer from a substrate containing such a layer.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: October 21, 1997
    Assignee: International Business Machines, Corp.
    Inventors: Stephan Alan Cohen, Daniel Charles Edelstein, Alfred Grill, Jurij Rostyslav Paraszczak, Vishnubhai Vitthalbhai Patel
  • Patent number: 5676852
    Abstract: This invention involves a fiber probe device and a method of making it. The probe includes a relatively thick upper cylindrical portion, typically in the form of a solid right circular cylinder, terminating in a tapered portion that terminates in a relatively thin lower cylindrical portion, typically also in the form of a solid right circular cylinder, the lower portion having a width (diameter) in the approximate range of as little as approximately 0.05 .mu.m.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: October 14, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Robert William Filas, Herschel Maclyn Marchman
  • Patent number: 5676854
    Abstract: A transparent substrate of an optical memory is produced by injection molding using a stamper. Grooves and lands are alternately arranged on the optical memory, for tracking of light converged on the optical memory. The groove width is set in the range of 0.3 .mu.m to 0.4 .mu.m and the groove depth is set in the rage of 80 nm to 100 nm. A decrease in the width of a land at each edge is restrained to 0.2 .mu.m in maximum. With such dimensions, even when the track pitch is set to about 1.4 .mu.m, it is possible to obtain a track crossing signal with intensity sufficient for performing an access operation to a target track. Moreover, since the dimensions bring about an improved reflectance at a land, the optical memory achieves an improved C/N and recording density.
    Type: Grant
    Filed: August 1, 1996
    Date of Patent: October 14, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuya Inui, Akira Takahashi, Kenji Ohta, Michinobu Mieda, Yoshiteru Murakami
  • Patent number: 5674407
    Abstract: A method of fabricating an anode plate 80 for use in a field emission device comprising the steps of providing a substantially transparent substrate 70, depositing a layer of a transparent, electrically conductive material 90 on a surface of the substrate, and then removing portions of said layer of conductive material to leave stripes of said conductive material 90.sub.R, 90.sub.G, 90.sub.B. The stripes of conductive material have a first and second corner 84, 88 distal from the substrate 70. The first and second corners 84, 88 of the stripes of conductive material are rounded and luminescent material 74 is applied on the conductive stripes 90. The first and second corners 84, 88 are rounded by applying voltage to the stripes 90 and then etching the stripes to form the rounded corners 84, 88.
    Type: Grant
    Filed: July 3, 1995
    Date of Patent: October 7, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: Kenneth G. Vickers
  • Patent number: 5670011
    Abstract: A workpiece such as a semiconductor wafer is polished to a flat mirror finish. The workpiece is held by a top ring, and a lower surface of the workpiece is polished by pressing the workpiece against an abrasive cloth mounted on a turntable while applying an abrasive solution onto the abrasive cloth. While the workpiece is being polished, an upper surface of the semiconductor wafer is prevented from being etched by supplying a neutralizer between the upper surface of the semiconductor wafer and the holding surface of the top ring.
    Type: Grant
    Filed: May 2, 1996
    Date of Patent: September 23, 1997
    Assignee: Ebara Corporation
    Inventors: Tetsuji Togawa, Norio Kimura
  • Patent number: 5667629
    Abstract: An apparatus and method for determination of the endpoint for chemical mechanical polishing of a layer of dielectric material formed on an integrated circuit wafer. A first voltage is generated which is proportional to the current supplying electrical power to the electric motor driving the polishing mechanism. The current is proportional to the rate of removal of dielectric material by the polishing process. The integral over time of the first voltage, which is proportional to the amount of dielectric material removed, is generated by an integrator circuit. A comparator circuit compares the integral over time of the first voltage to a reference voltage. The reference voltage is proportional to the initial thickness of the dielectric material and is a function of the age of the polishing pad. When the integral over time of the first voltage is less than the reference voltage the polishing continues.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: September 16, 1997
    Assignee: Chartered Semiconductor Manufactuing Pte, Ltd.
    Inventors: Yang Pan, Jiazhen Zheng