Patents Examined by Michael E. Adjodha
  • Patent number: 5620614
    Abstract: A method of fabricating a pagewidth array of buttable printheads reduces end channel damage. The wafer containing a plurality of arrays of channels is provided with V-grooves. A V-groove is positioned between each array. When the wafer is secured to a wafer containing heater plates, wafers are diced along the V-shaped grooves to reduce damage to the end channels of the array to improve print quality.
    Type: Grant
    Filed: January 3, 1995
    Date of Patent: April 15, 1997
    Assignee: Xerox Corporation
    Inventors: Donald J. Drake, Almon P. Fisher
  • Patent number: 5611943
    Abstract: A method and apparatus for conditioning and/or rinsing a pad in a chemical-mechanical polisher. A scoring apparatus is rotated about its center directly over the polishing pad of the chemical-mechanical polisher. The scoring apparatus scores the pad surface while rotating above the pad. Consequently the pad is conditioned in a uniform and concentric fashion.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: March 18, 1997
    Assignee: Intel Corporation
    Inventors: Kenneth C. Cadien, Leopoldo D. Yau
  • Patent number: 5605601
    Abstract: A method of manufacturing a semiconductor device is obtained by which a desired pattern is formed, high yield of semiconductor devices can be achieved and the number of steps employed and hence production cost can be reduced. In the method of manufacturing a semiconductor device, a titanium silicide film and part of a polysilicon film are anisotropically etched under the conditions of Cl.sub.2 /NF.sub.3 =40/20 sccm and a gas pressure of 1.2 mTorr. Then, polysilicon film is anisotropically etched using a mixed gas of Cl.sub.2 and O.sub.2. NF.sub.3 completely dissociates. Nitrogen atoms serve as a strong protecting film for a sidewall of the pattern so that side-etching does not occur, thereby providing a desired pattern shape. Since each film is etched in the same device, the number of steps employed and hence production cost can be reduced. Furthermore, production of foreign particles can be reduced and hence high yield of semiconductor devices can be achieved.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: February 25, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Satoshi Kawasaki
  • Patent number: 5597444
    Abstract: Disclosed is a semiconductor etching method comprising exposing the wafer surface, in a plasma etching apparatus, to a radio-frequency plasma comprising a mixture of a noble gas and a saturated or unsaturated reduced carbon compound selected from the group consisting of acetylene (C.sub.2 H.sub.2), benzene (C.sub.6 H.sub.6), graphite or buckminsterfullerene (C.sub.60) and a halogen compound selected from the group consisting of fluorine, chlorine, bromine, hydrogen chloride, hydrogen fluoride, hydrogen bromide, sulphur hexafluoride and nitrogen trifluoride.
    Type: Grant
    Filed: January 29, 1996
    Date of Patent: January 28, 1997
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 5597438
    Abstract: An etch chamber for anisotropic and selective etching of a semiconductor wafer contains a dielectric window and an externally located first electrode member adjacent to the dielectric window for generating a plasma within the chamber. A second electrode member is located within the chamber for exciting the plasma generated by the first electrode member. A third electrode is located between the first electrode member and the dielectric window for sputtering the dielectric window to provide sidewall passivation for anisotropic and selective etching of a semiconductor wafer located within said chamber. Each electrode member is powered by its own separate RF generator. This arrangement enables the independent control of each of the three electrode members to optimize the etching of the semiconductor wafer located within the chamber.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: January 28, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventors: Virinder S. Grewal, Volker B. Laux
  • Patent number: 5595627
    Abstract: A plasma etching apparatus has a lower electrode for supporting a semiconductor wafer in a processing room, an upper electrode opposite to the lower electrode, and an RF power supply for applying an RF power across the upper and lower electrodes. An SiN layer as an underlayer having a shoulder portion, and an SiO.sub.2 layer covering the SiN layer are disposed on the wafer. A contact hole is formed in the SiO.sub.2 layer by etching so as to expose the shoulder portion of the SiN layer. A processing gas contains C.sub.4 F.sub.8 and CO. To set the etching selection ratio of SiO.sub.2 /SiN, the discharge duration of each part of the processing gas is used as a parameter. The progress of dissociation of C.sub.4 F.sub.8 is controlled by selecting the discharge duration. The discharge duration is determined by the residence time of each part of the processing gas and the application time of an RF power.
    Type: Grant
    Filed: February 2, 1996
    Date of Patent: January 21, 1997
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba
    Inventors: Koichiro Inazawa, Shin Okamoto, Hisataka Hayashi, Takaya Matsushita
  • Patent number: 5593538
    Abstract: A wet etching process (10) etches sacrificial oxide on a substrate without damaging a polycrystalline silicon structure on the substrate. The etching process (10) includes dipping the substrate in a surfactant (11), submerging a portion of the substrate in a recirculating bath of the etchant while injecting an inert gas into the etchant (12) to purge the etchant of oxygen, rinsing the substrate in deionized water (14), submerging a portion of the substrate in a hydrogen peroxide solution (15), rinsing the substrate for a second time (17), and drying the substrate in isopropyl alcohol vapor (18). The inert gas injected into the etchant displaces oxygen dissolved in the etchant and protects the polycrystalline silicon structure from being etched.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: January 14, 1997
    Assignee: Motorola, Inc.
    Inventors: Michael J. Davison, Paul W. Dryer, Wendy K. Wilson
  • Patent number: 5587103
    Abstract: A composition for optimally removing or etching metallic alloys from chemically compatible substrates with minimal damage to the substrate. The preferred composition is Ammonium Fluoride, Hydrofluoric Acid, Nitric Acid, Phosphoric Acid and Water in a specified range of quantities used to selectively remove an Aluminum and Silicon Alloy and Titanium film from a chemically compatible substrate. The composition is placed in contact with Stainless Steel, Silicon, or other organic or metallic substrates to remove, etch, or pattern homogenous or layered Aluminum, Silicon, Titanium and Copper Alloys from the substrate with minimal etching to the underlying substrate.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: December 24, 1996
    Assignee: Harris Corporation
    Inventor: Timothy A. Dennis