Abstract: A sealed electrolytic capacitor package includes an electrolytic capacitor section enclosed in a metal housing having an elastomeric grommet sealed in an open end of the housing. At least one lead extends through a tapered hole in the grommet, the large opening end of the tapered hole being positioned at the inside face of the grommet. The grommet has a raised mesa portion of irregular shape at one of its faces to aid in sensing the proper grommet orientation for insertion of one or more leads during assembly.

Abstract: A semiconductor device comprising a plurality of cells is disclosed. Each cell contains at least one bi-polar transistor and a diode serially connected to the base of the transistor therein. Each cell is connected in parallel relation with each other cell. The diode in each cell is located in close proximity to the transistor therein so that the thermal gradient therebetween is small.

Abstract: The present invention pertains to a thyristor device comprising a semiconductor body having at least one emitter zone positioned at a major surface of the body. A base zone shares a portion of the major surface with the emitter zone and extends under the entirety of the emitter zone. The base zone and emitter zone form a PN junction at their interface. The portion of the base zone under the emitter zone has a plurality of low resistivity branches which have their common origin in the portion of the base zone located directly under the major surface.

Abstract: A semiconductor integrated circuit device which may be utilized as a Darlington circuit having an input stage and an output stage is disclosed. The Darlington may be characterized as having an increased isolation between the input stage and the output stage.

Abstract: It is frequently desirable to establish the level of charge in the first potential well of a CCD in accordance with an external electrical signal. Thermal noise associated with the output resistance of the external source gives rise to uncertainty in this charge level. The use of a floating diffused region as an intermediate receptacle for the charge introduced permits a substantial reduction in the magnitude of this uncertainty.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: A main semiconductor element is placed on a circuit chip; additionally, a compensating semiconductor element is placed thereon, the compensating semiconductor element being a diode, a substrate diode, a Schottky diode, a transistor with shortcircuited base emitter junction, open base transistor, or a resistor, the additional semiconductor element having one terminal connected to the main semiconductor and the other terminal either to the substrate or to a source of potential at least as large as the potential of the main element. The leakage current to be bypassed may affect the main element directly, particularly when the main element is operated in digital on-off mode, or indirectly by passing a compensating current which affects another element such as an operational amplifier, or provides directly for additional current compensating for leakage current of the main element.

Abstract: A semiconductor Hall element consists of a substantially rectangular main island and at least one small island of semiconductor material, one conductivity type disposed in an epitaxial semiconductor layer grown on a single crystal semiconductor substrate of the opposite conductivity type. In the main island, a pair of highly doped elongated current terminal regions of the one conductivity type are disposed, so that they are near and substantially parallel to a pair of sides of the main island, which are opposite to each other. At least a highly doped Hall signal voltage terminal semiconductor region of the one conductivity type is disposed in the small island. The Hall signal voltage terminal region has a protrusion having a small cross section, the extremity of which is slightly beyond one side of the main island which is perpendicular to the current terminal regions.

Abstract: A substantial increase in the reliability of metal-oxide-semiconductor field effect transistor (MOSFET) devices having a thin gate dielectric is achieved by providing a thin film of phosphosilicate glass (PSG) on the thin dielectric and completely covering the PSG layer with the gate metallization. The metallization extends over a thick film of phosphosilicate glass which is disposed on the thick insulator covering the source and drain regions.

Abstract: A rectifier comprising a vessel filled with an aqueous solution or dispersion of a purified polyelectrolyte, and two electrodes immersed therein, wherein the ratio S.sub.1 /S.sub.2 of the area S.sub.1 of one electrode at the portion immersed in the aqueous solution or dispersion to the area S.sub.2 of the other electrode at the portion immersed in the aqueous solution is from 1.5 to 300. When the electrode having the immersed area S.sub.1 in the rectifier is connected through input terminals to an alternating current source, a direct current is obtained through output terminals from the other electrode.

Abstract: A porous valve-metal capacitor is housed in a metal can and sealed therein by means of an outer glass-to-metal seal, an elastomeric bung and an inner plastic sealing member. The bung is compressed between these inner and outer sealing members so as to be highly strained, the ratio of the compressed to the uncompressed diameters thereof being at least 1.25 and the elastomeric bung being squeezed out radially to occupy at least 75% of the interface area between the inner and outer seals. This capacitor is capable of meeting the requirements of a severe test after 200 cycles from -55.degree. C to 125.degree. C.

Abstract: A MOS-FET (Metal-Oxide-Semiconductor Field Effect Transistor) comprises a semiconductor body, source and drain regions disposed in the body at portions separated from each other, a second semiconductor region having a higher impurity concentration than that of the body, formed by ion implantation in the body between the source and drain regions, a first semiconductor region having a lower impurity concentration than that of the second semiconductor region but a higher impurity concentration than that of the body, and having an opposite conductivity type to that of the second semiconductor region, formed by ion implantation, so that the second semiconductor region is very thin, and which has a very small amount of a minute current, that is a tailing current.

Abstract: The specification discloses a symmetrical semiconductor switch having a semiconductor body formed from a plurality of layers of alternating conductivity types to form a plurality of P-N junctions. Regions of one conductivity type are formed in the outer layers of the opposite conductivity type. Three electrodes contact the outer layers and the regions of the body to form a symmetrical semiconductor switch. Structure is provided on the outer layers of the body in order to degrade the lifetime of carriers which tend to move laterally across the switch in order to improve the switching time of the switch. In one embodiment, the structure comprises grooves formed in the outer layers of the body, the grooves being of sufficient width in order to substantially degrade the lifetime of carriers attempting to pass through layers adjacent the grooves. In another embodiment of the invention, carrier lifetime degrading material such as gold-doped glass is introduced into the body.

Abstract: A porous dielectric oxide film-forming metal anode capacitor is provided with an anode riser means that is able to absorb energy by deforming or flexing when subjected to compressive forces such as the forces resulting from a crimping operation in the construction of the capacitor. The anode riser means comprises one or more continuous lengths of metal with at least a portion of one of the lengths in the shape of a bight.

Abstract: A semiconductor controlled rectifier comprising a semiconductor substrate having four layers of PNPN types, a pair of main electrodes respectively in ohmic contact with the opposite outer layers, a gate electrode provided to the intermediate P-type layer, a N-type auxiliary region formed in the P-type intermediate layer at such a location that the gate electrode is positioned between the outer N-type layer and the auxiliary region, an auxiliary electrode in contact with the auxiliary region and the P-type intermediate layer, and means for short-circuiting a part of a PN junction formed between the N-type outer layer and the P-type intermediate layer.

Abstract: A cathode electrode of copper-based material adapted for use in an electrical device is provided with a layer composed of at least one compound from the group of copper selenide, copper telluride and copper sulfide by the reaction between the copper-based cathode electrode and an appropriate reactive compound of selenium, tellurium or sulfur. When utilized in an electrolytic capacitor, the layer on the cathode electrode helps to depolarize the capacitor and helps to increase the capacitance of the cathode electrode.

Abstract: A solid state amplifier device which comprises contiguous layers of material forming emitter, base, and collector electrodes, preferably, the emitter electrode-forming layer being made of a semiconductor switch material which, when a voltage above a given threshold voltage is applied to opposite sides thereof, switches from a relatively non-conductive to a relatively operative conductive state. In one form of the invention providing maximum amplification, the collector electrode and base electrode-forming layers are made of extrinsic semiconductor materials of opposite conductivity type and, in its conductive state, the switch material of the emitter-forming layer is of the same conductivity type as the collector electrode-forming layer to form a transistor-like device. In another form of the invention, to provide a radiation hard amplifier device, the base electrode and collector electrode-forming layers are also made of a semiconductor switch material of the type described.

Abstract: A semiconductor photovoltaic device is comprised of 2n layers of alternating p-type and n-type material having respective PN junctions between adjacent layers, wherein n is an integer greater than 1. Each layer has a thickness which is less than the diffusion length of a minority carrier therein. The PN junctions are excited by light which is incident on the device to thereby cause majority carriers to be accumulated in the respective layers so as to forward bias all of the PN junctions. As a result of this forward biasing, minority carriers are injected across a first PN junction fr0m one layer into an adjacent layer and then traverse the next PN junction into the next succeeding layer. The photovoltaic device thus is adapted to supply a voltage and a current to a load.

Abstract: A polycrystalline silicon layer as a passivation layer formed on a semiconductor single crystal layer in a semiconductor device and in which polycrystalline silicon layer contains 2 to 45 atomic percent of oxygen. This layer can be formed under accurate control by utilizing a mixed gas of nitrogen oxide as an oxygen supply source and a silicon compound as a silicon supply source is thermally decomposed. The polycrystalline silicon is constituted of grains comprising single crystals of silicon. Oxygen atoms are uniformly distributed in the grains. Substantially no SiO.sub.2 layer exists between the grains and the semiconductor single crystal layer.

Abstract: A self-protected thyristor structure is provided having an auxiliary gate region peripherally located with respect to the semiconductor device so as to provide for the controlled turn-on of the device at the edge thereof in response to increasing edge current densities at the onset of avalanche breakdown. An auxiliary pilot thyristor is provided substantially surrounding the main thyristor structure and including an annular gate electrode surrounding the auxiliary pilot thyristor structure to insure that turn-on occurs substantially simultaneously throughout the extent of the pilot thyristor region.