Abstract: A multilayer ceramic capacitor includes a ceramic body including a dielectric layer and having first and second surfaces opposing each other in a width direction, third and fourth surfaces connecting the first and second surfaces in a length direction, and fifth and sixth surfaces opposing each other in a thickness direction, internal electrodes disposed inside the ceramic body, exposed through the first and second surfaces, and having one end portion exposed through the third or fourth surface, and first and second side margin portions disposed on edges of the internal electrodes, exposed through the first and second surfaces. In a cross-section cut along a width-thickness plane of the ceramic body, an area of an oxide region disposed on the edges of the internal electrodes is less than 10% of an overall area of the internal electrodes exposed through the first and second surfaces.

Abstract: A chip electronic component includes a stack, a first external electrode disposed at least on a first end surface and a first main surface of the stack, a second external electrode disposed at least on a second end surface and a first main surface of the stack, a first bump disposed at least on a portion of the first external electrode on the first main surface, and a second bump disposed at least on a portion of the second external electrode on the first main surface. The first bump and the second bump each have a porosity greater than or equal to about 5% and less than or equal to about 40%.

Abstract: A solid electrolytic capacitor comprising a capacitor element that contains a sintered porous anode body formed from a valve metal powder having a specific charge of about 50,000 ?F*V/g or more, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric that includes a conductive polymer is provided. The capacitor exhibits an anomalous charging current of about 0.25 amps or less when charged at a constant voltage rate increase of 120 volts per second, determined at a temperature of 23° C. and voltage of 16 volts.

Abstract: A multilayer electronic component includes a body including a first internal electrode and a second internal electrode alternately disposed in a first direction with a dielectric layer interposed therebetween, and including a first surface and a second surface opposing each other in the first direction, a third surface and a fourth surface opposing each other in a second direction, and a fifth surface and a sixth surface opposing each other in a third direction. A first external electrode is disposed on the third, fourth, fifth, and sixth surfaces. A second external electrode is disposed on one or more of the first and second surfaces, and a via electrode is exposed through a surface on which the second external electrode is disposed. A ratio W/L is 0.95 or more and 1.05 or less, where L is a length of the body and W is a width of the body.

Abstract: A multilayer ceramic capacitor includes a ceramic body including a dielectric layer, a plurality of first and second internal electrodes disposed inside the ceramic body, exposed to the first and second surfaces, and having ends exposed to the third or fourth surface, and a first side margin portion and a second side margin portion disposed on side portions of the plurality of first and second internal electrodes exposed to the first and second surfaces. A ratio Db/Da satisfies 1.00 to 1.07, inclusive, where ‘Db’ is a distance, in a stacking direction of the dielectric layer, between both end points of respective edge regions of the first side margin portion and the second side margin portion, and ‘Da’ is a distance in a central region of the ceramic body in the stacking direction.

Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

Abstract: A multilayer ceramic capacitor include: a ceramic body including first and second surfaces opposing each other and third and fourth surfaces connecting the first and second surfaces; a plurality of internal electrodes disposed inside the ceramic body and exposed to the first and second surfaces, the plurality internal electrodes each having one end exposed to the third or fourth surface; and first and second side margin portions disposed on sides of the internal electrodes exposed to the first and second surfaces. A dielectric composition of the first and second side margin portions is different from a dielectric composition of the ceramic body, and a dielectric constant of the first and second side margin portions is lower than a dielectric constant of the ceramic body.

Abstract: A multilayer ceramic electronic component includes a ceramic body includes: a ceramic body including a capacitance formation portion including a dielectric layer and first and second internal electrodes disposed to be stacked in a third direction with the dielectric layer interposed therebetween, a margin portion disposed on both surfaces of the capacitance formation portion in a second direction, and a cover portion disposed on both surfaces of the capacitance formation portion in the third direction, and; and an auxiliary electrode spaced apart from the capacitance formation portion, and disposed to be in contact with one of the first and second external electrodes. The auxiliary electrode is spaced apart from first surface and the second surface of the ceramic body in a first direction.

Abstract: A multilayer ceramic electronic component includes a stacked body and external electrodes provided on two end surfaces of the stacked body. Each external electrode includes an underlying electrode layer including a conductive metal, a resin electrode layer including a resin and metal component, a resin layer including a resin and no metal component, and a metal layer. The underlying electrode layers extend from the two end surfaces to cover a portion of two main surfaces and two lateral surfaces. The resin electrode layers cover the underlying electrode layers provided on the two end surfaces. The resin layers are connected to the resin electrode layers and provided on the underlying electrode layers located on a portion of the two main surfaces and two lateral surfaces. The metal layers cover the surfaces of the resin electrode layers and resin layers.

Abstract: A multilayer electronic component includes a body, a protrusion disposed on at least one surface of the body, and an external electrode having an electrode layer disposed on a side surface of the body and extending to be in contact with a side surface of the protrusion and a conductive resin layer disposed on the electrode layer and extending to cover a portion of the protrusion.

Abstract: A multilayer capacitor and a board on which the multilayer capacitor is mounted provide increased capacitor effective area. The multilayer capacitor includes a capacitor body having first and second dielectric layers each with first and second internal electrodes, first and second external electrodes disposed on a surface of the capacitor body, a first via electrode connecting the first internal electrodes to the first external electrode, and a second via electrode connecting the second internal electrodes to the second external electrode. The first and second dielectric layers are alternately stacked in the first direction such that the first internal electrode of the first dielectric layer overlaps the second internal electrode of the second dielectric layer in a first direction, and the second internal electrode of the first dielectric layer overlaps the first internal electrode of the second dielectric layer in the first direction.

Abstract: A capacitor component includes a body including a dielectric layer, a first electrode and a second internal electrode, laminated in a first direction, opposing each other, and a first cover portion and a second cover portion, disposed on outermost surfaces of the first and second internal electrodes, each having a thickness of 25 ?m or less, a first electrode layer and a second electrode layer, respectively disposed on both external surfaces of the body in a second direction perpendicular to the first direction and respectively, and plating layers, respectively disposed on the first and second electrode layers. A metal oxide is disposed on a boundary between the first electrode layer and the plating layer and a boundary between the second electrode layer and the plating layer.

Abstract: The present disclosure provides supercapacitors that may avoid shortcomings of current energy storage technology. Provided herein are materials and fabrication processes of such supercapacitors. In some embodiments, an electrochemical system comprising a first electrode, a second electrode, wherein at least one of the first electrode and the second electrode comprises a three dimensional porous reduced graphene oxide framework.

Abstract: A sturdy electronic device is provided. A reliable electronic device is provided. A novel electronic device is provided. An electronic device includes a first board, a second board, a display portion having flexibility, and a power storage device having flexibility. The first board and the second board face each other. The display portion and the power storage device are provided between the first board and the second board. The display portion includes a first surface facing the power storage device. The first surface includes a first region not fixed to the power storage device. The first region overlaps with a display region of the display portion.

Abstract: A system and method for connecting supply power to motor control components includes use of a motor control center subunit with moveable supply power contacts. After a motor control center subunit is secured into a motor control center compartment, the supply power contacts may be advanced to engage supply power buses. For disconnection, the supply power contacts may be retracted and isolated from the buses before physical removal of the subunit.

Abstract: A multilayer ceramic electronic component includes a ceramic body including a dielectric layer and a plurality of internal electrodes disposed to oppose each other with the dielectric layer interposed therebetween, and an external electrode formed outside the ceramic body. The external electrode includes an electrode layer, and a thickness T1 of the electrode layer corresponding to a central region of the ceramic body in a thickness direction is 5 ?m or more and 30 ?m or less, a thickness T2 of the electrode layer corresponding to a region in which an outermost internal electrode is located is 5 ?m or more and 15 ?m or less, and a thickness T3 of the electrode layer corresponding to a corner portion of the ceramic body is 0.1 ?m or more and 10 ?m or less.

Abstract: A chip component includes a substrate that has a first surface and a second surface on a side opposite to the first surface, a plurality of wall portions that are formed on a side of the first surface by using a part of the substrate, that have one end portion and one other end portion, and that are formed of a plurality of pillar units, a support portion that is formed around the wall portions by using a part of the substrate and that is connected to at least one of the end portion and the other end portion of the wall portions, and a capacitor portion formed by following a surface of the wall portion, in which each of the pillar units includes a central portion and three convex portions that extend from the central portion in three mutually different directions in a plan view and in which the wall portion is formed by a connection between the convex portions of the pillar units that adjoin each other.

Abstract: A multilayer ceramic capacitor includes a laminated body including a plurality of dielectric layers and a plurality of internal electrodes that are alternately laminated, and a first external electrode and a second external electrode provided on the surface of the laminated body. The first external electrode is provided on a first end surface of the laminated body, and extends from the first end surface of the laminated body to form a portion of the first side surface and a portion of the second side surface. The plurality of internal electrodes includes a first internal electrode and a second internal electrode. The first internal electrode is exposed at the first side surface and the second side surface of the laminated body and electrically connected to the first external electrode, and is not exposed at the first end surface of the laminated body.

Abstract: An electronic component includes an element body and an external electrode disposed on the element body. The external electrode includes a conductive resin layer, a solder plating layer arranged to constitute an outermost layer of the external electrode, and an intermediate plating layer disposed between the conductive resin layer and the solder plating layer. The intermediate plating layer has better solder leach resistance than metal contained in the conductive resin layer. An opening is formed in the intermediate plating layer. The solder plating layer is formed on the conductive resin layer through the opening.

Abstract: A multilayer capacitor includes a capacitor body including first and second dielectric layers, a plurality of internal electrodes, and a plurality of second internal electrodes, and first and second external electrodes. First and second internal electrodes are disposed in one of the first dielectric layers to be spaced apart from each other. The first and second internal electrodes are disposed in one of the second dielectric layers to be spaced apart from each other. The first and second dielectric layers are alternately laminated in the first direction, such that the first internal electrode of the first dielectric layer and the second internal electrode of the second dielectric layer overlap each other in the first direction and the second internal electrode of the first dielectric layer and the first internal electrode of the second dielectric layer overlap each other in the first direction.