Patents Examined by Michael W. Maddox
  • Patent number: 6009126
    Abstract: Known is a zero intermediate frequency receiver or zero-IF receiver in which DC-offset correction is done in the I- and Q-paths, after mixing down of the received RF-signal or of an IF-signal. Such a DC-offset correction is not sufficient for high gain I- and Q-paths, particularly not in pagers for receiving long messages. Furthermore, no optimal power saving is achieved if such a receiver alternately operates in receive mode and sleep mode. A zero intermediate frequency receiver is proposed in which DC-offset correction is distributed over the high gain I- and Q-path. Preferably, blocking means are provided between DC-offset correction circuits and low pass filters in the I- and Q-path to prevent that an output signal of an upstream DC-offset correction circuit in the path excites a downstream low pass filter in the path during DC-offset correction. Herewith, considerable power savings are achieved.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: December 28, 1999
    Assignee: U.S. Philips Corporation
    Inventor: Adrianus Van Bezooijen
  • Patent number: 6005901
    Abstract: A communication system includes a data sampling rate converter that uses a closed-loop control arrangement to convert an input signal at a first sampling rate to a second, asynchronous, sampling rate without requiring extensive output buffering. A small number of data registers in a first-in-first-out output buffer is used to receive and store computed data samples at a controlled rate and to pass these data samples to the output at a second rate. The output buffer indicates, the current capacity of the output buffer for use by a frequency ratio estimator, which is arranged to respond by providing an estimate of the actual ratio between the first rate and the second rate. A controller responds to the frequency ratio estimator by generating the controlled rate at which the computed data samples are to be passed to the output buffer. In this manner, the processed data samples are passed to the output buffer at the controlled rate and are output at the second rate.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: December 21, 1999
    Assignee: Advanced Micro Devices
    Inventor: Alfredo R. Linz
  • Patent number: 6005902
    Abstract: Synchronizing a local timing unit to a central timing unit in a first switching system to determine the difference in timing between a connected external link and the local timing unit. This timing difference is then transmitted to the central timing unit which utilizes this information to adjust a frequency synthesizer that outputs the frequency of the external link to a second switching system. The local timing units are synchronized to the central timing unit via multiple timing paths set up through switching units within a switching network of the first switching system. The timing difference transmitted from the local timing unit is transmitted over a plurality of control paths through the switching units. Each switching unit switches one bit of data for each group of data being received on each of the external links connected to the first switching system. Any of the external links connected to the first switching system can be utilized to provide timing information for the second switching system.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: December 21, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: James R. Bortolini, Stefano Mimmi
  • Patent number: 6002710
    Abstract: In a digital communication system for voice signals, a system and method for recovering the timing of a pseudo-random noise (PN) sequence used for direct-sequence spreading and despreading of the communicated signals. In one embodiment, a received signal is a time-division duplexing (TDD) or time-division multiple access (TDMA) signal, and a receiver performs a complete "sliding correlator" examination of the received signal in a fixed time by using the timing of the TDMA or TDD frames. This examination allows a rapid initial acquisition of the PN synchronization. In another embodiment of the receiver, the initially acquired PN phase is verified by reading a SYNC field from the received signal and by checking that shifting the receiver's local PN phase results in a degraded correlation between the local PN sequence and the received signal.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: December 14, 1999
    Assignee: DSP Group, Inc.
    Inventors: Alan F. Hendrickson, Ken M. Tallo
  • Patent number: 6002729
    Abstract: For frame synchronization, the time position of a synchronization sequence in a received data stream is determined before the frequency and phase synchronization according to the principle of the maximum likelihood theory; the maximum amount of the correlation between the differentially decoded, received data sequence with the conjugated-complex, differentially decoded synchronization sequence known at the reception side is thereby taken into consideration.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: December 14, 1999
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Kurt Schmidt
  • Patent number: 6002709
    Abstract: In a direct sequence spread spectrum digital communication receiver, a system and method for recovering and verifying the timing or phase of a pseudo-random noise (PN) sequence used for despreading received signals. In one embodiment, the method includes steps of: (a) determining an initial value of a received PN phase, (b) setting the receiver's PN phase equal to the initial value of the received PN phase, (c) a first testing to verify that the receiver identifies a SYNC field within a testing time of predetermined duration, (d) a second testing, to verify that temporarily shifting the receiver's PN phase results in a degraded correlation between the receiver's PN sequence and the received signal, and (e) repeating steps (a)-(d) if either of the testings indicate that the receiver's PN sequence is not correct.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: December 14, 1999
    Assignee: DSP Group, Inc.
    Inventor: Alan F. Hendrickson
  • Patent number: 6002725
    Abstract: An M-ary FSK receiver in which a frequency down-converted signal is treated as an M-ary DPSK signal with symbol repetition coding. The output of a frequency demodulator (20) is integrated (22) over an optimally chosen time interval which is a fraction of the symbol interval to obtain N phase change estimates per symbol. These N sub-symbols are manipulated (24, 26) to obtain corresponding soft decisions which are then summed (32, 34) over a symbol period (or a substantial fraction thereof) to provide an overall soft decision for each bit comprising an M-ary symbol. These outputs may be used directly as soft decisions for forward error correction or applied to a threshold circuit to obtain hard decisions.
    Type: Grant
    Filed: August 20, 1997
    Date of Patent: December 14, 1999
    Assignee: U.S. Philips Corporation
    Inventor: Charles J. H. Razzell
  • Patent number: 5999577
    Abstract: A circuit is provided by which in the case of the transmission of a short packet signal through an FSK transmission channel having a frequency error for transmission and reception, directly from one shaped rectangular pulse of a frequency detected bit synchronization signal having a DC offset (this pulse including a bias distortion as it is) a clock signal can be generated indicating the points of time when the base-band signal passes through its center level and the point of time when it arrives its maximum or minimum value (data sampling points of time). This invention utilizes the fact that the bit synchronization signal is in the form of a sine wave because it has been band limited.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: December 7, 1999
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 5995550
    Abstract: The present invention is a method and apparatus for decoding a coded signal in a communication system. The coded signal is processed through digital signal processing to produce decision metrics representing the coded signal, and the metrics are scaled according to a soft-limiting function before being received by a decoder for decoding the coded signal. The soft-limiting function is a piecewise linear function, a piecewise nonlinear function, or a combination of piecewise linear and nonlinear functions. The soft-limiting, in the alternative, is performed on a result of a weighting function performed, in parallel of the decision metrics, on the coded signal. The result of the soft-limiting is then multiplied with a result of the decision metrics prior to the decoder. The decoder may a Viterbi decoder while the communication system may be a Code Division Multiple Access (CDMA) communication system.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: November 30, 1999
    Assignee: Motorola, Inc.
    Inventors: Hua Xu, Fuyun Ling
  • Patent number: 5995557
    Abstract: To detect a dual tone pair signal in a telephone communication system, the signal is sampled at the Nyquist frequency. The sampled signal is filtered to determine the top three tone frequency power results. The input signal is then resampled at one-half of the Nyquist frequency. The resampled signal is filtered to determine signal power in the row and column frequency bands. The top three power results from tone filtering and aliasing row and column band pass filter power results are checked for lack of excess power to reject false digits.
    Type: Grant
    Filed: June 12, 1997
    Date of Patent: November 30, 1999
    Assignee: Nortel Networks Corporation
    Inventor: Balaji Srinivasan
  • Patent number: 5991346
    Abstract: A method for determining the best time to sample data bits of a data bit stream of a received information signal in a digital communication system includes the steps of determining the current derivative of a respective sample of the information signal, weighting the sample by a predetermined amount, determining an accumulated derivative value for the same sample number of a previous symbol of the information signal, weighting the previous accumulated derivative value by another predetermined amount, summing the two weighted values together and assigning this accumulated derivative value to the respective sample. The method further includes the step of comparing the accumulated derivative values of a predetermined number of consecutive samples to determine which sample has the greatest accumulated derivative value. The sample having the greatest accumulated derivative value substantially corresponds to the beginning of a symbol.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 23, 1999
    Assignee: Uniden San Diego Research and Development Center, Inc.
    Inventor: Keh-Shehn Lu
  • Patent number: 5982825
    Abstract: At a transmitter side, signals are provided with a delay difference with a plurality of branches, coded multiplexed by spectrum spreaders and a combination unit, and transmitted by a single antenna. At a receiver side, the signals are received by a single antenna, and diversity branches are extracted and separated by first and second spectrum de-spreaders. They are subject to linear combination so that the mean square of the decision error signals is minimized. The output passes through an adaptive matched filter and an adaptive equalizer so as to provide an output from which interference waves are eliminated. Thus, interference is eliminated and diversity gain for a signal is ensured, while reducing the scale and cost of a system without using a plurality of antennae.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: November 9, 1999
    Assignee: NEC Corporation
    Inventor: Ichiro Tsujimoto
  • Patent number: 5982819
    Abstract: A messaging receiver (400) and corresponding system (100b) and method adaptable to a plurality of modulation formats including; a processor (401) having flexible resources (404), preferably software based, for receiving a signal to provide a modulation identifier, and a controller (403), coupled to the processor, for deploying the flexible resources responsive to the modulation identifier. Alternatively the messaging receiver includes a buffer (412) for storing a signal having a modulation format, and the processor processes the signal in accordance with the plurality of modulation formats so as to differentiate the modulation format, and the controller deploys the flexible resources responsive to the modulation format.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: November 9, 1999
    Assignee: Motorola, Inc.
    Inventors: James E. Womack, John B. Gehman, E. Martin Hermesch, Steven J. Goldberg
  • Patent number: 5982810
    Abstract: A correlator used for spread spectrum communications which reduces consumed power. A signal extraction circuit (6) is provided for directly extracting phase information from an input signal which expresses two values of code data by each phase of a plurality of cycles. A signal transferring circuit (1) is connected to the signal extraction circuit (6) for transferring the phase information to a multiplying circuit (2) comprised of a plurality of multipliers. Signals in each cell of the signal transferring circuit (1) are multiplied by fixed coefficients within the multiplying circuit (2) and supplied to an adding circuit (3) for determination of a correlation peak value.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 9, 1999
    Assignee: New Japan Radio Co., Ltd.
    Inventor: Eiji Nishimori
  • Patent number: 5974088
    Abstract: A digital data slicer which can allow the digital sum value (DSV) of the sliced signal to approach zero is provided. The digital data slicer includes a comparator for comparing the input signal with an analog reference slice level to thereby generate the sliced signal. A DSV calculator is used to obtain the DSV of the sliced signal. A DSV processor is used to compare the DSV with a predefined tolerance window to thereby generate a digital correcting signal. A digital-to-analog (D/A) converter is then used to convert the digital correcting signal into an analog form which either raises or lowers the reference slice level to the comparator. This feedback control goes on until the DSV is within the range defined by the tolerance window.
    Type: Grant
    Filed: September 10, 1997
    Date of Patent: October 26, 1999
    Assignee: United Microelectronics Corp.
    Inventor: Andrew C. Chang
  • Patent number: 5963599
    Abstract: A truncated maximum likelihood sequence estimator that provides a best estimate of a transmitted symbol sequence includes a lookup table and a comparator. The lookup table may be responsive to at least a next sample of a received RF signal, a first decision made on a first previous sample of the RF received signal and a second decision made on the second previous sample of the RF received signal. The lookup table provides at an output at least one threshold value stored in the lookup table that is addressed by the next sample of the received signal, the first decision made on the first previous sample and the second decision made on the second previous sample. The comparator is coupled to the output of a lookup table and is responsive to the at least one threshold value and a current sample of the received RF signal. The comparator compares the current sample of the received RF signal with at least one threshold value and provides a best estimate of the transmitted symbol sequence.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: October 5, 1999
    Assignee: Raytheon Company
    Inventors: Robert G. Curtis, Wesley G. Brodsky
  • Patent number: 5956369
    Abstract: A multipath-combining subsystem for receiving a spread-spectrum signal arriving from a plurality of paths. A header-matched filter detects each match, within each path, of a header-chip-sequence signal with a first impulse response and outputs a header-detection signal having a header amplitude and a respective chip location. A data-matched filter detects at the respective chip location of each header-detection signal, a respective data-chip-sequence signal and outputs a data-detection signal having a data amplitude. A combiner multiplies the header amplitude of each header-detection signal and the data amplitude of the respective data symbol to generate a plurality of weighted elements for each data symbol. The combiner then adds the plurality of weighted elements for each data symbol as a sum signal of the respective data symbol.
    Type: Grant
    Filed: February 24, 1997
    Date of Patent: September 21, 1999
    Assignee: Golden Bridge Technology, Inc.
    Inventors: Sorin Davidovici, Jimmy Cuong Tran, Donald L. Schilling
  • Patent number: 5946356
    Abstract: Data transmission within a broad-band communication system occurs as follows: During time periods where a remote unit (113) is not actively communicating to a base station (100) utilizing either a fundamental or a supplemental channel, the remote unit (113) is actively or periodically monitoring a forward control channel (IS-95A paging channel) for notification of any pending transmission by the base station (100). The base station (100) determines that a high data rate transmission to the remote unit (113) needs to take place and determines if supplemental channel circuitry (105) is available for utilization. Shortly prior to supplemental channel availability, the base station (100) notifies the remote unit (113) of a pending data transmission and assigns the remote unit (113) a fundamental channel to establish an appropriate transmit power level. Finally, data transmission to the remote unit (113) takes place utilizing the supplemental channel.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: August 31, 1999
    Assignee: Motorola, Inc.
    Inventors: Kenneth A. Felix, Joseph Rinchiuso
  • Patent number: 5946352
    Abstract: A data processing device is programmed to decode and transform a stream of data representing a plurality of subband encoded channels of audio data into one or more channels of PCM encoded data for reproduction by a speaker subsystem. An improved method for decoding and transforming utilizes downmix matrices (1021 and 1022) to form downmixed frequency domain channels in buffers (1031-1034). Only two long DCT transform operations (1041 and 1042) and two short DCT transform operations (1043 and 1044) are needed to transform the downmixed frequency domain channels into a left PCM output (1071) and a right PCM output (1072).
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: August 31, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan Rowlands, Stephen (Hsiao Yi) Li, Frank L. Laczko, Sr., Maria B.H. Gill, David (Shiu W.) Kam, Dong-Seok Youm
  • Patent number: 5943379
    Abstract: A trapezoidal waveform synthesizer converts a digital phase error signal into a plurality of phase-separated trapezoidal analog waveforms. The trapezoidal waveform synthesizer includes an up/down counter that counts the positive and negative phase errors and generates a multi-bit, parallel digital counter output signal that indicates a cumulative current value of the phase errors. The counter output signal includes a least significant bit (LSB) portion and a most significant bit (MSB) portion. An upper PDM circuit converts the MSB portion of the output signal counter and a portion of the LSB portion of the counter output signal to a plurality of sets of serially-weighted multi-bit output signals. A lower PDM circuit converts the MSB and LSB portions of the counter output signal to a plurality of serially-weighted single-bit output signals.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: August 24, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Hee Wong, Gabriel Ming-Yu Li