Patents Examined by Midys Rojas
  • Patent number: 10970228
    Abstract: Apparatus and methods are disclosed, including using a memory controller to generate an encoded physical address using a run length encoding (RLE) algorithm on a physical address to reduce a length of the encoded physical address, and storing the encoded physical address as a map entry of a logical-to-physical (L2P)) table in a cache random access memory of the memory controller.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: April 6, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Stephen Hanna, Nadav Grosz
  • Patent number: 10949341
    Abstract: According to one general aspect, an apparatus may include a storage memory to store a plurality of key-value pairs. The apparatus may include at least one snapshot counter configured to store an operation number associated with a respective snapshot of the plurality of key-value pairs. The apparatus may include a snapshot data structure configured to identify, for at least one key-value pair, which, if any, snapshot(s) the respective key-value pair is associated with.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: March 16, 2021
    Inventors: Anahita Shayesteh, Jingpei Yang, Vijay Balakrishnan
  • Patent number: 10929057
    Abstract: Provided are techniques for selecting a disconnect from different types of channel disconnects using a machine learning module. An Input/Output (I/O) operation is received from a host via a channel. Inputs are provided to a machine learning module. An output is received from the machine learning module. Based on the output, one of no disconnect from the channel, a logical disconnect from the channel, or a physical disconnect from the channel is selected.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Beth A. Peterson, Lokesh M. Gupta, Matthew R. Craig, Kevin J. Ash
  • Patent number: 10922226
    Abstract: An example computing system includes a memory, a peripheral device configured to send a page request for accessing the memory, the page request indicating whether the page request is for regular memory or scratchpad memory, and a processor having a memory management unit (MMU). The MMU is configured to receive the page request and prevent memory pages from being marked dirty in response to the page request indicating scratchpad memory.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: February 16, 2021
    Assignee: XILINX, INC.
    Inventors: Jaideep Dastidar, Chetan Loke
  • Patent number: 10915250
    Abstract: Systems and methods for optimizing storage system performance are disclosed. A method includes: determining an expected lifetime of each of at least one computing instance; determining a disk data extent evaluation period for each of the at least one computing instance based on the determined expected lifetime; determining an input/output (I/O) wait time threshold for each of the at least one computing instance; determining an I/O wait time of each of the at least one computing instance using the determined disk data extent evaluation period; and in response to the determined I/O wait time of one or more of the at least one computing instance exceeding the determined I/O wait time threshold of the computing instance, moving at least one data extent associated with the one or more computing instance exceeding the determined I/O wait time threshold from hard disk drive storage to solid state drive storage.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: February 9, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edward R. Bernal, Ivan M. Heninger
  • Patent number: 10908822
    Abstract: An aspect of implementing bandwidth limits on replication sessions for a destination includes creating a list of routing modules having ownership of links going to the destination, calculating, by control modules, a proportionate share of a requested total bandwidth limit based on a number of slices owned and the number of routing modules. The proportionate share of the bandwidth limit is indicated by a budget value of a budget byte window (BBW). An aspect further includes prior to initiating a scan of the slices, identifying a BBW having a budget value equal or greater than the value, allocating the budget value to a thread, and reducing the budget value of the BBW by the predetermined value. An aspect also includes scanning the slices corresponding to the identified BBW, sending a number of bytes transmitted and corresponding number of pages to respective control modules resulting from the scanning, and updating corresponding BBW.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: February 2, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Archana Parasnis, William R. Stronge
  • Patent number: 10872039
    Abstract: A controller selects a redundancy context for eviction in response to a request for a redundancy context. The redundancy context includes buffer data and an identifier. The redundancy context is evicted by instructing a redundancy component to send the buffer data and identifier to a memory component to store in a buffer as an evicted context. The controller instructs the memory component to provide the evicted context for storage in a controller buffer. A new redundancy context is allocated to the requester following the eviction.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 22, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: James P. Crowley, Yuriy Pavlenko, Karl D. Schuh
  • Patent number: 10866895
    Abstract: A method of managing memory access includes receiving, at an input output memory management unit, a memory access request from a device. The memory access request includes a virtual steering tag associate associated with a virtual machine. The method further includes translating the virtual steering tag to a physical steering tag directing memory access of a cache memory associated with a processor core of a plurality of processor cores. The virtual machine is implemented on the processor core. The method also includes accessing the cache memory to implement the memory access request.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: December 15, 2020
    Assignees: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Philip Ng, Nippon Harshadk Raval, Francisco L. Duran
  • Patent number: 10860434
    Abstract: A method and system for enabling data backups for virtual machines reliant on raw data mapping (RDM) disks to store their state and/or data. Traditional virtual machine backup methodologies pivot on the generation and storage of virtual machine snapshots as copies of a virtual machine disk file, which store the state and/or data of a virtual machine at various given points in time. However, these traditional virtual machine backup methodologies, at least at present, do not support the generation and storage of virtual machine snapshots for virtual machines that particularly access and consolidate information on RDM disks. Accordingly, the method and system disclosed herein facilitate the backup of state and/or data pertaining to virtual machines reliant on RDM disks.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: December 8, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Shubhashish Mallik, Manish Sharma, Shelesh Chopra, Rintu Kumar Kanp, Challa Dharmateja, Krishnendu Bagchi
  • Patent number: 10838854
    Abstract: A data storage device may include a non-volatile memory device storing an address mapping table including a plurality of map segments and a controller including a random-access memory. The controller loads a compressed or non-compressed first map segment into the random-access memory based on meta-information of the first map segment in response to a read request received from a host device. The meta-information is stored in a map segment meta-information table stored in the random-access memory and the meta-information represents whether the map segments are compressible or not.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: November 17, 2020
    Assignee: SK hynix Inc.
    Inventors: Young Ick Cho, Byeong Gyu Park
  • Patent number: 10831386
    Abstract: Examples disclosed herein relate to a storage appliance using an optimistic allocation of storage space. In an example system, a number of storage drives are coupled to a storage controller and an RNIC (remote direct memory access (RDMA) network interface card (NIC)) through a storage network. The RNIC includes a layout template selector and a number of templates, wherein the layout template selector selects a template based, at least in part, on a logical block address (LBA) received from a host. The template identifies each of the plurality of storage drives associated with portions of data represented by the LBA.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: November 10, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Douglas L. Voigt
  • Patent number: 10831625
    Abstract: An apparatus and method performing debug and rollback operations using snapshots. For example, one embodiment of an apparatus comprises: a graphics processing unit (GPU) to perform graphics processing operations by executing graphics commands; a command parser to parse graphics commands submitted to the GPU and generate a list of graphics memory pages which will be affected by the graphics commands; an I/O state tracker to track I/O accesses from a graphics driver to determine a list of registers affected by the I/O accesses; snapshot circuitry and/or logic to perform a memory snapshot and I/O snapshot based on the list of graphics memory pages and the list of registers, respectively; and rollback circuitry and/or logic to perform a rollback operation using the memory snapshot and I/O snapshot in response to detecting a GPU error condition.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: November 10, 2020
    Assignee: Intel Corporation
    Inventors: Yao Zu Dong, Kun Tian
  • Patent number: 10811103
    Abstract: Provided herein may be a memory controller, a memory system, and a method of operating the memory system. The memory controller may control the operation of a memory device. The memory controller may include a read request buffer, a command generator, and a read request monitor. The read request buffer may be configured to receive a read request from a host. The command generator may be configured to receive the read request from the read request buffer and generate a read command based on the received read request. The read request monitor may be configured to receive read request information about the read request from the read request buffer and determine, based on a stream ID of the read request, whether the read request is a sequential read request.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: October 20, 2020
    Assignee: SK hynix Inc.
    Inventor: Min Kee Kim
  • Patent number: 10810118
    Abstract: A data storage device includes a nonvolatile memory device and a controller configured to control an operation of the nonvolatile memory device. The controller includes a volatile memory including a first index storage unit in which first index information for first data buffers are stored and a second index storage unit in which second index information for second data buffers are stored, a first central processing unit (CPU) configured to perform allocation and release of allocation of the first data buffers by accessing the first index storage unit of the volatile memory, and a second CPU configured to perform allocation and release of allocation of the second data buffers by accessing the second index storage unit of the volatile memory.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: October 20, 2020
    Assignee: SK hynix Inc.
    Inventors: Soong Sun Shin, Duck Hoi Koo, Yong Tae Kim, Cheon Ok Jeong
  • Patent number: 10795772
    Abstract: A memory system includes a volatile memory, a nonvolatile memory, and a controller. The controller is configured to execute a non-volatilization process to store data in the volatile memory into the nonvolatile memory in response to an initiate request received by the controller if no cancellation request is received by the controller during a cancelable period that begins upon receipt of the initiate request by the controller, and to transmit a completion notification when the non-volatilization process has completed.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 6, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyasu Nakatsuka, Mikiya Kurosu, Yasuo Kudo
  • Patent number: 10795822
    Abstract: A method, computer program product, and computer system for determining, by a computing device, a number of dirty pages capable of being generated per process on a backing device. It may be determined whether the number of dirty pages capable of being generated per process on the backing device exceeds a threshold set point of actual dirty pages currently generated per process on the backing device. A variable amount of time to sleep may be determined. Sleep may be executed for the variable amount of time, wherein generation of additional dirty pages is paused.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: October 6, 2020
    Assignee: EMC IP Holding Company, LLC
    Inventors: Shuo Lv, Wenjun Wang
  • Patent number: 10776050
    Abstract: Systems and methods are provided that may be implemented to prevent unexpected and/or uncontrollable system reboots that occur due to write filter overlay and/or RAM disk depletion within system memory of an information handling system by monitoring time-based write filter memory overlay and/or RAM disk usage. This information may be used to predict when the write filter memory overlay and/or RAM disk will fill up with data, and/or to take actions to prevent write filter memory overlay and/or RAM disk usage from reaching a threshold percentage or fractional utilization value that will trigger a system reboot. Those applications and/or data files that are primarily responsible for filling the memory of a write filter overlay may also be identified and stopped or restarted to prevent automatic system reboot due to write filter memory overlay usage.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: September 15, 2020
    Assignee: Dell Products L.P.
    Inventors: Sumit K. Popli, Suruchi Dubey, Ryan G. Mason
  • Patent number: 10777252
    Abstract: A method and apparatus for performing opportunistic refreshes of memory banks is disclosed. Refresh circuitry in a memory controller performs a refresh on each bank of a multi-bank memory at least once during a given refresh interval. At the beginning of an interval, memory banks for which there are no pending transactions (e.g., reads or writes) may be refreshed. During a first portion of the interval, refresh may be skipped for memory banks for which transactions are pending. In a second portion of the interval, refreshes are performed on memory banks that have not been refreshed during the interval, which may cause some memory transactions to be delayed.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: September 15, 2020
    Assignee: Apple Inc.
    Inventors: Peter Fu, Gregory S. Mathews, Kai Lun Hsuing, Shane J. Keil
  • Patent number: 10776203
    Abstract: A data storage service stores a dataset on a set of storage nodes in accordance with a first encoding. A set of shards constituting quorum, and one or more additional shards, are stored on the storage nodes. The data storage system determines to store the dataset according to a second encoding, in which the second encoding has fewer total shards. The data storage system reconfigures the storage of the dataset in accordance with the second encoding, such that the reconfigured storage comprises subsets of shards from the first encoding that were not re-encoded in forming the second encoding.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Seth William Markle, Bryan James Donlan, Paul David Franklin, Colin Laird Lazier
  • Patent number: 10768850
    Abstract: Generally described, one or more aspects of the present application correspond to a highly distributed replica of a volume stored in a networked computing environment. First and second replicas of the volume can be synchronously replicated, and some implementations of the tertiary replica can be asynchronously replicated. The highly distributed nature of the tertiary replica supports parallel data transfer of the data of the volume, resulting in faster creation of backups and new copies of the volume.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: September 8, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Kiran-Kumar Muniswamy-Reddy, Christopher Magee Greenwood, Colin Williams, Wells Lin, Danny Wei, Igor A. Kostic