Patents Examined by Midys Rojas
  • Patent number: 11809728
    Abstract: Systems and methods for storing data in an intermediate format for storing, converting the intermediate data format into a production data format of two data volumes, and merging the two data volumes into one data volume.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: November 7, 2023
    Assignee: Snyk Sweden AB
    Inventors: Julian Coccia, Daniel Akerud
  • Patent number: 11797235
    Abstract: One example method includes an interface for mounting virtual disks from multiple sources. The interface may interface with different sources using appropriate programming interfaces. The virtual disks are then mounted in the interface. The virtual disks can be analyzed to identify the associated partitions. Volume configurations are determined for the partitions. The files for the partitions are remounted in the interface.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: October 24, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventor: Abinas Tewari
  • Patent number: 11789626
    Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: October 17, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Hari Kannan, Gordon James Coleman, Yijie Zhao, Peter E. Kirkpatrick, Robert Lee, Yuhong Mao, Boris Feigin
  • Patent number: 11789620
    Abstract: A phase training update circuit operates during a self-refresh cycle of a memory to perform a phase training update on individual bit lanes. The phase training update circuit adjusts a bit lane transmit phase offset forward a designated number of phase steps, transmits a training pattern, and determines a first number of errors in the transmission. It also adjusts the bit lane transmit phase offset backward the designated number of phase steps, transmits the training pattern, and determines a second number of errors in the transmission. Responsive to a difference between the first number of errors and the second number of errors, the phase training update circuits adjusts a center phase position for the bit lane transmit phase offset of the selected bit lane.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: October 17, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Scott P. Murphy, Huuhau M. Do
  • Patent number: 11782620
    Abstract: In accordance with an embodiment, described herein are systems and methods for providing tiered data storage in cloud infrastructure environments. A data storage service (block store) is adapted to automatically adjust the manner by which the data for a data volume or block volume (data/block volume), associated with a cloud instance, can be stored to meet the requirements of a performance tier. For example, responsive to selection of a particular performance tier, the storage of the data/block volume can be allocated between a first type of data storage associated with a first performance characteristics; and a second type of data storage associated with a second performance characteristics. A graphical user interface enables configuring data/block volumes to use particular performance tiers, and/or to support automatic tuning.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: October 10, 2023
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Jeppe Larsen, Travis Portz, Venkata Harish Mallipeddi, Steven Gates
  • Patent number: 11775203
    Abstract: A method of operating a nonvolatile memory device is provided. The method includes: dividing a memory block of a plurality of memory blocks provided in the nonvolatile memory device into a plurality of retention groups; generating time-difference information including a plurality of erase program interval (EPI) values corresponding to the plurality of retention groups; generating offset information including a plurality of offset values corresponding to differences between a plurality of default read voltages and a plurality of corrected read voltages; generating compensated read voltages corresponding to a read address based on the offset information and the time-difference information; and performing a read operation to read data from the nonvolatile memory device based on the read address and the compensated read voltages.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngdeok Seo, Jinyoung Kim, Sehwan Park, Dongmin Shin, Woohyun Kang, Shinho Oh
  • Patent number: 11768615
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on temperature-related memory component capabilities. The controller can obtain a write temperature associated with an individual group of memory components. Based on the write temperature and a temperature threshold associated with the individual group of memory components, the controller can select an individual media management operation to perform.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 26, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Patent number: 11762553
    Abstract: Methods, systems, and apparatuses related to runtime selection of memory devices and storage devices in a disaggregated memory system are described. For example, a controller can be coupled to a plurality of memory device and a plurality of storage devices. The controller can receive signaling indicative of a memory request corresponding to execution of an application. Responsive to receiving the signaling indicative of the memory request, the controller can select a memory device or a storage device, or both, selecting from the plurality of memory devices or the plurality of storage devices, or both, to perform a memory operation associated with the memory request. Responsive to receiving the memory request and selecting the memory device or the storage device, or both, the controller can perform the memory operation using the selected memory device or the selected storage device, or both.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: September 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Reshmi Basu, Richard C. Murphy
  • Patent number: 11755205
    Abstract: Facilitation of reclaiming of storage space is enabled relative to one or more data streams employing the storage space. A system can comprise a processor, and a memory that stores computer executable instructions that, when executed by the processor, facilitate performance of operations. The operations can comprise determining posting or non-posting of one or more specified cut positions from readers of events thus far appended to a stream of a stream storage system. The operations can further comprise, in response to the one or more specified cut positions being posted, truncating the stream based on the specified cut positions of the stream, and, in response to no specified cut positions being posted, truncating the stream based on a time limit or a space limit relative to a respective time quantity or a respective space quantity of the stream.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: September 12, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Prajakta Belgundi, Shivesh Ranjan, Flavio Paiva Junqueira
  • Patent number: 11748001
    Abstract: Examples may include techniques to predict or determine time-to-ready (TTR) for a storage device. TTR may be predicted or determined based on operating information included in a snapshot associated with a first time interval during operation of the storage device. The TTR predicted or determined indicates an amount of time the storage device will be at an operational state following a power loss recover of the storage device.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: September 5, 2023
    Assignee: SK hynix NAND Product Solutions Corp.
    Inventors: Joseph D. Tarango, Jim S. Baca
  • Patent number: 11740790
    Abstract: A method for monitoring hard disks, implemented in an electronic device, includes sequentially detecting a number of hard disk codes of hard disks recorded by a host bus adapter, and determining whether each hard disk code has a drive letter assigned; if one hard disk code is determined to not have a drive letter assigned, writing a first mark corresponding to the hard disk code in a register of the host bus adapter. When detection of all hard disk codes is completed, transmitting the first marks written in the register to a CPLD interface and detecting whether each hard disk corresponding to the first mark is in place. If one hard disk corresponding to the first mark is found to be in place, controlling the hard disk to output an alarm based on the first mark.
    Type: Grant
    Filed: January 2, 2022
    Date of Patent: August 29, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Jie Yuan, Shi-Qi Chen
  • Patent number: 11740809
    Abstract: The disclosure relates to a method for configuring a memory unit of a computing unit wherein, during a program operation of the computing unit, a memory area shared among a plurality of processes is created and configured in the memory unit in that a memory area address is assigned to the memory area and a data area for storing at least one datum is configured in the memory area in that at least one configuration information element of the data area within the memory area is defined and a revision number which characterizes a current configuration of the memory area is updated.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: August 29, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Gunter Burchardt, Matthias Kleinfeller
  • Patent number: 11733929
    Abstract: A memory device includes a processing device configured to iteratively update a center read level according to a first step size after reading a subset of memory cells according to a set of read levels including the center read level; track an update direction for the processing device to use when iteratively updating the center read level, wherein the update direction corresponds to an increase or a decrease in the center read level; detect a change condition based on updating the center read level according to the first step size; and iteratively update the center read level according to a second step size based on detection of the change condition.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: August 22, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Michael Sheperek, Larry J. Koudele, Steve Kientz
  • Patent number: 11733889
    Abstract: Embodiments of the present disclosure include systems and methods for generating names for cloud storage containers. A unique identifier associated with a user of the client device is received from the client device. Next, a hash value is generated based on the unique identifier associated with the user of the client device. A character encoding scheme is then used to encode the hash value into a first encoded value. Instances of a first character in the encoded value is replaced with a defined second character to form a second encoded value. Finally, the second encoded value is sent to a cloud storage service for the cloud storage service to create a storage container using the second encoded value as a name of the storage container.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: August 22, 2023
    Assignee: BUSINESS OBJECTS SOFTWARE LTD
    Inventor: Ehsan Tavakoli
  • Patent number: 11733899
    Abstract: Storage volume placement in a selected of plural storage arrays interfaced with a network is managed by an Ansible module having a placement role that identifies storage resource pools of the network, compares the storage resource pool characteristics against storage volume constraints and lists acceptable storage resource pools in a priority order that allows automated selection of a storage resource pool for storage volume placement. In one embodiment, the network is searched for storage group names associated with the storage volume placement request to check for idempotency.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: August 22, 2023
    Assignee: Dell Products L.P.
    Inventors: Anil A. Degwekar, Akash Shendge, Arindam Datta
  • Patent number: 11726680
    Abstract: A storage control device of controlling a storage device includes memory; and processor circuitry coupled to the memory, the processor circuitry being configured to perform processing, the processing including: determining a mode that indicates how to back up configuration information of the storage device on a basis of a redundant configuration state with another storage control device; and backing up the configuration information from a memory to a backup device on a basis of the determined mode.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: August 15, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Hidefumi Kobayashi
  • Patent number: 11720274
    Abstract: In some examples, for migrating data from a first storage system to a second storage system, a system creates a proxy at the first storage system to direct write requests received at the first storage system to the second storage system, initially sets a cache in the first storage system to a first state in which the cache stores write data for first write requests, and changes a state of the cache from the first state to a second state in which write data for second write requests bypasses the cache and are directed by the proxy to the second storage system.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: August 8, 2023
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Ayman Abouelwafa, Murali Vaddagiri
  • Patent number: 11720263
    Abstract: An array of interconnected memory cells for storing therein a fractional-quantum-Hall-effect droplet whose state is controllable using voltages applied to the cell electrodes. In an example embodiment, the memory cells are arranged and linked together such as to reduce the geometric size of the array, e.g., compared to that of a linear array having the same number of memory cells. For example, one or more wheel-and-spokes arrangements of the memory cells can be used for this purpose. The smaller geometric size of the array can result in better coherence across the droplet confined therein, which can advantageously be used to improve the reliability and/or performance of the corresponding quantum-computing device.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: August 8, 2023
    Assignee: Nokia Technologies Oy
    Inventor: Robert L. Willett
  • Patent number: 11704049
    Abstract: Methods, systems, and devices for optimized command sequences are described. An apparatus includes a memory array and a controller coupled with the memory array. The controller may be configured to receive a first command indicating a start of a sequence of access commands to store at the controller, then receive a first set of access commands associated with the sequence of access commands, and then receive a second command indicating the end of the sequence of access commands. The controller may also receive a second set of access commands after the command. The controller may execute an operation associated with a third set of access commands of the sequence after receiving the second set of access commands and before receiving the third set of access commands based at least in part on identifying the second set of access commands as starting the sequence of access commands.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: July 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Christian M. Gyllenskog, Luca Porzio
  • Patent number: 11693789
    Abstract: An illustrative embodiment disclosed herein is an apparatus including a processor and a memory. In some embodiments, the memory includes programmed instructions that, when executed by the processor, cause the apparatus to store a first object and a second object in a first region based on the first object and the second object having a first policy. In some embodiments, the memory includes programmed instructions that, when executed by the processor, cause the apparatus to store a third object in a second region based on the third object having a second policy. In some embodiments, a virtual disk includes the first region and the second region.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: July 4, 2023
    Assignee: Nutanix, Inc.
    Inventors: Karan Gupta, Gowtham Alluri, Dheer Moghe, Anshul Purohit, Arth Patel, Ajay Raghavan, Roger Liao