Patents Examined by Midys Rojas
  • Patent number: 11531625
    Abstract: A memory management method includes determining a memory page that needs to be swapped out of a memory, for each memory page that needs to be swapped out, generating, based on the memory page, a work task reclaiming the memory page, and allocating each work task to a dedicated worker thread for execution.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: December 20, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Qiulin Chen, Wanglai Yao, Yunjian Ying
  • Patent number: 11513741
    Abstract: A tape may be mounted into a tape drive. Mounting the tape into the tape drive may include loading the tape from a storage slot. The tape drive may request a first record of the tape from a tape storage subsystem. The tape drive may determine whether the first record of the tape exists in the tape storage subsystem. The tape drive may load the first record of the tape in random access memory (RAM) of the tape drive. The first record may include one or more data entries. The tape drive may append a new data entry to the first record. The first record may be transitioned to a second record upon being appended with the new data entry. The tape may be unmounted from the tape drive.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: November 29, 2022
    Assignee: International Business Machines Corporation
    Inventors: Said Ahmad, Khanh Vi Ngo, David Lee Swanson, Illarion Borisevich
  • Patent number: 11513742
    Abstract: The described technology is generally directed towards a virtualized dedicated hot spare storage device in a RAID-configured data storage system, in which the capacity of the dedicated spare storage device is distributed among the physical disks underlying a RAID virtual disk. A RAID controller creates a first virtual construct comprising an array of logical block addresses that maps data reads from and writes to the virtual disk to locations in the physical disks underlying the virtual disk. When hot space storage device capacity is specified, the RAID controller creates a second construct comprising another array of logical block addresses which are reserved for the distributed hot space. The virtualized dedicated hot spare storage device increases storage capacity and performance by utilizing more of the storage resources of a data storage server.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 29, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Rajasekhar Nannapaneni, Ganesh Chichakar
  • Patent number: 11513723
    Abstract: Aspects of a storage device including a memory and a controller are provided which optimize read look ahead (RLA) performance based on zone configurations or stored metadata. The controller stores in memory information previously received from a host, including a zone configuration or other information from which metadata associated with subsequent data to be pre-fetched in RLA may be determined. When the stored information includes the zone configuration, the controller reads data from memory in response to a host command and limits pre-fetching of subsequent data from the memory based on the zone configuration. When the stored information includes metadata, the controller reads the metadata associated with subsequent data from the memory, and limits pre-fetching of the subsequent data based on the metadata. Thus, resources of the storage device that are typically used for RLA may instead be used for other operations, improving the efficiency of the storage device.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: November 29, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Ramanathan Muthiah
  • Patent number: 11507271
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may: receive performance information for a base workload; determine multiple threshold values of multiple storage media layers of each IHS of a storage cluster based at least on the performance information for the base workload and multiple inventory information respectively associated with multiple storage media layers of each IHS of the storage cluster; receive multiple condition values respectively associated with the multiple storage media layers of an IHS of the storage cluster; determine that a condition value of the multiple condition values associated with a storage media layer of the multiple storage media layers is at or below a threshold value of the multiple threshold values associated with the storage media layer of the multiple storage media layers; and reduce a storage workload of a specific IHS of the storage cluster.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: November 22, 2022
    Assignee: Dell Products L.P.
    Inventors: Chandrasekhar R, Ravishankar N. Kanakapura, Abhishek Gupta, Anand Changegowda, Rishi Chandra, Kevin Marks
  • Patent number: 11507297
    Abstract: Tuning information associated with a storage device of a plurality of storage devices is received. One or more characteristics associated with the storage device are determined. The tuning information and the one or more characteristics are provided to the plurality of storage devices, wherein providing the tuning information causes a set of the plurality of storage devices to apply the tuning information based on the one or more characteristics.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: November 22, 2022
    Assignee: Pure Storage, Inc.
    Inventors: Yang Sup Lee, Frank Tuzzolino, Douglas Lother, Casey Golliher
  • Patent number: 11496764
    Abstract: Some examples include a video encoding/decoding technique for improving compression efficiency. For instance, the technique includes selecting a prediction mode to be performed among a plurality of prediction modes including an intra-prediction mode and an inter-prediction mode. The technique further includes calculating a predictive motion vector in case an inter-prediction mode is selected as the prediction mode to be performed, and calculating a motion vector by summing the calculated predictive motion vector and a differential motion vector decoded from a coded stream, in case the inter-prediction mode is selected as the prediction mode to be performed. Further, some examples may include performing an inter-prediction process of the selected prediction mode using the calculated motion vector in case the inter-prediction mode is selected as the prediction mode to be performed.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: November 8, 2022
    Assignee: MAXELL, LTD.
    Inventors: Masashi Takahashi, Muneaki Yamaguchi
  • Patent number: 11487455
    Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: November 1, 2022
    Assignee: Pure Storage, Inc.
    Inventors: Hari Kannan, Gordon James Coleman, Yijie Zhao, Peter E. Kirkpatrick, Robert Lee, Yuhong Mao, Boris Feigin
  • Patent number: 11487442
    Abstract: A data storage interface provides access to data storage clusters that may not otherwise be accessible to data accessors. The data storage interface can serve as a point of access for data accessors to access stored data via a consistent data access protocol, even when a data storage cluster on which requested data is stored may use a different protocol. The data storage interface can also provide access across network boundaries, such as those between different private cloud computing systems (e.g., virtual private clouds or “VPCs”).
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 1, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Sachin Suresh Bhat, Lionel Bitoun, LiJing Chen, Jaikit Dungarshi Savla, Daniel Wu, Jaden Wright, Adam Tessier, Sourabh Shrivastav, Rutvik Gopalkrishna Hora, Manjunath Tumkur Maheshchandra, Ramanathan Padinjarel Somanathan, Manoj Kumar Dhanger, Nitin Saini, Jeet Nishit Mehta, Ruonan Zhang, Harshaneel Harshal Gokhale, Ravneet Singh Sidhu
  • Patent number: 11481139
    Abstract: Systems and methods are described for efficiently processing events related to a relationship between a primary copy of data at a primary storage system and a mirror copy of the data at a cross-site secondary storage system of a multi-site distributed storage system. According to an example, a mediator agent that is configured on both primary and secondary storage systems provides coordination and serialization for various events generated in the relationship. The multi-site distributed storage system performs actions based on the event processing such as performing a failover operation from the primary storage system to the secondary storage system or resynchronizing the relationship to ensure application protection and availability.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: October 25, 2022
    Assignee: NetApp, Inc.
    Inventors: Anoop Vijayan, Akhil Kaushik, Sohan Shetty, Dhruvil Shah
  • Patent number: 11474715
    Abstract: Architectures and techniques are described that can monitor or track change to storage system configuration. Changes to the configuration that are determined to be statistically significant in potentially affecting and/or causing performance issues of the storage system can be specifically tracked. Such can be accomplished by generating a hash data of the configuration data and sorting that hash data to data buckets based on a similarity score to other hash data of other storage systems.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: October 18, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Deepak Nagarajegowda, Bina Thakkar
  • Patent number: 11461615
    Abstract: A novel and useful system and method of accessing multi-dimensional data in memory. The invention is applicable to neural network (NN) processing engines adapted to implement artificial neural networks (ANNs). The NN processor is constructed from self-contained computational units organized in a hierarchical architecture. The homogeneity enables simpler management and control of similar computational units, aggregated in multiple levels of hierarchy. Computational units are designed with minimal overhead as possible, where additional features and capabilities are aggregated at higher levels in the hierarchy. On-chip memory provides storage for content inherently required for basic operation at a particular hierarchy and is coupled with the computational resources in an optimal ratio. Lean control provides just enough signaling to manage only the operations required at a particular hierarchical level.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: October 4, 2022
    Inventors: Avi Baum, Or Danon
  • Patent number: 11461508
    Abstract: The present disclosure advantageously provides a computer-based method for partitioning software for an embedded system with a memory protection unit (MPU). Object code within a plurality of object files is converted to intermediate code. A call graph is generated based on the intermediate code. The call graph is transformed into a directed flow graph, which includes updating the call graph's node weights and directed edge weights. The directed flow graph is partitioned into a target number of MPU memory regions, which includes assigning each element of the object code to one of the MPU memory regions. Each element of the object code is relocated to a new object file that corresponds to the assigned MPU memory region. An MPU configuration object file is created that includes one or more configuration parameters for each MPU memory region.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 4, 2022
    Assignee: Izuma Tech, Inc.
    Inventors: Michael Bartling, Christopher Haster
  • Patent number: 11442639
    Abstract: Techniques manage stripes in a storage system. In accordance with such techniques, in the storage system including a plurality of storage devices, a device correlation of a storage device in the plurality of storage devices is determined according to a request for creating a stripe in the storage system. The device correlation indicates distribution of a set of stripes created in the storage system between the storage device and other storage devices than the storage device. One storage device is selected from the plurality of storage devices based on the determined device correlation. One extent in the selected storage device is added to the stripe. As such, all extents in the stripe can be distributed as evenly as possible in the plurality of storage devices in the storage system, thus ensuring load balancing of the storage system and more effective management of the stripes in the storage system.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: September 13, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Chi Chen, Huijuan Fan
  • Patent number: 11416167
    Abstract: A system includes a memory configured to store data, a first master configured to issue a first data transfer request to the memory, a division unit configured to divide the first data transfer request into a plurality of data transfer requests, and output the plurality of data transfer requests, and a second master configured to issue a second data transfer request to the memory.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: August 16, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Daisuke Kuroki
  • Patent number: 11416143
    Abstract: Methods, systems, and apparatuses related to runtime selection of memory devices and storage devices in a disaggregated memory system are described. For example, a controller can be coupled to a plurality of memory device and a plurality of storage devices. The controller can receive signaling indicative of a memory request corresponding to execution of an application. Responsive to receiving the signaling indicative of the memory request, the controller can select a memory device or a storage device, or both, selecting from the plurality of memory devices or the plurality of storage devices, or both, to perform a memory operation associated with the memory request. Responsive to receiving the memory request and selecting the memory device or the storage device, or both, the controller can perform the memory operation using the selected memory device or the selected storage device, or both.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: August 16, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Reshmi Basu, Richard C. Murphy
  • Patent number: 11416169
    Abstract: A memory system includes a controller that transmits, to a memory chip, one first command set indicating a head of a third storage area being one of second storage areas, in a case where first data is read to a first buffer of the memory chip. The first data includes a plurality of first data segments having been stored in the second storage areas. The memory chip includes circuitry that outputs a second data segment and a third data segment to the controller in a period after the controller transmits the first command set to the memory chip before the controller transmits a second command set to the memory chip. The second data segment is a data segment having been stored in the third storage area. The third data segment is a data segment having been stored in a fourth storage area different from the third storage area.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: August 16, 2022
    Assignee: Kioxia Corporation
    Inventors: Yoshihisa Kojima, Riki Suzuki
  • Patent number: 11416173
    Abstract: A memory device includes a processing device configured to iteratively update a center read level according to a first step size after reading a subset of memory cells according to a set of read levels including the center read level; track an update direction for the processing device to use when iteratively updating the center read level, wherein the update direction corresponds to an increase or a decrease in the center read level; detect a change condition based on updating the center read level according to the first step size; and iteratively update the center read level according to a second step size based on detection of the change condition.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: August 16, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Michael Sheperek, Larry J. Koudele, Steve Kientz
  • Patent number: 11403007
    Abstract: Streamlining the process of connecting a digital twin template to a set of sensors that are connected to a physical asset so that an owner and/or operator of the physical asset receives an asset operational indication. The asset operational indication provides useful information to the owner and/or operator by providing real-time data pertaining to the physical asset so that the owner and/or operator can make measured and informed decisions relating to the current and/or future uses of the physical asset.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: August 2, 2022
    Assignee: International Business Machines Corporation
    Inventors: Lisa Seacat DeLuca, Bjorn Kutz
  • Patent number: 11403213
    Abstract: A method for transparently moving a block of memory with respect to an application using the block of memory, includes inserting, by a compiler, in an application that includes a memory allocation call, instructions for transparently moving a block of memory with respect to an application using the block of memory. The instructions include obtaining a first pointer returned by a memory allocator, where the first pointer points to an internal data structure, the internal data structure includes a read-write lock and a second pointer, and the second pointer points to an actual memory block. The instructions further include acquiring a read lock on a read-write lock in the internal data structure, before the first pointer is used by the application, obtaining the second pointer to the actual memory block, and dereferencing the second pointer to access the actual memory block for the application data.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: August 2, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wenqi Cao, Arun Iyengar, Gong Su, Zehra Sura, Qi Zhang