Patents Examined by Moazzam Hossain
  • Patent number: 11762042
    Abstract: A magnetic field sensor may include a semiconductor structure having a planar surface, and first, second, and third sensing devices. The semiconductor structure may include a semiconductor member having a two-dimensional electron gas therein, and an insulator member disposed on the semiconductor member. The first sensing device may be configured to sense magnetic field along a first axis parallel to the planar surface. The second sensing device may be configured to sense magnetic field along a second axis parallel to the planar surface, and orthogonal to the first axis. The third sensing device may be configured to sense a magnetic field along a third axis normal to the planar surface. Each of the first, second, and third sensing devices may be formed in the semiconductor structure and may include electrodes that extend from the insulator member to the two-dimensional electron gas.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: September 19, 2023
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Ping Zheng, Eng Huat Toh, Yongshun Sun
  • Patent number: 11765528
    Abstract: A sensing device and a method for packaging the same are provided. The sensing device includes a lead frame, a chip, an insulated housing, a sensor, and a protector. The lead frame includes a first surface, a second surface opposite to the first surface, a first die-bonding area and a plurality of wire bonding areas of the lead frame disposed on the first surface, and a second die-bonding area disposed on the second surface. The chip is disposed in the first die-bonding area and is electrically connected to the plurality of wire bonding areas of the lead frame. The insulated housing covers the chip and a portion of the lead frame. The sensor is disposed on the second die-bonding area of the lead frame, and the protector is disposed on the sensor.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: September 19, 2023
    Assignee: LITE-ON SINGAPORE PTE. LTD.
    Inventors: Guang-Li Song, Suresh Basoor Nijaguna, Qian Pang
  • Patent number: 11764256
    Abstract: Provided are MIM capacitor and semiconductor structure including MIM capacitor. The MIM capacitor includes a dielectric structure, a bottom electrode on the dielectric structure, a first insulating layer covering the bottom electrode and the dielectric structure, a middle electrode stacked on the bottom electrode, a spacer, a second insulating layer and a top electrode. The middle electrode is separate from the bottom electrode by the first insulating layer therebetween. A bottommost surface of the middle electrode is lower than a top surface of the bottom electrode and higher than a bottom surface of the bottom electrode. The spacer is disposed on the first insulating layer and laterally aside and covers a sidewall of the middle electrode. The second insulating layer covers the middle electrode and the spacer. The top electrode is stacked on the middle electrode and separate from the middle electrode by the second insulating layer therebetween.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Jiun Wu, Shun-Yi Lee
  • Patent number: 11756810
    Abstract: A pick-up head picks up a semiconductor device from a carrier substrate. The pick-up head includes a first leg portion, a second leg portion, a raised bridge base portion between the first and second leg portions, and a tip portion mounted on the raised bridge base portion. The tip portion engages with the semiconductor device to pick up the semiconductor device from the carrier substrate. The pick-up head is associated with a force detection mechanism that detects a force applied to the pick-up head for picking up the semiconductor device. The force detection mechanism includes cavities formed on the first leg portion and/or second leg portion, pillars arranged on the pick-up head, a force detection device arranged in a mount assembly that is attached on the pick-up head, or electrodes arranged on the mount assembly. Actuation of the pick-up head is determined based on the detected force.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: September 12, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Oscar Torrents Abad, Daniel Brodoceanu, Ali Sengül, Pooya Saketi
  • Patent number: 11753296
    Abstract: A MEMS device includes a lower substrate having a resonator, an upper substrate disposed to oppose an upper electrode of the resonator, a bonding layer sealing an internal space between the lower substrate and the upper substrate, and wiring layers that contain the same metal material as the bonding layer. Moreover, a rare gas content of each of the wiring layers is less than 1×1020 (atoms/cm3).
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: September 12, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masakazu Fukumitsu
  • Patent number: 11746002
    Abstract: A method of forming a microelectromechanical device wherein a beam of the microelectromechanical device may deviate from a resting to an engaged or disengaged position through electrical biasing. The microelectromechanical device comprises a beam disposed above a first RF conductor and a second RF conductors. The microelectromechanical device further comprises at least a center stack, a first RF stack, a second RF stack, a first stack formed on a first base layer, and a second stack formed on a second base layer, each stack disposed between the beam and the first and second RF conductors. The beam is configured to deflect downward to first contact the first stack formed on the first base layer and the second stack formed on the second base layer simultaneously or the center stack, before contacting the first RF stack and the second RF stack simultaneously.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: September 5, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Robertus Petrus Van Kampen, Lance Barron, Richard L. Knipe
  • Patent number: 11751487
    Abstract: A semiconductor device includes a storage element layer and a selector. The selector is electrically coupled to the storage element layer, and includes a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer and a second conductive layer. The first insulating layer, the second insulating layer and the third insulating layer are stacked up in sequence, wherein the second insulating layer is sandwiched in between the first insulating layer and the third insulating layer, and the first insulating layer and the third insulating layer include materials with higher band gap as compared with a material of the second insulating layer. The first conductive layer is connected to the first insulting layer, and the second conductive layer is connected to the third insulating layer.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Georgios Vellianitis, Gerben Doornbos, Marcus Johannes Henricus Van Dal, Mauricio Manfrini
  • Patent number: 11747515
    Abstract: A sensor based system for capturing localized weather data and a server system for communicating with a plurality of reporting and recipient mobile communication devices. The communication devices are enabled to capture additional weather information to supplement the sensor based system.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: September 5, 2023
    Assignee: HARTFORD FIRE INSURANCE COMPANY
    Inventors: Eugene T. Smyth, Deborah D. Fox, Roopak Hooda, Kristen Sara Mattson, Kristian L. Sanders
  • Patent number: 11749590
    Abstract: A wiring substrate device includes a wiring substrate, a plurality of terminals each of which is provided upright on the wiring substrate and has a lower end, an upper end and a narrowed part between the lower end and the upper end, and a plurality of solders each of which has a melting point lower than the terminals and covers a surface of the corresponding terminal.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: September 5, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Tatsuya Koike
  • Patent number: 11749756
    Abstract: A method includes forming an implanted region in a substrate. The implanted region is adjacent to a top surface of the substrate. A clean treatment is performed on the top surface of the implanted region. The top surface of the implanted region is baked after the clean treatment. An epitaxial layer is formed on the top surface of the substrate. The epitaxial layer is patterned to form a fin.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Che-Yu Lin, Ming-Hua Yu, Tze-Liang Lee, Chan-Lon Yang
  • Patent number: 11729975
    Abstract: A semiconductor memory includes a stack section comprising a first area including a plurality of first conductors and a plurality of first insulators alternately stacked in a first direction and memory cells, and a second area including respective end portions of the plurality of stacked first conductors and the plurality of stacked first insulators, a plurality of contact plugs respectively reaching the plurality of first conductors in the second area, first and second supporting portions configured respectively to pass through the stack section in the first direction and arranged in a second direction, which crosses the first direction, in the second area, and a layer between respective adjacent first insulators, among the plurality of first insulators that are stacked, between the first supporting portion and the second supporting portion, wherein the layer is made of a material that is different from that of the first conductors.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: August 15, 2023
    Assignee: Kioxia Corporation
    Inventor: Tsuyoshi Sugisaki
  • Patent number: 11721674
    Abstract: A Micro-LED array device based on III-nitride semiconductors and a method for fabricating the same are provided. The Micro-LED array device includes arrayed sector mesa structures that are formed by etching to penetrate through a p-type GaN layer and a quantum-well active layer and deep into an n-type GaN layer, a p-type electrode array deposited by evaporation on the p-type GaN layer of sector arrays, and an n-type electrode array deposited by evaporation on the n-type GaN layer. The n-type electrode array forms blocking walls to isolate the sector mesas from one another. The blocking walls, and each of the blocking walls and the annular structure surrounding the sector mesa are connected to each other.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: August 8, 2023
    Assignee: NANJING UNIVERSITY
    Inventors: Tao Tao, Xuan Wang, Feifan Xu, Bin Liu, Ting Zhi, Rong Zhang
  • Patent number: 11713239
    Abstract: This application discloses a MEMS chip structure, including a substrate, a side wall, a dielectric plate, a MEMS micromirror array, and a grid array, where the MEMS micromirror array includes a plurality of grooves and a plurality of MEMS micromirrors. The plurality of MEMS micromirrors are in a one-to-one correspondence with the plurality of grooves. The grid array is located above the MEMS micromirror array, and a lower surface of the grid array is connected to upper surfaces of side walls of at least some of the plurality of grooves.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: August 1, 2023
    Assignees: Huawei Technologies Co., Ltd., Wuxi WiO Technologies Co., Ltd.
    Inventors: Yiwen Chen, Zhaoxing Huang, Danyang Yao, Hong Tang, Chendi Jiang, Huikai Xie
  • Patent number: 11715806
    Abstract: A solar module and a method for fabricating a solar module comprising a plurality of rear contact solar cells are described. Rear contact solar cells (1) are provided with a large size of e.g. 156×156 mm2. Soldering pad arrangements (13, 15) applied on emitter contacts (5) and base contacts (7) are provided with one or more soldering pads (9, 11) arranged linearly. The soldering pad arrangements (13, 15) are arranged asymmetrically with respect to a longitudinal axis (17). Each solar cell (1) is then separated into first and second cell portions (19, 21) along a line (23) perpendicular to the longitudinal axis (17).
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: August 1, 2023
    Assignee: REC SOLAR PTE. LTD.
    Inventors: Philipp Johannes Rostan, Robert Wade, Noel G. Diesta, Shankar Gauri Sridhara, Anders Soreng
  • Patent number: 11711988
    Abstract: An aspect of the invention relates to an elementary cell that includes a breakdown layer made of dielectric having a thickness that depends on a breakdown voltage, a device and a non-volatile resistive memory mounted in series, the device including an upper selector electrode, a lower selector electrode, a layer made in a first active material, referred to as active selector layer, the device being intended to form a volatile selector; the memory including an upper memory electrode, a lower memory electrode, a layer made in at least one second active material, referred to as active memory layer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: July 25, 2023
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Anthonin Verdy
  • Patent number: 11703681
    Abstract: A method for producing a MEMS device comprises fabricating a first semiconductor layer and selectively depositing a second semiconductor layer over the first semiconductor layer, wherein the second semiconductor layer comprises a first part composed of monocrystalline semiconductor material and a second part composed of polycrystalline semiconductor material. The method furthermore comprises structuring at least one of the semiconductor layers, wherein the monocrystalline semiconductor material of the first part and underlying material of the first semiconductor layer form a spring element of the MEMS device and the polycrystalline semiconductor material of the second part and underlying material of the first semiconductor layer form at least one part of a comb drive of the MEMS device.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: July 18, 2023
    Assignee: Infineon Technologies AG
    Inventors: Stephan Gerhard Albert, Marten Oldsen
  • Patent number: 11707004
    Abstract: A phase-change memory (PCM) device includes a first electrode, a second electrode, a memory layer, and a heater. The memory layer includes a phase-change material and is electrically coupled between the first electrode and the second electrode. The heater is arranged near the memory layer and is configured to heat a programming region of the memory layer in response to an electric current that passes through the heater. The heater is coupled to a power source via an electric current path that does not pass through the memory layer.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: July 18, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventor: Gang Yuan
  • Patent number: 11697582
    Abstract: A microelectromechanical system (MEMS) transducer includes a substrate and a pair of electrodes supported by the substrate. The pair of electrodes are configured as a bias electrode-sense electrode couple. A moveable electrode of the pair of electrodes is configured for vibrational movement in a first direction during excitation of the moveable electrode. The pair of electrodes are spaced apart from one another by a gap in a second direction perpendicular to the first direction. The moveable electrode includes a cantilevered end, the cantilevered end being warped to exhibit a resting deflection along the first direction.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: July 11, 2023
    Assignee: Soundskrit Inc.
    Inventors: Stephane Leahy, Wan-Thai Hsu, Mohsin Nawaz, Carly Stalder, Sahil Gupta, Meysam Daeichin
  • Patent number: 11697585
    Abstract: A deployable Kiriform flexure includes first and second sections. The first section of the Kiriform flexure includes a plurality of curved fins arranged about a central axis. The second section of the Kiriform flexure includes a plurality of curved fins arranged about a central axis. Each fin of the second section is joined with a fin of the first section such that the first and second sections share a common central axis in a configuration that produces out-of-plane elastic buckling of the fins to actuate the Kiriform flexure from a substantially flat structure that extends substantially only in two dimensions orthogonal to the central axis to an expanded structure extending substantially in a third dimension parallel to the central axis when at least one of the first and second sections is rotated relative to the other section.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: July 11, 2023
    Assignee: President and Fellows of Harvard College
    Inventors: Saurabh Avinash Mhatre, Martin Bechthold, Allen Sayegh
  • Patent number: 11695096
    Abstract: In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: July 4, 2023
    Assignee: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic