Patents Examined by Moazzam Hossain
  • Patent number: 11685647
    Abstract: A nanosheet MEMS sensor device and method are described for integrating the fabrication of nanosheet transistors (61) and MEMS sensors (62) in a single nanosheet process flow by forming separate nanosheet transistor and MEMS sensor stacks (12A-16A, 12B-16B) of alternating Si and SiGe layers which are selectively processed to form gate electrodes (49A-C) which replace the silicon germanium layers in the nanosheet transistor stack, to form silicon fixed electrodes using silicon layers (13B-2, 15B-2) on a first side of the MEMS sensor stack, and to form silicon cantilever electrodes using silicon layers (13B-1, 15B-1) on a second side of the MEMS sensor stack by forming a narrow trench opening (54) in the MEMS sensor stack to expose and remove remnant silicon germanium layers on the second side in the MEMS sensor stack.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: June 27, 2023
    Assignee: NXP B.V.
    Inventors: Mark Douglas Hall, Tushar Praful Merchant, Anirban Roy
  • Patent number: 11670690
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first source/drain region, a second source/drain region, first source/drain contact and a first dielectric spacer liner. The gate structure is over the semiconductor substrate. The first source/drain region and the second source/drain region are in the semiconductor substrate and respectively on opposite sides of the gate structure. The first source/drain contact is over the first source/drain region. The first dielectric spacer liner lines a sidewall of the first source/drain contact and extends into the first source/drain region.
    Type: Grant
    Filed: July 11, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Cheng Hung, Kei-Wei Chen, Yu-Sheng Wang, Ming-Ching Chung, Chia-Yang Wu
  • Patent number: 11667524
    Abstract: Disclose is a method for fabricating a semiconductor device. The method includes: forming a groove such as by etching one side surface of a first substrate; attaching a second substrate including a silicon layer on the etched surface of the first substrate formed with the hollow groove; etching the second substrate so as to leave substantially only the silicon layer; forming a thin film structure on the surface of silicon layers of the second substrate; and separating the second substrate formed with the thin film structure from the first substrate. For example, the groove structure may be formed in the lower portion of the device in the process of fabricating the semiconductor device to facilitate the final device separation.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: June 6, 2023
    Assignee: Hyundai Kefico Corporation
    Inventors: Jun Hwan Choi, Chi Yeon Kim
  • Patent number: 11667516
    Abstract: A method of forming a microelectromechanical device wherein a beam of the microelectromechanical device may deviate from a resting to an engaged or disengaged position through electrical biasing. The microelectromechanical device comprises a beam disposed above a first RF electrode and a second RF electrode. The microelectromechanical device further comprises one or more electrical contacts disposed below the beam. The one or more electrical contacts comprise a first layer of ruthenium disposed over an oxide layer, a titanium nitride layer disposed on the first layer of ruthenium, and a second layer of ruthenium disposed on the titanium nitride layer.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: June 6, 2023
    Assignee: Qorvo US, Inc.
    Inventors: Mickael Renault, Jacques Marcel Muyango, Shibajyoti Ghosh Dastider
  • Patent number: 11665985
    Abstract: A memory device enabling a reduced minimal conductance state may be provided. The device comprises a first electrode, a second electrode and phase-change material between the first electrode and the second electrode, wherein the phase-change material enables a plurality of conductivity states depending on the ratio between a crystalline and an amorphous phase of the phase-change material. The memory device comprises additionally a projection layer portion in a region between the first electrode and the second electrode. Thereby, an area directly covered by the phase-change material in the amorphous phase in a reset state of the memory device is larger than an area of the projection layer portion oriented to the phase-change material, such that a discontinuity in the conductance states of the memory device is created and a reduced minimal conductance state of the memory device in a reset state is enabled.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 30, 2023
    Assignee: International Business Machines Corporation
    Inventors: Benedikt Kersting, Ghazi Sarwat Syed, Vara Sudananda Prasad Jonnalagadda, Manuel Le Gallo-Bourdeau, Abu Sebastian, Timothy Mathew Philip
  • Patent number: 11655142
    Abstract: A method of manufacturing a sensor device comprising: configuring a moulding support structure and a packaging mould so as to provide predetermined pathways to accommodate a moulding compound, the moulding support structure defining a first notional volume adjacent a second notional volume. An elongate sensor element and the moulding support structure are configured so that the moulding support structure fixedly carries the elongate sensor element and the elongate sensor element resides substantially in the first notional volume and extends towards the second notional volume, the elongate sensor element having an electrical contact electrically coupled to another electrical contact disposed within the second notional volume. The moulding support structure carrying (102) the elongate sensor element is disposed within the packaging mould (106).
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: May 23, 2023
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventor: Appolonius Jacobus Van Der Wiel
  • Patent number: 11650566
    Abstract: A system for detecting and evaluating environmental quantities and events is formed by a detection and evaluation device and a mobile phone, connected through a wireless connection. The device is enclosed in a containment casing housing a support carrying a plurality of inertial sensors and environmental sensors. A processing unit is coupled to the inertial sensors and to the environmental sensors. A wireless connection unit, is coupled to the processing unit and a wired connection port, is coupled to the processing unit. A programming connector is coupled to the processing unit and is configured to couple to an external programming unit to receive programming instructions of the processing unit. A storage structure is coupled to the processing unit and a power-supply unit supplied power in the detection and evaluation device. The mobile phone stores an application, which enables a basicuse mode, an expert use mode, and an advanced use mode.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 16, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Fontanella, Andrea Labombarda, Marco Bianco, Davide Ghezzi, Christian Raineri, Paolo Gatti
  • Patent number: 11646378
    Abstract: A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: May 9, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Mitsuhiro Ichijo, Toshiya Endo, Akihisa Shimomura, Yuji Egi, Sachiaki Tezuka, Shunpei Yamazaki
  • Patent number: 11635613
    Abstract: An optical device includes an elastic support portion which includes a torsion bar extending in a second direction perpendicular to a first direction and a nonlinearity relaxation spring connected between the torsion bar and a movable portion. The nonlinearity relaxation spring is configured so that a deformation amount of the nonlinearity relaxation spring around the second direction is smaller than a deformation amount of the torsion bar around the second direction and a deformation amount of the nonlinearity relaxation spring in a third direction perpendicular to the first direction and the second direction is larger than a deformation amount of the torsion bar in the third direction while the movable portion moves in the first direction. A first comb finger of a first comb electrode and a second comb finger of a second comb electrode which are adjacent to each other face each other in the second direction.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: April 25, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tatsuya Sugimoto, Tomofumi Suzuki, Kyosuke Kotani
  • Patent number: 11638386
    Abstract: A display panel having a first display region and second display region is provided. The display panel includes a sub-pixel array that includes a plurality of sub-pixels in an array and distributed in the first display region and the second display region. A non-light-emitting region in the second display region has a greater light transmittance than a non-light-emitting region in the first display region. Among sub-pixels emitting a same color of the plurality of sub-pixels in the first display region and the second display region, a width-to-length ratio of a driving transistor in the pixel circuit of a sub-pixel in the second display region is greater than a width-to-length ratio of a driving transistor in the pixel circuit of a sub-pixel in the first display region.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 25, 2023
    Assignees: WUHAN TIANMA MICRO ELECTRONICS CO., LTD., WUHAN TIANMA MICROELECTRONICS CO., LTD. SHANGHAI BRANCH
    Inventors: Yu Xin, Kang Yang, Lijing Han, Xian Chen
  • Patent number: 11623861
    Abstract: A micromechanical component for a sensor device including a substrate having a substrate surface, at least one stator electrode situated on the substrate surface and/or on the at least one intermediate layer covering at least partially the substrate surface, which is formed in each case from a first semiconductor and/or metal layer, at least one adjustably situated actuator electrode, which is formed in each case from a second semiconductor and/or metal layer, and a diaphragm spanning the at least one stator electrode and the at least one actuator electrode, including a diaphragm exterior side directed away from the at least one stator electrode, which is formed from a third semiconductor and/or metal layer, a stiffening and/or protective structure protruding at the diaphragm exterior side being formed from a fourth semiconductor and/or metal layer.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 11, 2023
    Assignee: ROBERT BOSCH GMBH
    Inventor: Johannes Classen
  • Patent number: 11621222
    Abstract: A semiconductor region includes an isolating region which delimits a working area of the semiconductor region. A trench is located in the working area and further extends into the isolating region. The trench is filled by an electrically conductive central portion that is insulated from the working area by an isolating enclosure. A cover region is positioned to cover at least a first part of the filled trench, wherein the first part is located in the working area. A dielectric layer is in contact with the filled trench. A metal silicide layer is located at least on the electrically conductive central portion of a second part of the filled trench, wherein the second part is not covered by the cover region.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: April 4, 2023
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Abderrezak Marzaki
  • Patent number: 11612889
    Abstract: A method for fabricating a fluidic device includes depositing a sacrificial material on a pillar array arranged on a substrate. The method also includes removing a portion of the sacrificial material. The method further includes depositing a sealing layer on the pillar array to form a sealed fluidic cavity.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: March 28, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Evan Colgan, Joshua T. Smith, Benjamin Wunsch
  • Patent number: 11608265
    Abstract: A method for providing a semiconductor layer arrangement on a substrate which comprises providing a semiconductor layer arrangement having a functional layer and a semiconductor substrate layer, attaching the semiconductor layer arrangement to a glass substrate layer such that the functional layer is arranged between the glass substrate layer and the semiconductor substrate layer, and removing the semiconductor substrate layer at least partially such that the glass substrate layer substitutes the semiconductor substrate layer as the substrate of the semiconductor layer arrangement.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Stephan Pindl, Carsten Ahrens, Stefan Jost, Ulrich Krumbein
  • Patent number: 11603312
    Abstract: A microelectromechanical device comprising a mobile rotor in a silicon wafer. The rotor comprises one or more high-density regions. The one or more high-density regions in the rotor comprise at least one high-density material which has a higher density than silicon. The one or more high-density regions have been formed in the silicon wafer by filling one or more fill trenches in the rotor with the at least one high-density material. The one or more fill trenches have a depth/width aspect ratio of at least 10, and the one or more fill trenches have been filled by depositing the high-density material into the fill trenches in an atomic layer deposition (ALD) process.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: March 14, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Marko Peussa
  • Patent number: 11604347
    Abstract: A scanning device includes a planar scanning mirror disposed within a frame and having a reflective upper surface. A pair of flexures have respective first ends connected to the frame and respective second ends connected to the mirror at opposing ends of a rotational axis of the mirror. A rotor including a permanent magnet is disposed on the lower surface of the mirror. A stator includes first and second cores disposed in proximity to the rotor on opposing first and second sides of the rotational axis and first and second coils of wire wound respectively on the cores. A drive circuit drives the first and second coils with respective electrical currents including a first component selected so as to control a transverse displacement of the mirror and a second component selected so as to control a rotation of the mirror about the rotational axis.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: March 14, 2023
    Assignee: APPLE INC.
    Inventors: Noel Axelrod, Raviv Erlich, Yuval Gerson
  • Patent number: 11600617
    Abstract: A semiconductor device including a gate separation region is provided. The semiconductor device includes an isolation region between active regions; interlayer insulating layers on the isolation region; gate line structures overlapping the active regions, disposed on the isolation region, and having end portions facing each other; and a gate separation region disposed on the isolation region, and disposed between the end portions of the gate line structures facing each other and between the interlayer insulating layers. The gate separation region comprises a gap fill layer and a buffer structure, the buffer structure includes a buffer liner disposed between the gap fill layer and the isolation region, between the end portions of the gate line structures facing each other and side surfaces of the gap fill layer, and between the interlayer insulating layers and the side surfaces of the gap fill layer.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: March 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Sun Ki Min
  • Patent number: 11600716
    Abstract: Methods for manufacturing semiconductor structures are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate and forming a source/drain structure over the fin structure. The method for manufacturing a semiconductor structure further includes forming a metallic layer over the source/drain structure and forming an oxide film on a sidewall of the source/drain structure. In addition, the oxide film and the metallic layer are both in direct contact with the source/drain structure.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Andrew Joseph Kelly, Yusuke Oniki
  • Patent number: 11599781
    Abstract: A memristive device is described. The memristive device includes a first layer having a first plurality of conductive lines, a second layer having a second plurality of conductive lines, and memristive interlayer connectors. The first and second layers differ. The first and second pluralities of conductive lines are each lithographically defined. The first and second pluralities of conductive lines are insulated from each other. The memristive interlayer connectors are memristively coupled with a first portion of the first plurality of conductive lines and memristively coupled with a second portion of the second plurality of conductive lines. The memristive interlayer connectors are thus sparsely coupled with the first and second pluralities of conductive lines. Each memristive interlayer connector includes a conductive portion and a memristive portion.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: March 7, 2023
    Assignee: Rain Neuromorphics Inc.
    Inventors: Suhas Kumar, Jack David Kendall, Alexander Almela Conklin
  • Patent number: 11597648
    Abstract: A MEMS device and a MEMS device manufacturing method are provided for suppressing damage to device parts. An exemplary method of manufacturing a resonance device includes radiating laser light from a bottom surface side of a second substrate to form modified regions inside the second substrate along dividing lines of a first substrate, which has device parts formed on a top surface thereof, and the second substrate, the top surface of which is bonded to the bottom surface of the first substrate via bonding portions. The method further includes dividing the first and second substrates along the dividing lines by applying stress to the modified regions. The bonding portions are formed along the dividing lines and block the laser light.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: March 7, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masakazu Fukumitsu