Patents Examined by Mohammed Alam
  • Patent number: 12683431
    Abstract: An example mobile computing device includes at least one processor, a battery, and a device enclosure. The device enclosure at least partially encloses the mobile computing device. At least one portion of the device enclosure comprises at least one first element, a region that is at least partially formed in and at least partially surrounded by the at least one first element, at least one insulative element formed in the region, wherein the at least one insulative element includes at least one electrically insulative material, and a wireless charging module included in the region. The wireless charging module is configured to wirelessly communicate with an external charging device to induce a current in the wireless charging unit, and wherein the current is used to charge the battery of the mobile computing device.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: July 14, 2026
    Assignee: Google LLC
    Inventors: Mojan Sohi, Veera Venkata Siva Nagesh Polu, Igor Markovsky
  • Patent number: 12662007
    Abstract: A power integration system with motor drive and battery charging and discharging function includes a motor, a power integration circuit, and a battery. The motor includes multi-phase paths, and each path has an inductor. The power integration circuit includes an inverter and a charger. The inverter includes multi-phase bridge arms, each bridge arm has an upper switch and a lower switch, and each bridge is correspondingly coupled to each inductor of the motor. The charger a switch, the upper switch and the lower switch of at least one bridge arm of the shared inverter, and the inductor of the shared motor. The switch is coupled between any two bridge arms. The power integration circuit receives a DC power provided by a DC power apparatus, and the charger converts the DC power to charge the battery, and the battery provides power required to drive the motor through the inverter.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: June 23, 2026
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Chia Liao, Cheng-Chung Li, Wen-Chieh Tsai, Hsieh-Hsiung Cheng
  • Patent number: 12664346
    Abstract: A system and method of designing an integrated circuit for calculating an approximation of a target function over a predetermined interval may include employing an approximation algorithm, to calculate a first approximation function, which approximates the target function. Embodiments may construct an objective function based on the first approximation function. Based on the objective function, embodiments may calculate a first set of outcome coefficient values, which define an outcome approximation function, and generate, based on the outcome approximation function, an approximation schematic. The approximation schematic may represent an electrical approximation circuit, adapted to (i) receive an input value within the predetermined interval, and (ii) produce an estimation of the mathematical function at the input value, according to the outcome approximation function.
    Type: Grant
    Filed: June 8, 2025
    Date of Patent: June 23, 2026
    Assignee: NEXT SILICON LTD.
    Inventors: Daniel Khankin, Aharon Abadi
  • Patent number: 12657367
    Abstract: A system and method for creating layout for semiconductor chips are described. In various implementations, an integrated circuit includes at least a first functional block and a second functional block. The first functional block includes circuitry that has a first set of parameters of a first process corner. The second functional block includes circuitry that has a second set of parameters of a second process corner different from the first set of parameters of the first process corner. For a same set of operating conditions, the second functional block has device characteristics different from device characteristics of the first functional block based on the first process corner and the second process corner being different from one another. The integrated circuit is fabricated with a process corner mask that indicates which areas of the die use the first process corner and which areas use the second process corner.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: June 16, 2026
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Alexander W. Schaefer, Robin Andrew Joyce, Shaun M. Kittle, Scott Eugene Swanstrom, Josef Alexander Czaban
  • Patent number: 12657360
    Abstract: A simulation acceleration system is provided. The system includes a simulation accelerator that receives compiled code of a design that includes register transfer level (RTL) components and testbench components. The compiled code includes instructions for simulating behaviors of the design. The simulation accelerator schedules the instructions to be executed by multiple processors based on simulation events occurring at different simulation timesteps. The simulation events are determined according to the executed instructions. The simulation accelerator captures trace data generated by the execution of the scheduled instructions and provides the captured trace data.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: June 16, 2026
    Assignee: Siemens Industry Software Inc.
    Inventors: David Jones, Shona Weldon
  • Patent number: 12656402
    Abstract: An electronic device includes a battery device, a capacity measuring unit, and a microprocessor. The battery device outputs its remaining capacity and fully charged capacity. The capacity measuring unit includes a sensing resistor, measures the battery current of the battery device using the sensing resistor, and integrates the battery current to obtain the actual capacity. The microprocessor stores the fully charged capacity. When the battery device is in a specific state, the microprocessor calculates the capacity difference between the remaining capacity and the actual capacity. The microprocessor calibrates the fully charged capacity according to the ratio of the capacity difference to the remaining capacity.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: June 16, 2026
    Assignee: QUANTA COMPUTER INC.
    Inventor: Wei-Ting Yen
  • Patent number: 12651110
    Abstract: Various embodiments provide for adjusting routing capacity of a grid cell of one or more layers of a circuit design based on detected regions, such as notch regions (e.g., corners of macros, blockage corners) and input/output (IO) pin regions. More particularly, various embodiments detect one or more notch regions in a circuit design, detect one or more I/O pin regions in the circuit design, and adjust (e.g., reduce) routing capacity of one or more grid cells of one or more detected regions.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: June 9, 2026
    Assignee: Cadence Design Systems, Inc.
    Inventors: Gracieli Posser, Wing-Kai Chow, Mateus Paiva Fogaça, Mehmet Can Yildiz, Charles Jay Alpert
  • Patent number: 12633765
    Abstract: A method for analyzing the contact assignment of a contact element of a cell module for a vehicle battery to charge or discharge individual cells. A module charger charges/discharges the cell module and includes a diagnosis function for the contact assignment of the contact element. A method is disclosed for operating a module charger, which allows for charging and discharging cells of different cell modules with different contact assignments and automatically prevents incorrect operation. The method includes connecting a contact element of a diagnosis unit corresponding to the contact element to establish an electrical connection with each contact. A voltage measurement is taken of a contact against all other individual contacts, and the voltage values assigned to the contacts are saved. Then, based on the assigned voltage values, the contact assignment with respect to the individual cells is determined and, finally, the cell module is charged or discharged.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: May 19, 2026
    Assignee: TKR Spezialwerkzeuge GmbH
    Inventor: Martin Herzog
  • Patent number: 12633579
    Abstract: A battery array comprising a plurality of batteries. Each battery comprises a plurality of stacked battery cells, wherein the battery cells have varying properties. Each battery cell comprises an anode layer; a cathode layer; an ion conducting membrane positioned between the anode layer and the cathode layer; a top layer; a bottom layer; and circuitry disposed on the top layer, bottom layer, or both. The circuitry comprising one or more first circuits for monitoring or controlling the battery cell. Further, the battery comprises a battery control circuit configured to provide electrical interface connections with the circuitry. The battery array comprises a battery array control circuit configured to provide electrical interface connections with the battery control circuits of each battery.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: May 19, 2026
    Assignee: Massachusetts Institute of Technology
    Inventor: Theodore Bloomstein
  • Patent number: 12632631
    Abstract: A system may generate an annotation based on an attribute determined in connection with logic. In some implementations, the logic may be between a first function (e.g., a first point of logic, such as an encoder) and a second function (e.g., a second point of logic, such as a decoder) in a first level circuit representation. The attribute may indicate, for example, fault protection using error correction code, parity, or Gray code, or a power level, frequency domain, or clock domain. The system may then identify circuitry in a second level circuit representation corresponding to the annotated logic in the first level circuit representation. The second level circuit representation may be generated based on the first level circuit representation. The system may then mark the identified circuitry in the second level circuit representation having the attribute. In some implementations, the system may determine a fault profile of an integrated circuit design based on the marking.
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: May 19, 2026
    Assignee: SiFive, Inc.
    Inventors: Cameron Mcnairy, Michael Avner Urbach, Colin Schmidt
  • Patent number: 12626039
    Abstract: Design metrics from the physical design of an integrated circuit are made available to the front end designer. Physical design metrics are computed for sub-circuits from the physical design of an integrated circuit. Examples of physical design metrics include metrics for timing, congestion, power consumption and other metrics that depend on physical aspects of the circuit. Correspondence between the sub-circuits and register transfer level (RTL) source elements from RTL source code for the integrated circuit are determined. Examples of RTL source elements include individual lines of RTL source code, modules in the RTL source code, and user-defined constructs in the RTL source code. For different RTL source elements, the physical design metrics for the corresponding sub-circuits are aggregated. These aggregated physical design metrics, including the associations to the corresponding RTL source elements, are made available to users, for example front end designers.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: May 12, 2026
    Assignee: Synopsys, Inc.
    Inventors: Balkrishna Ramchandra Rashingkar, Andrew Saunders, Douglas Chang, Jeffrey Jude Loescher, Oliver Werner Kozber, Liang Tao, Soumitra Majumder, Colin Williams
  • Patent number: 12627160
    Abstract: Provided is a lithium ion rechargeable battery charging system with lithium cell balancing, including a lithium ion rechargeable battery and a battery charging device configured for charging the lithium ion rechargeable battery and wherein cell balancing of the lithium ion rechargeable battery cells of the lithium ion rechargeable battery continues for a predetermine period of time once a cell balancing mode begins.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: May 12, 2026
    Assignee: The Noco Company
    Inventors: James P. McBride, Daniel L. Simon, James Richard Stanfield
  • Patent number: 12626044
    Abstract: Embodiments included herein are directed towards a method for use in an electronic design. The embodiments may include receiving, using at least one processor, at least a portion of an electronic design. The method may further include automatically prompting a user for a library location indicating where to create an exported die schematic and a netlist generation view based upon, at least in part, the portion of the electronic design. The method may also include automatically generating the exported die schematic and the netlist generation view.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: May 12, 2026
    Assignee: Cadence Design Systems, Inc.
    Inventors: Arnold Jean Marie Gustave Ginetti, Xavier Alasseur
  • Patent number: 12606038
    Abstract: A portable power panel includes a case having a first electrical connector extending therefrom. The case includes a first DC to DC convertor that converts a first DC voltage provided by a high voltage battery on the vehicle to a second DC voltage. The case includes a battery that produces the second DC voltage. An inverter inverts the second DC voltage into a third voltage useable as an alternating current. An alternating current plug supplies the third voltage to an accessory plugged into the alternating current plug. The case is configured to be selectively and alternatively moved between a (i) coupled position wherein the first electrical connector is electrically coupled to a complementary second electrical connector provided at a dock in the vehicle, and a (ii) decoupled position wherein the first and second electrical connectors are disconnected and the case is moveable providing portable power away from the vehicle.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: April 21, 2026
    Assignee: FCA US LLC Q
    Inventors: Abhilash Gudapati, Abhilash Valson
  • Patent number: 12591723
    Abstract: A method may create RTL for a circuit design utilizing DSP blocks by receiving a software program comprising a multiplication statement to multiply a first number by a second number, the first number having a first data type and a first bit width, the second number having a second data type and a second bit width; determining a number of DSP blocks for implementing the statement based at least on the first bit width, the second bit width, a first DSP bit width corresponding to a bit width of a first operand of the DSP blocks, and a second DSP bit width corresponding to a bit width of a second operand of the DSP blocks, wherein the number of DSP blocks is two or more; and generating RTL for the statement, the RTL comprises a plurality of distinct portions corresponding to each of the two or more DSP blocks.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: March 31, 2026
    Assignee: Microsemi SOC Corp.
    Inventors: Jongsok Choi, Devin Gibson
  • Patent number: 12591726
    Abstract: An integrated circuit includes a plurality of standard cells including first and second standard cells arranged adjacent to each other in a first direction, and first, second, and third metal layers sequentially stacked in a vertical direction. At least one power segment is arranged adjacent a region where at least one of the first standard cell and the second standard cell is arranged. The at least one power segment is configured to provide power to the plurality of standard cells and is formed as a pattern of the third metal layer extending in a second direction.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: March 31, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jungho Do, Jisu Yu, Hyeongyu You, Minjae Jeong, Yujin Pyo
  • Patent number: 12585854
    Abstract: An integrated circuit includes a first power rail and a second power rail extending in a first direction, and a first power grid stub connected to the first power rail through a first via-connector. The integrated circuit also includes a first vertical conducting line extending in a second direction in a circuit cell between a first vertical cell boundary and a second vertical cell boundary. The first vertical conducting line and the first power grid stub are in a same metal layer and aligned with each other along the second direction.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: March 24, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Johnny Chiahao Li, Sheng-Hsiung Chen, Hui-Zhong Zhuang, Jerry Chang Jui Kao, Xiangdong Chen, Chung-Hsing Wang
  • Patent number: 12585855
    Abstract: A method of designing a layout of a semiconductor integrated circuit, including receiving input data defining the semiconductor integrated circuit; determining a first layout of the semiconductor integrated circuit by performing a placement and routing (P&R) procedure based on the input data, wherein the first layout includes a plurality of blocks, a plurality of standard cells, a plurality of power wirings, a plurality of ground wirings, a plurality of clock wirings, and a plurality of signal wirings; selecting a target region of the first layout, wherein the target region is capable of accommodating at least one additional power wiring and at least one additional ground wiring; and determining a second layout of the semiconductor integrated circuit by modifying the first layout to include the at least one additional power wiring and the at least one additional ground wiring in the target region.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: March 24, 2026
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jonghyeok Kim, Myungjin Choi, Yoongi Choi
  • Patent number: 12580406
    Abstract: An electronic device can include a power system including a battery and a processor programmed to: receive synchronized context data from one or more other devices associated with a user of the device, determine, at least in part based on the synchronized context data, one or more battery charging intervals, and operate the power system to charge the battery from the external power source during the identified one or more battery charging intervals. The processor can be programmed to determine the one or more battery charging intervals using a machine learning model. The synchronized context data can provide indication of the user's location. If the synchronized context data indicates that the user is at a different location than the device, the one or more battery charging intervals determined based at least in part on an expected time for the user to return to the location of the device.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: March 17, 2026
    Assignee: Apple Inc.
    Inventors: Gina B Lu, Kartik R Venkatraman, Aaron Cotter, Alexander D Palmer
  • Patent number: 12562301
    Abstract: An inductor and a related apparatus are provided. The inductor includes an upper magnet yoke and a lower magnet yoke that are straight-shaped and are disposed in parallel. A first winding disposed on a first fiber post, and a second winding disposed on a second fiber post. The upper magnet yoke, a first upper fiber post, and a second upper fiber post are integrally molded. The lower magnet yoke, a first lower fiber post, and a second lower fiber post are integrally molded. A clockwise/counterclockwise direction of a current in the first winding is consistent with a clockwise/counterclockwise direction of a current in the second winding.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: February 24, 2026
    Assignee: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Jianhua Zhu, Dongchen Zhao, Hua Jiang