Patents Examined by Mohsen Ahmadi
  • Patent number: 11961841
    Abstract: A display panel provided in embodiments of the present disclosure comprises a substrate, at least one metal layer, a darkening layer, and a functional layer, wherein the at least one metal layer is disposed on the substrate, the darkening layer covers the at least one metal layer, and the functional layer covers the darkening layer. An adhesive force of a photoresist to the functional layer is greater than an adhesive force of the photoresist to the darkening layer, and an adhesive force of the functional layer to the darkening layer is greater than the adhesive force of the photoresist to the darkening layer.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: April 16, 2024
    Assignee: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventor: Xiaoping Yu
  • Patent number: 11955374
    Abstract: A method of forming a semiconductor-on-insulator (SOI) substrate includes: forming a first dielectric layer on a first substrate; forming a buffer layer on a second substrate; forming a semiconductor cap on the buffer layer over the second substrate; forming a cleavage plane in the buffer layer; forming a second dielectric layer on the semiconductor cap after forming the cleavage plane; bonding the second dielectric layer on the second substrate to the first dielectric layer on the first substrate; performing a splitting process along the cleavage plane in the buffer layer; removing a first split buffer layer from the semiconductor cap; and removing a second split buffer layer from the second substrate.
    Type: Grant
    Filed: August 29, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Ming Chen, Eugene I-Chun Chen, Chia-Shiung Tsai
  • Patent number: 11948848
    Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, the electronic package comprises a substrate and a conductive feature over the substrate. In an embodiment, a metallic mask is positioned over the conductive feature. In an embodiment, the metallic mask extends beyond a first edge of the conductive feature and a second edge of the conductive feature.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: April 2, 2024
    Assignee: Intel Corporation
    Inventors: Jeremy Ecton, Oscar Ojeda, Leonel Arana, Suddhasattwa Nad, Robert May, Hiroki Tanaka, Brandon C. Marin
  • Patent number: 11948894
    Abstract: A semiconductor device includes a first stack of layers stacked on a substrate. The first stack of layers includes a source connection layer that is formed by replacing source sacrificial layers. The semiconductor device includes a channel structure that extends in the first stack of layers. The channel structure includes a channel layer that is in contact with the source connection layer in the first stack of layers. Further, the semiconductor device includes a shield structure formed in the first stack of layers. The shied structure encloses a stack of layers without the source connection layer.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: April 2, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Yuhui Han, Zhiliang Xia, Wenxi Zhou
  • Patent number: 11929252
    Abstract: To provide a gallium oxide-based semiconductor with its bandgap being sufficiently reduced, and a manufacturing method thereof. A gallium oxide-based semiconductor containing a mixed crystal having a composition represented by (Ga(1-x)Fex)2yO3, wherein 0.10?x?0.40 and 0.85?y?1.2, wherein the mixed crystal has a beta-gallia structure, is provided. Also, a method for manufacturing the gallium oxide-based semiconductor, including depositing a mixed crystal having a composition represented by (Ga(1-x)Fex)2yO3, wherein 0.10?x?0.40 and 0.85?y?1.2 on a substrate surface by a pulsed laser deposition method, wherein denoting the temperature of the substrate as T° C., x and T satisfy the relationship represented by 500x+800?T<1,000, is provided.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: March 12, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hayate Yamano
  • Patent number: 11925081
    Abstract: A display apparatus includes: a substrate including a display area and a peripheral area, the display area including a first display area, a second display area on one side of the first display area, and a third display area on another side of the first display area opposing the one side of the first display area; a driving voltage supply line in the peripheral area; a plurality of first driving voltage lines in the display area to be electrically connected to the driving voltage supply line; a driving voltage connection line surrounding the first display area. The driving voltage connection line includes a portion disposed in the peripheral area.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventor: Minsu Lee
  • Patent number: 11925068
    Abstract: A display device includes: a substrate including a display area and a non-display area outside the display area; a planarization layer over the substrate, where a first contact hole, a second contact hole and a dummy hole are defined through the planarization layer; a first pixel on the planarization layer and including a first pixel electrode, where the first pixel electrode overlaps the first contact hole and the dummy hole; and a second pixel on the planarization layer and including a second pixel electrode, where the second pixel electrode overlaps the second contact hole.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hyeonbum Lee
  • Patent number: 11916086
    Abstract: A manufacturing method of display panel, a display panel and a display device are disclosed. The manufacturing method includes following steps: providing a substrate, forming a first barrier layer on the substrate, forming a conductive layer on the first barrier layer, forming a second barrier layer on the conductive layer, forming a photoresist pattern on the second barrier layer, and then performing a plasma treatment on the photoresist pattern to form a first gap between the photoresist pattern and the second barrier layer.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: February 27, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Xiaobo Hu
  • Patent number: 11895871
    Abstract: A light emitting device includes a transistor, a light reflection layer, a first insulation layer that includes a first layer thickness part, a second layer thickness part, and a third layer thickness part, a pixel electrode that is provided on the first insulation layer, a second insulation layer that covers a peripheral section of the pixel electrode, a light emission functional layer, a facing electrode, and a conductive layer that is provided on the first layer thickness part. The pixel electrode includes a first pixel electrode which is provided in the first layer thickness part, a second pixel electrode which is provided in the second layer thickness part, and a third pixel electrode which is provided in the third layer thickness part. The first pixel electrode, the second pixel electrode, and the third pixel electrode are connected to the transistor through the conductive layer.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: February 6, 2024
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Takeshi Koshihara, Ryoichi Nozawa
  • Patent number: 11894491
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: February 6, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Patent number: 11894259
    Abstract: A method for manufacturing a semiconductor device structure includes forming a first metallization line and a second metallization line extending along a first direction; forming a first isolation feature and a second isolation feature between the first metallization line and the second metallization line, wherein the first metallization line, the second metallization line, the first isolation feature and the second isolation feature define an aperture; forming a profile modifier within the aperture, wherein the profile modifier comprises a plurality of segments spaced apart from each other, wherein each of the segments are located at corners of the aperture; and forming a contact feature surrounded by the plurality of segments.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 6, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shih-En Lin, Jui-Lin Chin
  • Patent number: 11889728
    Abstract: A display device includes: a resin substrate; a TFT layer; and a light-emitting element. A bending portion is provided with a first resin film formed of the same material and in the same layer as those of a first flattening film, and the first resin film fills a slit. An upper face of the first resin film is provided with a plurality of first connection wiring lines formed of a third metal film, and the plurality of first connection wiring lines extend in parallel to each other in a direction intersecting the extending direction of the bending portion. The plurality of first connection wiring lines are electrically connected to a plurality of first lead-out wiring lines, respectively in a display region side of the slit, and electrically connected to a plurality of second lead-out wiring lines, respectively in a terminal portion side of the slit.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: January 30, 2024
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Shinji Ichikawa, Shinsuke Saida, Shoji Okazaki, Tokuo Yoshida, Hiroki Taniyama, Kohji Ariga, Hiroharu Jinmura, Akira Inoue, Yoshihiro Nakada, Yoshihiro Kohara, Koji Tanimura
  • Patent number: 11862689
    Abstract: Group-III element nitride semiconductor substrate including a first surface and a second surface that are easy to visually distinguish from each other. An end portion is easily detected with an optical sensor, a large effective area (area that can be used in device production) can be secured, and warping of the entirety of the substrate is reduced. A Group-III element nitride semiconductor substrate includes a first surface; and a second surface, wherein the first surface is a mirror surface, the second surface has a second-surface central region and a second-surface outer peripheral region, the second-surface central region is a mirror surface, and the second-surface outer peripheral region is a non-mirror surface.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: January 2, 2024
    Assignee: NGK INSULATORS, LTD.
    Inventors: Katsuhiro Imai, Masahiro Sakai, Hiroki Kobayashi
  • Patent number: 11848339
    Abstract: A semiconductor structure includes a semiconductor substrate, an image sensor, and an isolation structure. The isolation structure is adjacent to the image sensor and disposed in the semiconductor substrate. The isolation structure includes a first oxide layer, a second oxide layer over the first oxide layer, and a charge-trapping layer disposed between the first oxide layer and the second oxide layer. The charge-trapping layer includes a material different from those of the first oxide layer and the second oxide layer.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tzung-Yi Tsai, Kuo-Yu Wu, Tse-Hua Lu
  • Patent number: 11837510
    Abstract: The present invention provides a method for analyzing a silicon substrate, by which impurities such as a very small amount of metal in a silicon substrate provided with a thick nitride film can be analyzed with high accuracy with ICP-MS, and is characterized by use of a silicon substrate analysis apparatus including an analysis scan port having a load port, a substrate conveyance robot, an aligner, a drying chamber, a vapor phase decomposition chamber, an analysis stage and a nozzle for analysis of a substrate; an analysis liquid collection unit; and an analyzer for performing inductive coupling plasma analysis.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: December 5, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Jiahong Wu, Katsuhiko Kawabata, Mitsumasa Ikeuchi, Sungjae Lee
  • Patent number: 11825719
    Abstract: A light emitting display device comprises a subpixel having a light emitting element disposed in a light emission area on a substrate and a circuit area in which a circuit for driving the light emitting element is disposed, a gate line disposed in the circuit area in a first direction, and at least one power line disposed in a second direction crossing the first direction, the at least one power line including a first power bridge line and a second power bridge line which are spaced apart from each other in the first direction.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: November 21, 2023
    Assignee: LG Display Co., Ltd.
    Inventors: Hun Jang, Daeyoung Seo, Soyoung Lee
  • Patent number: 11818930
    Abstract: According to one embodiment, a display device includes a lower electrode arranged on a first insulating layer, a second insulating layer arranged on the first insulating layer, having an opening overlapping the lower electrode, and being in a lattice form, a feed line arranged on the second insulating layer, having a first line portion, a second line portion, and a third line portion being continuous with the first and second line portions and having a different width from the first and second line portions, an organic layer arranged in the opening and covering the lower electrode, and an upper electrode being in contact with the first, second and third line portions, and covering the organic layer.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 14, 2023
    Assignee: Japan Display Inc.
    Inventors: Hayata Aoki, Hiroumi Kinjo, Masumi Nishimura
  • Patent number: 11817458
    Abstract: A display device includes: a substrate; a polycrystalline silicon film on the substrate; and a first buffer film between the substrate and the polycrystalline silicon film and having one surface contacting the polycrystalline silicon film and another surface opposite to the one surface, wherein the one surface of the first buffer film has a first root mean square (RMS) roughness range, and the first RMS roughness range is 1.5 nm or less.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 14, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ki Hyun Kim, Young Gil Park, Jin Suk Lee, Jai Sun Kyoung, Sug Woo Jung
  • Patent number: 11806901
    Abstract: According to one embodiment, a template is provided with a transferring pattern on a first surface of a substrate. The transferring pattern includes a first projecting portion that projects from the first surface with a first height and extends in a first direction along the first surface, a second projecting portion that projects from the first surface with a second height higher than the first height and extends in a second direction along the first surface, a first columnar portion that is arranged at a position overlapping with the first projecting portion and has a top surface with a third height higher than the second height as a height from the first surface, and a second columnar portion that is arranged at a position overlapping with the second projecting portion and has a top surface with the third height as a height from the first surface.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: November 7, 2023
    Assignee: Kioxia Corporation
    Inventors: Kazuhiro Takahata, Toshiaki Komukai, Hideki Kanai
  • Patent number: 11798950
    Abstract: The purpose of the present invention is to prevent forming of soot like black substance on the back of the TFT substrate of resin during laser ablation to separate the glass substrate from the TFT substrate. The present invention takes the following structure to counter measure the above problem. A display device having pixels formed on a first surface of the resin substrate including: a first layer, formed from nitride, being formed on a second surface of the resin substrate, the second surface being an opposite surface to the first surface, in which a second layer, which is a separation layer, is formed on the first layer.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: October 24, 2023
    Assignee: Japan Display Inc.
    Inventors: Hiroshi Kawanago, Kazufumi Watabe