Abstract: A light emitting device includes a transistor, a light reflection layer, a first insulation layer that includes a first layer thickness part, a second layer thickness part, and a third layer thickness part, a pixel electrode that is provided on the first insulation layer, a second insulation layer that covers a peripheral section of the pixel electrode, a light emission functional layer, a facing electrode, and a conductive layer that is provided on the first layer thickness part. The pixel electrode includes a first pixel electrode which is provided in the first layer thickness part, a second pixel electrode which is provided in the second layer thickness part, and a third pixel electrode which is provided in the third layer thickness part. The first pixel electrode, the second pixel electrode, and the third pixel electrode are connected to the transistor through the conductive layer.

Abstract: A method of manufacturing a display substrate which includes a central display area and an arc-shaped stretch area located at a corner of the central display area, wherein the method includes: preparing a substrate to be etched, which includes a flexible substrate, a stack structure disposed on the flexible substrate, and a last-dry-etched metal layer disposed on a side of the stack structure away from the flexible substrate, the stack structure including an active layer, at least one conductive layer, and a plurality of insulating layers, wherein the last-dry-etched metal layer is a last metal layer that is formed through dry etching; and forming a stretch groove by patterning the substrate to be etched, wherein the stretch groove is disposed in the stretch area and passes through the stack structure and a part of the flexible substrate. A display substrate, a display panel and a display device are further provided.

Abstract: A method is used to prepare the remainder of a donor substrate, from which a layer has been removed by delamination in a plane weakened by ion implantation. The remainder comprises, on a main face, an annular step corresponding to a non-removed part of the donor substrate. The method comprises the deposition of a smoothing oxide on the main face of the remainder in order to fill the inner space defined by the annular step and to cover at least part of the annular step, as well as heat treatment for densification of the smoothing oxide. A substrate is produced by the method, and the substrate may be used in subsequent processes.

Abstract: In a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The transistor includes an oxide semiconductor film over a first insulating film; a second insulating film over the oxide semiconductor film; a metal oxide film over the second insulating film; a gate electrode over the metal oxide film; and a third insulating film over the oxide semiconductor film and the gate electrode. The oxide semiconductor film includes a channel region overlapping with the gate electrode, a source region in contact with the third insulating film, and a drain region in contact with the third insulating film. The source region and the drain region contain one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and a rare gas.

Abstract: To provide a novel oxide semiconductor film. The oxide semiconductor film includes In, M, and Zn. The M is Al, Ga, Y, or Sn. In the case where the proportion of In in the oxide semiconductor film is 4, the proportion of M is greater than or equal to 1.5 and less than or equal 2.5 and the proportion of Zn is greater than or equal to 2 and less than or equal to 4.

Abstract: A flexible display panel and a manufacturing method thereof are provided. The flexible display panel includes a display region and a non-display region. A part of the flexible display panel disposed in the non-display region includes a flexible substrate, a multi-barrier layer, and a planarization layer. A cutting track is defined at a peripheral edge of the non-display region, and a groove is defined in the cutting track. An end of the planarization layer extends to at least an interface formed between the multi-barrier layer and the flexible substrate through a sidewall of the groove.

Abstract: A Fin FET semiconductor device includes a fin structure extending in a first direction and extending from an isolation insulating layer. The Fin FET device also includes a gate stack including a gate electrode layer, a gate dielectric layer, side wall insulating layers disposed at both sides of the gate electrode layer, and interlayer dielectric layers disposed at both sides of the side wall insulating layers. The gate stack is disposed over the isolation insulating layer, covers a portion of the fin structure, and extends in a second direction perpendicular to the first direction. A recess is formed in an upper surface of the isolation insulating layer not covered by the side wall insulating layers and the interlayer dielectric layers. At least part of the gate electrode layer and the gate dielectric layer fill the recess.

Abstract: A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.

Abstract: A resin protection member forming apparatus includes a stage having a resin placement surface on which a particulate thermoplastic resin is to be placed. The stage includes a Peltier device, a DC power source, and a switch. The Peltier device is disposed inside the stage and has an upper surface, which is parallel and close to the resin placement surface, and a lower surface, which is far from the resin placement surface. The DC power source supplies a DC current to the Peltier device. The switch changes a direction of the DC current to be supplied to the Peltier device, between a first direction to heat the upper surface of the Peltier device and a second direction, opposite to the first direction, to cool the upper surface of the Peltier device.

Abstract: A semiconductor device that allows easy hole extraction is provided. The semiconductor device includes: a semiconductor substrate having drift and base regions; a transistor portion formed in the semiconductor substrate; and a diode portion formed adjacent to the transistor portion and in the semiconductor substrate. In the transistor portion and the diode portion: a plurality of trench portions each arrayed along a predetermined array direction; and a plurality of mesa portions formed between respective trench portions are formed, among the plurality of mesa portions, at least one boundary mesa portion at a boundary between the transistor portion and the diode portion includes a contact region at an upper surface of the semiconductor substrate and having a concentration higher than that of the base region, and an area of the contact region at the boundary mesa portion is greater than an area of the contact region at another mesa portion.

Abstract: A method for manufacturing a semiconductor device includes (i) a step of preparing a first semiconductor chip having a first electrode pad thereon and a second semiconductor chip having a second electrode pad thereon and larger in thickness than the first semiconductor chip, the second electrode pad being larger in size than the first electrode pad, (ii) a step of mounting the first semiconductor chip and the second semiconductor chip on the same planarized surface of a substrate having a uniform thickness, (iii) a step of bonding a ball formed by heating and melting a bonding wire to the second electrode pad, (iv) a step of first-bonding the bonding wire to the first electrode pad, and (v) a step of second-bonding the bonding wire to the ball.

Abstract: An organic light-emitting display device with improved light efficiency includes a plurality of pixel electrodes each corresponding one of at least a first, second, or third pixel; a pixel-defining layer covering an edge and exposing a central portion of the pixel electrodes; an intermediate layer over the pixel electrode and including an emission layer; an opposite electrode over the intermediate layer; and a lens layer over the opposite electrode and including a plurality of condensing lenses each having a circular lower surface. An area of the portion of the pixel electrode exposed by the pixel-defining layer is A, and an area of the lower surface of the condensing lens is B. For the first pixel, a ratio B/A ranges from about 1.34 to about 2.63. For the second pixel, B/A ranges from about 1.43 to about 3.00, For the third pixel, B/A ranges from about 1.30 to about 2.43.

Abstract: A display device includes a data line extending in a first direction, a scan line extending in a second direction crossing the first direction, a wire extending in the second direction, and a bridge electrically connecting the wire to the data line, where the wire includes a branch protruding from the wire in the first direction, and the bridge overlaps the data line and the branch of the wire.

Abstract: An organic light emitting display device may include a first active pattern disposed on a substrate and including a first region, a second region, and a third region; a first gate electrode disposed on the first active pattern and forming a first transistor together with the first region and the second region; a second gate electrode disposed on the first active pattern and forming a second transistor together with the second region and the third region; a third gate electrode disposed on the first gate electrode, overlapping the second region, and forming a storage capacitor together with the first gate electrode; a metal pattern disposed between the first active pattern and the third gate electrode and overlapping the second region; and an organic light emitting diode electrically connected to the first transistor, the second transistor, and the storage capacitor.

Abstract: The present invention provides a method of making a silicon on insulator (SOI) structure, comprising steps of: providing a bonded structure, the bonded structure comprises a first substrate, a second substrate and an insulating buried layer, the insulating buried layer is positioned between the first substrate and the second substrate; peeling off a layer of removing region of the first substrate from the bonded structure to obtain a SOI structure; and processing the SOI structure with isothermal annealing technology at a pressure which is lower than atmospheric pressure.

Abstract: The present application provides a display substrate having a plurality of subpixel areas. The display substrate includes a base substrate; a plurality of thin film transistors on the base substrate; and a plurality of semiconductor junctions configured to shield light from irradiating on active layers of the plurality of thin film transistors.

Abstract: A display device including: a lower substrate having a display area and a peripheral area; a plurality of lower electrodes disposed in the display area and on the lower substrate; a pixel defining layer covering a portion of each of the lower electrodes; a light emitting layer disposed on the lower electrodes and the pixel defining layer; an upper electrode disposed on the light emitting layer; a plurality of optical filters disposed on the upper electrode and spaced apart from each other; a lower light blocking layer disposed between the optical filters, and having a plurality of openings; an upper substrate disposed on the lower light blocking layer to oppose the lower substrate; and an alignment structure disposed in the peripheral area of the lower substrate and the upper substrate, and including a material identical to a material of the pixel defining layer and the lower light blocking layer.

Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a base substrate, and a first functional layer and a second functional layer laminated one on another on the base substrate. The first functional layer forms a level-different region on the base substrate, and the second functional layer covers the level-different region. A portion of the first functional layer at the level-different region is provided with a target gradient angle, the target gradient angle is a maximum gradient angle when the second functional layer has a predetermined thickness, and the predetermined thickness is a thickness when a functional requirement of the second functional layer has been met and the second functional layer is not broken at the level-different region.

Abstract: A self-aligned multiple patterning (SAMP) multi-color spacer patterning process is disclosed for formation of structures on substrates. Trenches and vias may be formed in the process. A trench memorization layer and a via memorization layer may be formed on the substrate. In one embodiment, the trench memorization layer and the via memorization layer are formed between the multi-color spacer patterning structures and a low-k interlayer dielectric layer. The use of the trench memorization layer and the via memorization layer allows the formation of trenches and vias in the low-k interlayer dielectric layer without causing damage to the low-k properties of the low-k interlayer dielectric layer.

Abstract: The embodiments of the present disclosure provide a display panel and a display apparatus. The display panel includes: a first substrate; a plurality of sub-pixels arranged in an array on the substrate, the plurality of sub-pixels comprising a first type of sub-pixels and a second type of sub-pixels; and at least one data line, each of which is disposed between adjacent columns of sub-pixels of the array and extending along a second direction, an overlapped area of projection of each data line on the first substrate and projection of the first type of sub-pixels on the first substrate has a first width, and an overlapped area of the projection of each data line on the first substrate and projection of the second type of sub-pixels on the first substrate has a second width less than the first width.