Abstract: Disclosed herein is a light emitting apparatus including: one or a plurality of light emitting devices each having a plurality of electrodes and each emitting light from the upper surface of the light emitting device; a plurality of terminal electrodes provided on the lower side of the light emitting devices in a positional relation with the light emitting devices and electrically connected to the electrodes of the light emitting devices; a first metal line brought into contact with the upper surfaces of the light emitting devices and one of the terminal electrodes, provided at a location separated away from side surfaces of the light emitting devices and created in a film creation process; and an insulator in which the light emitting devices and the first metal line are embedded.

Abstract: At least one layer including a scavenging material and a dielectric material is deposited over a gate stack, and is subsequently anisotropically etched to form a oxygen-scavenging-material-including gate spacer. The oxygen-scavenging-material-including gate spacer can be a scavenging-nanoparticle-including gate spacer or a scavenging-island-including gate spacer. The scavenging material is distributed within the oxygen-scavenging-material-including gate spacer in a manner that prevents an electrical short between a gate electrode and a semiconductor material underlying a gate dielectric. The scavenging material actively scavenges oxygen that diffuses toward the gate dielectric from above, or from the outside of, a dielectric gate spacer that can be formed around the oxygen-scavenging-material-including gate spacer.

Abstract: In an acceleration sensor, a sensor unit includes a weight portion having a recess section with one open surface and a solid section one-piece formed with the recess section, beam portions for rotatably supporting the weight portion such that the recess section and the solid section are arranged along a rotation direction, a movable electrode, fixed electrodes, detection electrodes electrically connected to the fixed electrodes to detect a capacitance between the movable electrode and the fixed electrodes. A fixed plate is arranged in a spaced-apart relationship with a surface of the weight portion on which the movable electrode is provided, and embedment electrodes are embedded in the fixed plate to extend along a thickness direction of the fixed plate, the embedment electrodes having one end portions facing the movable electrode to serve as the fixed electrodes and the other end portions configured to serve as the detection electrodes.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a buffer layer on a substrate, an graded aluminum gallium nitride (AlGaN) layer disposed on the buffer layer, a gallium nitride (GaN) layer disposed on the graded AlGaN layer, a second AlGaN layer disposed on the GaN layer and a gate stack disposed on the second AlGaN layer. The gate stack includes one or more of a III-V compound p-doped layer, a III-V compound n-doped layer, an aluminum nitride (AlN) layer between the III-V compound p-doped and n-doped layers, and a metal layer formed over the p-doped, AlN, and n-doped layers. A dielectric layer can also underlie the metal layer.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate; a gate line disposed on the substrate; a gate insulating layer disposed on the gate line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed on the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, wherein the protection electrode comprises the same material as the first electrode.

Abstract: An LED module includes a substrate, one or more LED chips supported by a main surface of the substrate, and wirings. The substrate has one or more through holes penetrating from the main surface to a rear surface. The wirings are formed on the substrate and make electrical conduction with the LED chips. The wirings include pads which are formed on the main surface and make electrical conduction with the LED chips, rear surface electrodes which are formed on the rear surface, and through wirings which make electrical conduction between the pads and the rear surface electrodes and are formed on the inner sides of the through holes.

Abstract: Methods and apparatus relating to providing a collection grid suitable for use in PV modules. The disclosed collection grid may be at least partially applied to a protective laminate sheet in a manner that removes the high temperature requirements of conventional screen printed collection grids, to avoid unwanted heat-related deformation of the laminate sheet.

Abstract: A method of manufacturing a photoelectric conversion element, which is provided with a substrate, a first electrode film having first and second conductive films provided on the substrate, a metal compound film covering the first electrode film, a semiconductor film connected with the metal compound film, a second electrode film connected with the semiconductor film, and an insulating film covering and surrounding the substrate, the first electrode film, the semiconductor film, and the metal compound film, the method including: forming the first conductive film to be connected with the substrate and the second conductive film to be connected with the first electrode film; forming the second conductive film in a predetermined shape using wet etching after the forming of the first and second conductive films, and forming the metal compound film which covers the first electrode film after the forming of the metal compound film.

Abstract: A semiconductor device according an aspect of the present disclosure may include an isolation layer formed within a substrate and formed to define an active region, a junction formed in the active region, well regions formed under the isolation layer, and a plug embedded within the substrate between the junction and the well regions and formed extend to a greater depth than the well regions.

Abstract: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

Abstract: A technique of manufacturing a display device with high productivity is provided. In addition, a high-definition display device with high color purity is provided. By adjusting the optical path length between an electrode having a reflective property and a light-emitting layer by the central wavelength of a wavelength range of light passing through a color filter layer, the high-definition display device with high color purity is provided without performing selective deposition of light-emitting layers. In a light-emitting element, a plurality of light-emitting layers emitting light of different colors are stacked. The closer the light-emitting layer is to the electrode having a reflective property, the longer the wavelength of light emitted from the light-emitting layer is.

Abstract: A semiconductor package substrate may include a first semiconductor chip, a second semiconductor chip, plugs and interconnection terminals. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The first and second semiconductor chips may have corresponding first regions and corresponding second regions. Conductive plugs may be built only in a first region of the first semiconductor chip. Circuitry of the second semiconductor chip may only be electrically connected to the first semiconductor chip through the conductive connectors corresponding to the first regions of the first and second semiconductor chips.

Abstract: A light-emitting element with which a reduction in power consumption and an improvement in productivity of a display device can be achieved is provided. A technique of manufacturing a display device with high productivity is provided. The light-emitting element includes an electrode having a reflective property, and a first light-emitting layer, a charge generation layer, a second light-emitting layer, and an electrode having a light-transmitting property stacked in this order over the electrode having a reflective property. The optical path length between the electrode having a reflective property and the first light-emitting layer is one-quarter of the peak wavelength of the emission spectrum of the first light-emitting layer. The optical path length between the electrode having a reflective property and the second light-emitting layer is three-quarters of the peak wavelength of the emission spectrum of the second light-emitting layer.

Abstract: According to example embodiments, a method of manufacturing an organic thin film transistor includes sequentially forming a gate electrode, a gate insulator, a source electrode, and a drain electrode on a substrate, forming a first self-assembled monolayer on the source electrode and the drain electrode from a first self-assembled monolayer precursor, forming a second self-assembled monolayer on the gate insulator from a second self-assembled monolayer precursor that is different from the first self-assembled monolayer precursor, and forming an organic semiconductor on the first self-assembled monolayer and the second self-assembled monolayer. The first self-assembled monolayer and the second self-assembled monolayer may be formed simultaneously or sequentially in a single container. An organic thin film transistor may be manufactured according to the method. A display device may include the organic thin film transistor.

Abstract: The control of gate widths is improved for system-on-a-chip (SoC) devices which require multiple gate dielectric “gate” thicknesses, e.g., for analog and digital processing on the same chip. A hard mask is formed to protect a thick gate while the thin gate region is etched to remove oxide (sometimes referred to as a preclean step). The patterned substrate is then processed to selectively deposit a second thickness of gate material. The thin gate may be silicon oxide and the physical thickness of the thin gate may be less than that of the thick gate. In a preferred embodiment, the substrate is not exposed to air or atmosphere after the hardmask is removed.

Abstract: Methods of forming an electrically programmable fuse (e-fuse) structure and the e-fuse structure are disclosed. Various embodiments of forming the e-fuse structure include: forming a dummy poly gate structure to contact a surface of a silicon structure, the dummy poly gate structure extending only a part of a length of the silicon structure; and converting an unobstructed portion of the surface of the silicon structure to silicide to form a thinned strip of the silicide between two end regions.

Abstract: In one embodiment of a method of manufacturing a semiconductor device, a plurality of substantially columnar trenches are formed along a region for forming a dicing line in a semiconductor substrate having first surface and second surfaces opposed to each other, from the first surface. The substrate is subjected to a heat treatment. At least one hollow portion is formed in the substrate by migration of a material which composes the substrate. Semiconductor devices are formed in semiconductor regions of the substrate which are surrounded by the region for forming the dicing line. The semiconductor regions are provided on a side of the first surface. A portion of the substrate is removed from a side of the second surface until the thickness is reduced to a predetermined value. The substrate is divided into chips along a dicing line from at least the one hollow portion as a starting point.

Abstract: A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.

Abstract: According to one embodiment, a semiconductor device includes a first, a second, a third, a fourth semiconductor region, a control electrode, and an insulating film. The first region contains silicon carbide. The second region is provided on the first region and contains silicon carbide. The third region is provided on the second region and contains silicon carbide. The fourth region is provided on the third region and contains silicon carbide. The control electrode is provided in a trench. The trench is formed in the fourth, the third, and the second semiconductor region. The insulating film is provided between a side surface of the trench and the control electrode. The insulating film contains a high-dielectric constant region. The high-dielectric constant region contacts with at least the third semiconductor region. The high-dielectric constant region has a higher dielectric constant than a dielectric constant of silicon oxide.

Abstract: A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.