Abstract: Provided is a semiconductor device with a diode and a silicon controlled rectifier (SCR) including a substrate having a first conductivity type, a well region having a second conductivity type, a first doped region having the first conductivity type, and a second doped region having the second conductivity type. The well region is disposed in the substrate. The first doped region is disposed in the substrate. The second doped region is disposed in the substrate. The well region and the first doped region form a first PN junction, the well region and the substrate form a second PN junction, and the substrate and the second doped region form a third junction. The first, second, and third PN junctions form the SCR, and the first doped region and the third PN junction form the diode.

Abstract: In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.

Abstract: In an embodiment, a device includes: a conductive shield on a first dielectric layer; a second dielectric layer on the first dielectric layer and the conductive shield, the first and second dielectric layers surrounding the conductive shield, the second dielectric layer including: a first portion disposed along an outer periphery of the conductive shield; a second portion extending through a center region of the conductive shield; and a third portion extending through a channel region of the conductive shield, the third portion connecting the first portion to the second portion; a coil on the second dielectric layer, the coil disposed over the conductive shield; an integrated circuit die on the second dielectric layer, the integrated circuit die disposed outside of the coil; and an encapsulant surrounding the coil and the integrated circuit die, top surfaces of the encapsulant, the integrated circuit die, and the coil being level.

Abstract: A power device, comprising, a semiconductor substrate composition having a substrate layer of a first conductivity type, one or more lateral double diffused metal oxide semiconductor (LDMOS) devices formed in the substrate layer. LDMOS structures are integrated in to the isolation region of a high voltage well. Each LDMOS is isolated from a power device substrate area by an isolator structure formed from the substrate layer. Each LDMOS comprises a continuous field plate formed at least partially on the thick insulation layer over each of the one or more LDMOS devices and in conductive contact with the power device substrate area.

Abstract: Methods of forming semiconductor devices include patterning a stack of layers that includes channel layers, n-type doped first sacrificial layers between the channel layers, and carbon-doped second sacrificial layers between the channel layers and the first sacrificial layers, to form one or more device regions. The first sacrificial layers and the second sacrificial layers are recessed relative to the channel layers with distinct respective etches to produce a flat, continuous, and vertical surface from sidewalls of the first sacrificial layers and respective second sacrificial layers. Inner spacers are formed in recesses formed by the recessing of the first sacrificial layers and the second sacrificial layers. The first sacrificial layers and the second sacrificial layers are etched away to leave the channel layers suspended.

Abstract: Disclosed is a quantum-confined Stark effect (QCSE) modulator. In the modulator, a first doped semiconductor region has a first type conductivity, is at the bottom of a trench in a dielectric layer and is immediately adjacent to a semiconductor layer. An MQW region is in the trench on the first doped semiconductor region and at least upper segments of sidewalls of the MQW region are angled away from adjacent sidewalls of the trench such that there are spaces between the MQW region and the dielectric layer. Dielectric spacers fill the spaces. A second doped semiconductor region has a second type conductivity, is on top of the MQW region and optionally extends laterally onto the tops of the dielectric spacers. The spacers prevent shorting of the doped semiconductor regions. Also disclosed are embodiments of a photonics structure including the modulator and of methods for forming the modulator and the photonics structure.

Abstract: A delocalizer and a light emitting device using the same are provided. The light emitting device includes a substrate and a first electrode layer. The first electrode layer is disposed over the substrate, in which two sides of the first electrode layer have a first contact pad and a second contact pad, respectively. The delocalizer is disposed between the first contact pad and the second contact pad. The delocalizer may include a plurality of strip-shaped transparent conductive members adjacent to each other, and a plurality of transparent conductive blocks adjacent to each other may be disposed between adjacent two of the strip-shaped transparent conductive members.

Abstract: A high-electron mobility transistor includes a substrate; a buffer layer over the substrate; a GaN channel layer over the buffer layer; a AlGaN layer over the GaN channel layer; a gate recess in the AlGaN layer; a source region and a drain region on opposite sides of the gate recess; a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively; and a p-GaN gate layer in and on the gate recess.

Abstract: A display device includes a display area, a peripheral area, a pad portion, a bending area, a first crack detection circuit, and a first crack detection line. The display area includes pixels and data lines. The peripheral area is disposed outside the display area. The pad portion is disposed in the peripheral area. The bending area is disposed in the peripheral area. The bending area is bendable or in a bent state. The first crack detection circuit is disposed between the display area and the pad portion. The first crack detection circuit includes switches. The first crack detection line includes a first curved portion disposed in the bending area. The first crack detection line is connected between the pad portion and the first crack detection circuit.

Abstract: An organic light emitting display apparatus can include a substrate including a display area and a bending area; a pixel array layer including a driving wiring in the display area, and a thin film transistor electrically connected to the driving wiring; a planarization layer covering the pixel array layer; a light emitting device layer disposed on the planarization layer, the light emitting device layer being electrically connected to the thin film transistor; a routing wiring disposed in the bending area, the routing wiring being electrically connected to the driving wiring; a wiring contact part including a contact hole for electrically connecting the driving wiring to the routing wiring; and an encapsulation layer covering the light emitting device layer and the wiring contact part.

Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer, wherein a resistance of a peripheral portion of the p-side nitride semiconductor layer is higher than a resistance of an area inside of the peripheral portion in a top view, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; and first protective layer located on an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer.

Abstract: A long-wavelength light emitting device is disclosed. The long-wavelength light emitting device comprises: a first conductive semi-conductor layer; an active layer that is located on the first conductive semi-conductor layer and that has a quantum well structure; and a second conductive semi-conductor layer that is located on the active layer. The active layer comprises: one or more well layers including a nitride-based semi-conductor having 21% or more In; two barrier layers located in upper and lower parts of the well layers, and located between the well layers and the barrier layers, wherein the upper capping layers have a bigger band-gap energy relative to the barrier layers, and the upper capping layers and the well layers are in contact.

Abstract: Methods are provided to construct field-effect transistors comprising low-resistance metallic gate structures. A field-effect transistor includes a nanosheet stack and a metal gate which covers a gate region of the nanosheet stack. The nanosheet stack includes nanosheet channel layers and an etch stop layer disposed above an upper nanosheet channel layer. The metal gate includes a work function metal which encapsulates the nanosheet channel layers, and a gate electrode disposed above and in contact with the work function metal. An upper surface of the work function metal is recessed to be substantially coplanar with the etch stop layer. The gate electrode has a resistivity which is less than a resistivity of the work function metal. The etch stop layer protects the portion of the work function metal disposed between the etch stop layer and the upper nanosheet channel layer from being etched when recessing the work function metal.

Abstract: A non-volatile memory cell is described. The non-volatile memory cell includes a substrate, insulators, a floating gate and a control gate. The substrate has a first fin and a second fin, wherein the second fin is located at a first side of the first fin and a conductive type of the second fin is different from that of the first fin. The insulators are located over the substrate, wherein the first fin and the second fin are respectively located between the insulators. The floating gate is located over the first fin, the insulators and the second fin. The control gate includes the second fin.

Abstract: Methods are provided to construct field-effect transistors comprising low-resistance metallic gate structures. A field-effect transistor includes a nanosheet stack and a metal gate which covers a gate region of the nanosheet stack. The nanosheet stack includes nanosheet channel layers and an etch stop layer disposed above an upper nanosheet channel layer. The metal gate includes a work function metal which encapsulates the nanosheet channel layers, and a gate electrode disposed above and in contact with the work function metal. An upper surface of the work function metal is recessed to be substantially coplanar with the etch stop layer. The gate electrode has a resistivity which is less than a resistivity of the work function metal. The etch stop layer protects the portion of the work function metal disposed between the etch stop layer and the upper nanosheet channel layer from being etched when recessing the work function metal.

Abstract: A light source device includes a semiconductor light-emitting device which emits coherent excitation light, and a wavelength conversion element which is spaced from the semiconductor light-emitting device, generates fluorescence by converting the wavelength of the excitation light emitted from semiconductor light-emitting device, and generates scattered light by scattering the excitation light. The wavelength conversion element includes a support member, and a wavelength converter disposed on the support member. The wavelength converter includes a first wavelength converter, and a second wavelength converter which is disposed around the first wavelength converter to surround the first wavelength converter in a top view of the surface of the support member on which the wavelength converter is disposed. The ratio of the intensity of fluorescence to that of scattered light is lower in the second wavelength converter than in the first wavelength converter.

Abstract: A display panel includes a first substrate having a display area and a peripheral area. The display area includes pixels with first output wires connected to the pixels. A first driver is connected to the first output wires and positioned in the peripheral area at a first side of the display area. The first substrate includes a notch portion having a curved edge and the display area has a first display portion and a second display portion with the notch portion therebetween. At least one of the first output wires is a first main line at the first display portion, a second main line at the second display portion, and a first connecting line that is connected to the first main line and the second main line and is at the peripheral area between the first display portion and the second display portion.

Abstract: A bi-directional semiconductor switching device is formed by forming first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second. FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is sandwiched between the sources for the first and second FETs. The drift layer acts as a common drain for both the first FET and second FET.

Abstract: A multi-stage lamination process is used to laminate a wavelength conversion film to a transparent substrate, and subsequently to a light emitting element. The wavelength conversion film may be an uncured phosphor-embedded silicone polymer, and the lamination process includes heating the polymer so that it adheres to the transparent substrate, but is not fully cured. The phosphor-laminated transparent substrate is sliced/diced and the wavelength conversion film of each diced substrate is placed upon each light emitting element. The semi-cured wavelength conversion film is then laminated to the light emitting element via heating, consequently curing the phosphor film. Throughout the process, no glue is used, and the optical losses associated with glue material are not introduced.

Abstract: The present disclosure provides a semiconductor device including a substrate, a first active region, a second active region, and a gate structure. The first active region and the second active region are disposed in the substrate. The gate structure includes a bottom, a first sidewall attached to the first active region, and a second sidewall attached to the second active region. The first sidewall and the bottom have a first point of intersection, and the first sidewall and a first horizontal line starting from the first point toward the substrate have a first included angle. The second sidewall and the bottom have a second point of intersection, and the second sidewall and a second horizontal line starting from the second point toward the substrate have a second included angle. The first included angle is different from the second included angle. A method for manufacturing a semiconductor device is provided herein.