Abstract: A display panel includes a first substrate having a display area and a peripheral area. The display area includes pixels with first output wires connected to the pixels. A first driver is connected to the first output wires and positioned in the peripheral area at a first side of the display area. The first substrate includes a notch portion having a curved edge and the display area has a first display portion and a second display portion with the notch portion therebetween. At least one of the first output wires is a first main line at the first display portion, a second main line at the second display portion, and a first connecting line that is connected to the first main line and the second main line and is at the peripheral area between the first display portion and the second display portion.

Abstract: A bi-directional semiconductor switching device is formed by forming first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second. FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is sandwiched between the sources for the first and second FETs. The drift layer acts as a common drain for both the first FET and second FET.

Abstract: A multi-stage lamination process is used to laminate a wavelength conversion film to a transparent substrate, and subsequently to a light emitting element. The wavelength conversion film may be an uncured phosphor-embedded silicone polymer, and the lamination process includes heating the polymer so that it adheres to the transparent substrate, but is not fully cured. The phosphor-laminated transparent substrate is sliced/diced and the wavelength conversion film of each diced substrate is placed upon each light emitting element. The semi-cured wavelength conversion film is then laminated to the light emitting element via heating, consequently curing the phosphor film. Throughout the process, no glue is used, and the optical losses associated with glue material are not introduced.

Abstract: The present disclosure provides a semiconductor device including a substrate, a first active region, a second active region, and a gate structure. The first active region and the second active region are disposed in the substrate. The gate structure includes a bottom, a first sidewall attached to the first active region, and a second sidewall attached to the second active region. The first sidewall and the bottom have a first point of intersection, and the first sidewall and a first horizontal line starting from the first point toward the substrate have a first included angle. The second sidewall and the bottom have a second point of intersection, and the second sidewall and a second horizontal line starting from the second point toward the substrate have a second included angle. The first included angle is different from the second included angle. A method for manufacturing a semiconductor device is provided herein.

Abstract: A fabrication method for a semiconductor structure is provided. The method includes: forming a base substrate; forming gate structures on the base substrate where each gate structure includes a first gate portion with first doping ions on the base substrate and a second gate portion on the first gate portion; forming a metal layer on the second gate portions; and forming a metal silicide layer by reacting a portion of the metal layer with each second gate portion through an annealing process. When forming the metal silicide layers, a reaction between the metal layer and the second gate portions has a first reacting rate and a reaction between the metal layer and the first gate portions has a second reacting rate; and the second reacting rate is smaller than the first reacting rate.

Abstract: An image-sensor package includes a cover glass, an image sensor, and an integrated circuit. The cover glass has a cover-glass bottom surface, to which the image sensor is bonded. The integrated circuit is beneath the cover-glass bottom surface, adjacent to the image sensor, and electronically connected to the image sensor. A method for packaging an image sensor includes attaching an image sensor to a cover-glass bottom surface of a cover glass, a light-sensing region of the image sensor facing the cover-glass bottom surface. The method also includes attaching an integrated circuit to the cover-glass bottom surface, a top IC-surface of the integrated circuit facing the cover-glass bottom surface.

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

Abstract: An array substrate, includes a base substrate and a plurality of pixel units arranged in an array on the base substrate. Each pixel unit includes an OLED and a pixel driver circuit. Each pixel unit of at least one of the plurality of pixel units further includes a repair line. An orthographic projection of the repair line on the base substrate partially overlaps with an orthographic projection of an anode of the OLED on the base substrate. The repair line is coupled to a pixel driving circuit in an adjacent pixel unit adjacent to the pixel unit of the plurality of pixel units.

Abstract: A semiconductor device is disclosed. A gate electrode is provided above a semiconductor substrate. A sidewall insulation film is provided to the gate electrode. Source and drain regions are provided in the substrate and contain first conductive impurities. A first semiconductor region is provided in the substrate, is on a source region side, and has a concentration of the first conductive impurities lower than the source region. A second semiconductor region is provided in the substrate, is on a drain region side, and has a concentration of the first conductive impurities lower than the drain and first semiconductor regions. A channel region is provided between the first and second semiconductor regions. A third semiconductor region is provided under the channel region, and includes second conductive impurities higher in concentration than the channel region. Information is stored by accumulating charges in the sidewall insulation film.

Abstract: A display panel and a display device are provided. The display panel is an LTPO display panel including at least one LTPS thin film transistor and at least one Oxide thin film transistor. The LTPS thin film transistor and the Oxide thin film transistor are both formed on the side of the buffer layer facing away from the substrate. A groove structure or a hollow structure is provided on the buffer layer at a position corresponding to the Oxide thin film transistor, and the Oxide thin film transistor is fabricated in the groove structure or the hollow structure, to avoid the case that the great height by which the Oxide thin film transistor protrudes from the substrate causes a great thickness of the LTPO display panel.

Abstract: The present invention relates to a display device using a semiconductor light-emitting element and, particularly, to a display device using a semiconductor light-emitting element. A display device according to the present invention comprises: a substrate including a driving thin-film transistor; a semiconductor light-emitting element including a first conductive electrode and a second conductive electrode; and a planarization layer formed to cover the driving thin-film transistor and including a reception hole in which the semiconductor light-emitting element is received, wherein a height adjustment layer is formed between the substrate and the planarization layer so as to make one of the first and the second conductive electrode and one surface of the planarization layer coincide with each other in height.

Abstract: [Object] To provide a micro LED element that can reduce deterioration in light emission efficiency, even when the micro LED element is miniaturized in size. [Solution] A micro LED element (100) includes: a nitride semiconductor layer (14) including an N-side layer (11), a light emission layer (12), and a P-side layer (13); and a plurality of micro-mesas each having a slope that surrounds the light emission layer (12) and is inclined at an angle within a prescribed range including 45° as an angle (?) formed by the slope and the light emission layer, and a flat portion formed by a surface of the P-side layer.

Abstract: In some embodiments, a method used in forming an array of memory cells comprises uses no more than two photolithographic masking steps are used in forming both: (a) sense lines longitudinally extending in a column direction that are individually directly above and electrically coupled to the upper source/drain regions of multiple of the second pedestals in the column direction; and (b) spaced elevationally-extending vias laterally between immediately-adjacent of the sense lines directly above and electrically coupled to the upper source/drain regions of multiple of the first pedestals. Other embodiments are disclosed.

Abstract: A semiconductor package includes a package substrate having an upper surface and a lower surface and including a plurality of substrate pads formed on the upper surface, a capacitor structure arranged on the upper surface of the package substrate and including a semiconductor substrate and at least one decoupling capacitor formed in the upper surface of the semiconductor substrate, a plurality of first semiconductor chips mounted on the package and supported by the capacitor structure, first conductive connection members electrically connecting chip pads of the first semiconductor chips to the substrate pads, and second conductive connection members electrically connecting capacitor pads of the decoupling capacitor to the substrate pad.

Abstract: A light emitting structure including mixing cups are described. In an embodiment, a light emitting structure includes a light emitting diode (LED) bonded to a substrate, a diffuser layer adjacent the LED, an angular filter directly over the diffuser layer and the LED, and an overcoat layer directly over the angular filter and the LED.

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

Abstract: A lighting module according to an embodiment of the invention includes: a substrate; a plurality of light emitting devices disposed in N rows (N is an integer of 1 or more) on the substrate; a first resin layer covering the plurality of light emitting devices; a first diffusion layer disposed on the first resin layer and diffusing light emitted from the first resin layer; and a second diffusion layer disposed on the first diffusion layer and diffusing light emitted from the first diffusion layer, wherein the first diffusion layer includes a diffusing agent, and the second diffusion layer includes at least one of a phosphor and ink particles.

Abstract: A light-emitting device includes: a first light-emitting element and a second light-emitting element, each having a peak emission wavelength in a range of 430 nm to 480 nm; and a sealing member covering the first light-emitting element and the second light-emitting element, the sealing member containing a first fluorescent material. The first light-emitting element and the second light-emitting element are configured to be individually driven. The sealing member includes a protruding portion at an upper surface thereof. The first light-emitting element is disposed in a first region, which is located under the protruding portion. The second light-emitting element is disposed in a second region, which is located under the upper surface of the sealing member at a position different from the first region.

Abstract: An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to each other and has at least one first conductive via. The rear surface of the image sensing element directly contacts the arc surface, and the first conductive via is extended from the front surface to the rear surface. In addition, a manufacturing method of the image sensor is also provided.

Abstract: A novel composite oxide semiconductor which can be used in a transistor including an oxide semiconductor film is provided. In the composite oxide semiconductor, a first region and a second region are mixed. The first region includes a plurality of first clusters containing In and oxygen as main components. The second region includes a plurality of second clusters containing Zn and oxygen as main components. The plurality of first clusters have portions connected to each other. The plurality of second clusters have portions connected to each other.