Abstract: A memory device comprising a vertical transistor includes a digit line that is directly coupled to the source regions of each memory cell. Because an electrical plug is not used to form a contact between the digit line and the source regions, a number of fabrication steps may be reduced and the possibility for manufacturing defects may also be reduced. In some embodiments, a memory device may include a vertical transistor having gate regions that are recessed from an upper portion of a silicon substrate. With the gate regions recessed from the silicon substrate, the gate regions are spaced further from the source/drain regions and, accordingly, cross capacitance between the gate regions and the source/drain regions may be reduced.

Abstract: A white LED assembly includes a blue LED die attached to a substrate. A first volume of a first luminescent material surrounds the blue LED die in a lateral dimension such that none of the first luminescent material is disposed directly over the blue LED die. The first luminescent material includes a relatively inefficient phosphor having a peak emission wavelength longer than 620 nm and includes substantially no phosphor having a peak emission wavelength shorter than 620 nm. A second volume of a second luminescent material is disposed over the first volume and the blue LED die. The second luminescent material includes a relatively efficient phosphor having a peak emission wavelength shorter than 620 nm and includes substantially no phosphor having a peak emission wavelength longer than 620 nm. Placement of the first and second luminescent materials in this way promotes removal of heat from the inefficient phosphor and reduces the likelihood of interabsorption.

Abstract: An integrated circuit device comprises a memory cell well formed with a flash memory device, first and second well of opposite conductivity types for formation of high voltage transistors, and third and fourth wells of opposite conductivity types for low voltage transistors, wherein at least one of the first and second wells and at least one of the third and fourth wells have an impurity distribution profile steeper than the memory cell well.

Abstract: A flow tester may use a low impedance flow meter to test a hole at a predetermined Reynolds number. The flow tester may be mounted to a robot so that testing may be fully automated. For example, the flow tester may be incorporated into a laser drilling workcell and used to test flow characteristics of a test coupon or workpiece to calibrate or verify the laser settings. Another example may be used for testing flow characteristics of a finished workpiece. The flow tester may have a testing tip that is compliant to form a seal against a workpiece, and the testing tip may be able to seal against angled, curved, or other surfaces. The flow tester may be capable of testing individual holes or groups of holes and determining an effective cross sectional area for the hole at the predetermined Reynolds number.

Abstract: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Abstract: A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor.

Abstract: A device for processing audio data includes a summation unit configured to receive a number of audio input signals for generating a summation signal, a filter unit configured to filter the summation signal dependent on filter coefficient resulting in at least two audio output signals. A parameter conversion unit is configured to receive position information, which is representative of spatial positions of sound sources of the audio input signals, and spectral power information which is representative of a spectral power of the audio input signals. The parameter conversion unit is configured to generate the filter coefficients based the position information and the spectral power information. The parameter conversion unit is further configured to receive transfer function parameters and generate the filter coefficients in dependence on the transfer function parameters.

Abstract: Some embodiments include apparatus and methods having a memory device with diodes coupled to memory elements. Each diode may be formed in a recess of the memory device. The recess may have a polygonal sidewall. The diode may include a first material of a first conductivity type (e.g., n-type) and a second material of a second conductive type (e.g., p-type) formed within the recess.

Abstract: A deposition method and a system are provided to deposit a CdS buffer layer on a surface of a solar cell absorber layer of a flexible workpiece from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited from the deposition solution while the flexible workpiece is elastically shaped by a series of shaping rollers to retain the process solution on the solar cell absorber layer and while the flexible workpiece is heated by contacting to a heated liquid that the shaping rollers are fully or partially immersed. The flexible workpiece is elastically shaped by pulling a back surface of the flexible workpiece into surface cavity of the shaping rollers using magnetic force.

Abstract: A method of modifying a substrate carrier to improve process performance includes depositing material or fabricating devices on a substrate supported by a substrate carrier. A parameter of layers deposited on the substrate is then measured as a function of their corresponding positions on the substrate carrier. The measured parameter of at least some devices fabricated on the substrate or a property of the deposited layers is related to a physical characteristic of substrate carrier to obtain a plurality of physical characteristics of the substrate carrier corresponding to a plurality of positions on the substrate carrier. The physical characteristic of the substrate carrier is then modified at one or more of the plurality of corresponding positions on the substrate carrier to obtain desired parameters of the deposited layers or fabricated devices as a function of position on the substrate carrier.

Abstract: A memory device comprising a vertical transistor includes a digit line that is directly coupled to the source regions of each memory cell. Because an electrical plug is not used to form a contact between the digit line and the source regions, a number of fabrication steps may be reduced and the possibility for manufacturing defects may also be reduced. In some embodiments, a memory device may include a vertical transistor having gate regions that are recessed from an upper portion of a silicon substrate. With the gate regions recessed from the silicon substrate, the gate regions are spaced further from the source/drain regions and, accordingly, cross capacitance between the gate regions and the source/drain regions may be reduced.

Abstract: A method of forming a sub-lithographic charge storage element on a semiconductor substrate is provided. The method can involve providing first and second layers on a semiconductor substrate, a thickness of the first layer being larger than a thickness of the second layer; forming a spacer adjacent a side surface of the first layer and on a portion of an upper surface of the second layer; and removing an exposed portion of the second layer that is not covered by the spacer. By removing the exposed portion of the second layer while leaving a portion of the second layer that is protected by the spacer, the method can make a sub-lithographic charge storage element from the remaining portion of the second layer on the semiconductor substrate.

Abstract: The present teachings provide methods for forming organic layers for an organic light-emitting device (OLED) using a thermal printing process. The method can further use one or more additional processes, such as vacuum thermal evaporation (VTE), to create an OLED stack. OLED stack structures are also provided wherein at least one of the charge injection or charge transport layers is formed by a thermal printing method at a high deposition rate. The organic layer can be subject to post-deposition treatment such as baking. The structure of the organic layer can be amorphous, crystalline, porous, dense, smooth, rough, or a combination thereof, depending on deposition parameters and post-treatment conditions. The organic layer can improve light out-coupling efficiency of an OLED, increase conductivity, decrease index of refraction, and/or modify the emission chromaticity of an OLED. An OLED microcavity is also provided and can be formed by one of more of these methods.

Abstract: Provided is a heat treatment apparatus including a treatment chamber housing a silicon substrate, a heater being provided in the treatment chamber and heating the silicon substrate, and an atmosphere adjustment mechanism reducing a concentration of oxygen contained in an atmosphere inside the treatment chamber to less than an oxygen concentration in the air. The atmosphere adjustment mechanism is provided with an oxygen trap, for example.

Abstract: An array speaker apparatus includes an array speaker in which plural speaker units are arranged in a single body, a sound source localization adding unit which generates left and right audio signals by performing localization processing for adding sound characteristics to audio signals of a front-left channel and a front-right channel on the basis of head transfer functions, and a sound emitting direction control unit which distributes the left and right audio signals to one or plural speaker units of the array speaker, and controls timing with which the speaker units output the audio signals so that a left sound emitted from the array speaker forms the same sound wavefront formed by a sound emitted from one of virtual point sound sources and that a right sound emitted from the array speaker forms the same sound wavefront formed by a sound emitted from the other of the virtual point sound sources.

Abstract: The semiconductor device of this invention has unit cells, each of which includes: a substrate; a drift layer on the substrate; a body region in the drift layer; a first doped region of a first conductivity type in the body region; a second doped region of the first conductivity type arranged adjacent to the body region and in a surface region of the drift layer; a third doped region of the first conductivity type arranged between two adjacent unit cells' second doped region of the first conductivity type and in the surface region of the drift layer to contact with the second doped region of the first conductivity type; a gate insulating film arranged to contact with the surface of the drift layer at least between the first and second doped regions of the first conductivity type; a gate electrode on the gate insulating film; and first and second ohmic electrodes.

Abstract: A method of forming a semiconductor device includes patterning a photoresist layer formed over a homogeneous semiconductor device layer to be etched; subjecting the semiconductor device to an implant process that selectively implants a sacrificial etch stop layer that is self-aligned in accordance with locations of features to be etched within the homogeneous semiconductor device layer, and at a desired depth for the features to be etched; etching a feature pattern defined by the patterned photoresist layer into the homogenous semiconductor device layer, stopping on the implanted sacrificial etch stop layer; and removing remaining portion of the implanted sacrificial etch stop layer prior to filling the etched feature pattern with a fill material.

Abstract: A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Abstract: A trim panel assembly for retaining an acoustical device, the trim panel assembly comprising a trim panel, and a voice coil, wherein at least a portion of the voice coil is partially embedded within a surface of the trim panel.

Abstract: A high-frequency pneumatic loudspeaker for sound broadcasting is provided, and comprises a housing, silencer exhaust holes, air inlet port, supporting plate, throat canal, central cone, annular nozzle, obstructing ring, and a voice coil and leads. Lower and an upper press plates hold the obstructing ring and the voice coil in position, a magnet having inner and outer magnetic poles is connected therewith, wherein a small gap exists between the obstructing ring and the end of the annular nozzle. This provides the advantages of both air passage area modulation by a sleeve air valve and airstream direction modulation by jet obstruction, reduces airstream consumption, improves air-sound conversion efficiency, and improves structures of an annular air flow-splitter, voice coil and leads. A cooling system is provided to improve high-frequency modulation sensitivity, operation stability, and/or extended fault-free operation time.