Abstract: A battery control device calculates a chargeable/dischargeable electric power of a rechargeable battery at the timing after elapse of a predetermined period of time when a terminal voltage of the rechargeable battery changes by charging/discharging of the rechargeable battery during the predetermined period of time. The battery control device calculates a specific change amount of the terminal voltage caused by electric charge accumulation in the rechargeable battery after the elapse of the predetermined period of time when the charging/discharging of the rechargeable battery is performed. Further, the battery control device calculates an estimated target value of a current necessary for changing the terminal voltage to a predetermined target voltage or the terminal voltage after the elapse of the predetermined period of time by using the calculated specific change amount, and calculates chargeable/dischargeable electric power on the basis of the calculated estimated target value.

Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.

Abstract: Non-sequential monitoring of battery cells in battery monitoring systems, and related components, systems, and methods are disclosed. In one embodiment, a battery monitoring system control unit is provided. The battery monitoring system control unit is configured to control battery monitoring devices. Each battery monitoring device is configured to be coupled to a subset of battery cells electrically connected in series in a sequential order to form a battery. The battery monitoring system control unit is further configured to instruct the battery monitoring devices to test an ohmic value of each battery cell of the battery cells of the battery in a non-sequential order. In this manner, heat generated in the battery monitoring devices from the testing may be more effectively dissipated, which can also allow for the battery monitoring devices to be employed in higher operating temperature environments.

Abstract: ECU executes program including the steps of turning on an overcharge tentative determination flag and performing limitation on Win in a case where a rising rate ?TB is higher than or equal to ?TB(0), and a current average value IBs is a value on a side of charging, and the steps of turning off the overcharge tentative determination flag and cancelling the limitation on Win in a case where the rising rate ?TB is lower than or equal to ?TB(1), or the current average value IBs exhibits a value on a side of discharging, and the steps of determining that a battery is in the overcharging state and executing a fail safe process in a case where the integrated value IBs of current from a time point at which the overcharge tentative determination flag is switched from an off-state to an on-state becomes greater than or equal to IBs(0).

Abstract: A boot-like shroud or cover that forms a compressive seal around the charging receptacle of an electric vehicle is provided to shield a charging port housing and a charging port hinge pocket. The boot-like shroud or cover may be configured as an integral part of the charging handle or a separate part that easily attaches to the handle for outdoor use. The part may also be suitable for use in conjunction with multiple vehicle types.

Abstract: A circuit layout data has a start value of a first-axis pitch and a start value of a second-axis pitch, the second axis pitch being transverse to the first-axis pitch. The start value of the first axis pitch and the start value of the second axis pitch correspond to single pattern lithography. The first axis pitch is scaled to a first axis single pattern-to-double pattern pitch transition threshold, and then additionally scaled until reaching a first axis double pattern resolution limit. Scaling the first axis pitch to the first axis double pattern resolution limit utilizes routing spaces parallel to the second axis pitch.

Abstract: A method and system are provided for tuning parameters of a synthesis program for a design description. The method includes (a) ranking individual parameter impact by evaluating a design-cost function of each of the parameters. The method further includes (b) creating a set of possible parameter combinations that is ordered by an estimated-cost function. The method additionally includes (c) selecting, from the set of possible parameter combinations, top-k scenarios having best estimated costs to form a potential set, and running at least some of the top-k scenarios in parallel through the synthesis program. The method also includes (d) repeating steps (b)-(c) for one or more iterations until at least one of a maximum iteration limit is reached and an exit criterion is satisfied.

Abstract: A wireless charging system for a vehicle may include: a power transmitter having a plurality of transmitting coils; and a controller configured to measure a current and a voltage of each of the plurality of transmitting coils and to apply charging power only to a subset of the plurality of transmitting coils based on a magnitude of the measured current and voltage of each of the plurality of transmitting coils.

Abstract: An optical proximity correction (OPC) process is provided. The method comprising receiving a first pattern corresponding to a first structure of a semiconductor structure, and a second pattern corresponding to a second structure of said semiconductor structure. Next, a first OPC process is performed for the first pattern to obtain a revised first pattern, wherein the revised first pattern has a first shift regarding to the first pattern. A second OPC process is performed for the second pattern to obtain a revised second pattern, wherein the second OPC process comprises moving the second pattern according to the first shift.

Abstract: An apparatus (200) for tuning a feedback loop that is arranged to regulate an output voltage (Vout) of a switched mode power supply, SMPS (100), in accordance with a control law defined by control law parameters. The apparatus includes a natural frequency estimator (210) arranged to determine a respective estimate of a natural frequency of each of two zeros in a transfer function that corresponds to a model of the feedback loop.

Abstract: An integrated circuit may have interconnect circuitry which may include a sequence of tiles. Each tile may include a predetermined routing of multiple wires on multiple tracks. Wires may change tracks within a tile through wire twisting or through via connections and wires in another metal layer. Wires that change tracks may reduce the overlap between pairs of adjacent wires, thereby reducing the coupling capacitance between the respective wires. Reducing the coupling capacitance may result in reduced crosstalk between the wires which may speed up the signal transition along those wires compared to the signal transition in conventional interconnect circuitry. At the same time, sub-optimal wire stitching in a routing tile that connects a wire that ends in the next routing tile to a wire that starts in the routing tile, whereby the two wires overlap each other may enable beneficial crosstalk, which may further improve signal transition time.

Abstract: A computer implemented method for designing an integrated circuit includes receiving a netlist. The method also includes receiving physical layout information related to an integrated circuit based on the on the netlist and receiving an engineering change order (ECO) that changes at least one logical component of the physical layout. The method further includes forming two or more possible solutions to achieve the ECO, ranking the two or more possible solutions based on two or more factors and selecting the highest ranked solution.

Abstract: A system and method for global routing that includes receiving nets that need to be routed and capacity constraints, ordering, using processing circuitry, the nets, routing, using the processing circuitry, the nets based on a maze routing with framing method, determining, using the processing circuitry, whether the routing is congestion free, selecting, using the processing circuitry, a subset of the nets based on a game theory method when the routing is not congestion free, applying a rip-up and re-route process on the subset of the nets, and repeating the selecting and applying steps until the routing is congestion free.

Abstract: A system for supplying an electric load, in particular for charging a battery device, including a charging station with an accommodation unit for the battery device and a detection unit for the battery device. The detection unit includes a first optical transmitting device for transmitting a first optical signal and an optical receiving device for receiving the first optical signal. The battery device includes a second optical transmitting device for transmitting a second and third optical signal, the second optical transmitting device functioning as a transmitter of a discretely configured optocoupler for transmitting information from the battery device to the charging station. The optical receiving device of the charging station is configured as a receiver of the discretely configured optocoupler for receiving the second and third optical signals.

Abstract: An efficient system to heat the insole of a heated insole of a shoe in which the Intelligent Circuit (IC) for a flat lithium battery is located outside the shoe and the placement of the heater for the insole is between more efficient heat insulation and heat conducting members.

Abstract: An integrated circuit device having a plurality of lines is described in which the widths of the lines, and the spacing between adjacent lines, vary within a small range which is independent of variations due to photolithographic processes, or other patterning processes, involved in manufacturing the device. A sequential sidewall spacer formation process is described for forming an etch mask for the lines, which results in first and second sets of sidewall spacers arranged in an alternating fashion. As a result of this sequential sidewall spacer process, the variation in the widths of the lines across the plurality of lines, and the spacing between adjacent lines, depends on the variations in the dimensions of the sidewall spacers. These variations are independent of, and can be controlled over a distribution much less than, the variation in the size of the intermediate mask element caused by the patterning process.

Abstract: A dynamically reconfigurable framework manages processing applications in order to meet time-varying constraints to select an optimal hardware architecture. The optimal architecture satisfies time-varying constraints including for example, supplied power, required performance, accuracy levels, available bandwidth, and quality of output such as image reconstruction. The process of determining an optimal solution is defined in terms of multi-objective optimization using Pareto-optimal realizations.

Abstract: A method for decomposing a layout of an integrated circuit is provided. First, a layout of the integrated circuit is imported, wherein the layout comprises a plurality of sub patterns in a cell region, and a first direction and a second direction are defined thereon. Next, one sub pattern positioned at a corner of the cell region is assigned to an anchor pattern. Then, the sub patterns in the row same as the anchor pattern along the second direction is assigned to the first group. Finally, the rest of the sub patterns are decomposed into the first group and the second group according to a design rule, wherein the sub patterns in the same line are decomposed into the first group and the second group alternatively.

Abstract: A method of decomposing pattern layout for generating patterns on photomasks is disclosed. The method includes decomposing features of an integrated circuit layout into discrete patterns based on the relation between these features. The features include first features and second features. The first features are then classified into a first feature pattern and a second feature pattern, and the second features are classified into third, fourth, fifth and sixth feature patterns. The spacings of the second features in the fifth and sixth feature patterns are greater than a minimum exposure limits. Finally, the first feature pattern is outputted to a first photomask, the second feature pattern is outputted to a second photomask, the third and fifth feature patterns are outputted to a third photomask, and the fourth and sixth feature patterns are outputted to a fourth photomask.

Abstract: Provided is a battery device with high convenience, which is capable of setting overcurrent release impedance to be low. The battery device includes: a first comparator circuit for detecting an overcurrent based on a first reference voltage; and a second comparator circuit for outputting an overcurrent release voltage control signal based on a second reference voltage that is higher than the first reference voltage.