Abstract: A system and method is provided wherein, in one aspect, a currently-requested item of information is stored in a cache based on whether it has been previously requested and, if so, the time of the previous request. If the item has not been previously requested, it may not be stored in the cache. If the subject item has been previously requested, it may or may not be cached based on a comparison of durations, namely (1) the duration of time between the current request and the previous request for the subject item and (2) for each other item in the cache, the duration of time between the current request and the previous request for the other item. If the duration associated with the subject item is less than the duration of another item in the cache, the subject item may be stored in the cache.

Abstract: A method, apparatus, and program product for managing partitionable resources in a logically partitioned computing system is disclosed. The method includes associating each of a plurality of partitionable resources in the logically partitioned computing system with a respective file entry in a virtual file system, associating each of a plurality of partitionable resources in the logically partitioned computing system with a respective file entry in a virtual file system, and allocating a first partitionable resource among the plurality of partitionable resources to a first logical partition among the plurality of logical partitions in response to a file system operation directed to the virtual file system to organize a respective file entry for the first partitionable resource within the respective directory for the first logical partition.

Abstract: A method for storing information may include determining whether a received data object fits inside a particular one of a plurality of free blocks in a memory bitmap. Each of the plurality of free blocks may include a column of the memory bitmap with a top margin, a bottom margin, and a predetermined width. If the received data object fits, the received data object may be stored in the particular one of the plurality of free blocks, starting at the top margin of the particular one of the plurality of free blocks. The particular one of the plurality of data blocks may be resized by moving the top margin to start below the stored received data object. The determining may include, for each of the plurality of free blocks, a height of the received data object may be compared with a height of each of the free data blocks.

Abstract: The invention refers to a method for indicating the current status of a removable media device provided for being loaded with at least one removable medium, and being connected to a device reading and/or writing AV storage media. The method has the steps of checking the type of user input upon occurrence of user input, keeping the status of the removable media device if the type of user input is not related to the removable media device, else checking whether a characteristic feature of the at least one removable medium has changed, keeping the current status if the characteristic feature of the at least one removable medium has not changed, and else updating the status.

Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for clock enable (CKE) coordination. In some embodiments, a memory controller includes logic to predict whether a scheduled request will be issued to a rank. The memory controller may also include logic to predict whether a scheduled request will not be issued to the rank. In some embodiments, the clock enable (CKE) is asserted or de-asserted to a rank based, at least in part, on the predictions. Other embodiments are described and claimed.

Abstract: Methods, apparatus and systems for memory access obscuration are provided. A first embodiment provides memory access obscuration in conjunction with deadlock avoidance. Such embodiment utilizes processor features including an instruction to enable monitoring of specified cache lines and an instruction that sets a status bit responsive to any foreign access (e.g., write or eviction due to a read) to the specified lines. A second embodiment provides memory access obscuration in conjunction with deadlock detection. Such embodiment utilizes the monitoring feature, as well as handler registration. A user-level handler may be asynchronously invoked responsive to a foreign write to any of the specified lines. Invocation of the handler more frequently than expected indicates that a deadlock may have been encountered. In such case, a deadlock policy may be enforced. Other embodiments are also described and claimed.

Abstract: High availability is provided in a storage system that offers expandability more inexpensively. Provided is a storage system including multiple expanders to be connected to multiple storage mediums, multiple cascades connected respectively to a prescribed number of expanders among the multiple expanders, and multiple control units for respectively controlling the multiple cascades. One end of the multiple cascades is connected with an inter-cascade link, and the inter-cascade link has a logically connected state and a logically disconnected state.

Abstract: Storage unit management methods and systems are provided. The storage unit comprises a plurality of physical blocks, wherein each has one of a plurality of block type definitions. First, a sub-write command is obtained, wherein the sub-write command requests to write data to at least one logical page of a logical block. It is determined whether a candidate block having a first block type definition exists in the storage unit, wherein the logical page of the logic block cannot map to the candidate block based on the first block type definition. If the candidate block exists, the block type definition of the candidate block is transformed from the first block type definition to a second block type definition. Data is written to a specific page of the candidate block, and a mapping relationship between the logical page of the logical block and the specific page of the candidate block is recorded.

Abstract: Provided is a data storage device including two or more data storage areas including may have two or more (heterogeneous) types of nonvolatile memory cells. At least one of the data storage areas includes a plurality of memory blocks that are sequentially selected, and metadata are stored in the currently selected memory block. The memory blocks can be sequentially used and metadata can be stored in a uniformly-distributed manner throughout the data storage device. Therefore, separate merging and wear-leveling operations are unnecessary. Thus, it is possible to improve the lifetime and writing performance of a data storage device having two or more heterogeneous nonvolatile memories.

Abstract: Provided are a method, system, and article of manufacture for converting backup copies of objects created using a first backup program to backup copies created using a second backup program. A plurality of backup copies of versions of an object are created using a first backup program, wherein the object has an object name. The first backup program is used to restore at least one of the backup copies to a restored version of the object having a name different from the object name. A second backup program is used to create a backup copy of each restored version of the object. A name of a designated object is assigned to each backup copy created using the second backup program. Metadata of each backup copy created using the second backup program is updated with metadata for the designated object.

Abstract: Various technologies and techniques are disclosed for improving performance of parallel scans. Disk head randomization that occurs when performing a parallel scan is minimized by assigning a worker entity to each disk involved in the parallel scan, and by ensuring data is only accessed on a respective disk by the worker entity assigned to the disk. A parallel scan can be performed that is NUMA aware by ensuring a particular sub-set of data is resident in the same memory node during each parallel scan, and by ensuring the particular sub-set of data is processed by a worker entity assigned to a node in which the sub-set of data is resident. A process for performing a parallel scan involves breaking up work into sub-sets, assigning work to each worker entity that corresponds to a respective disk, and having the worker entities process the assigned work to complete the parallel scan.

Abstract: A memory card, connected to a host, includes a NAND flash memory and a memory controller. The NAND flash memory includes multiple pages, and each page includes multiple sectors. The memory controller receives sector data and a corresponding sector address from the host. The memory controller enables the sector data to be transferred to the NAND flash memory over a first data bus, via a buffer memory, when the sector address is an address for accessing a first sector in a selected page. The memory controller enables the sector data to be transferred to the NAND flash memory over a second data bus, bypassing the buffer memory, when the sector address is an address for accessing a sector other than the first sector in the selected page.

Abstract: A computing system processes memory transactions for parallel processing of multiple threads of execution by support of which an application need not be aware. The computing system transactional memory support provides a Transaction Table in memory and a method of fast detection, of potential conflicts between multiple transactions. Special instructions may mark the boundaries of a transaction and identify memory locations applicable to a transaction. A ‘private to transaction’ (PTRAN) tag, directly addressable as part of the main data storage memory location, enables a quick detection of potential conflicts with other transactions that are concurrently executing on another thread of said computing system. The tag indicates whether (or not) a data entry in memory is part of a speculative memory state of an uncommitted transaction that is currently active in the system.

Abstract: A method and apparatus are provided in a computing environment for scheduling access to a resource. The method grants access to the resource by a non-real-time request when the non-real-time request can be completed before the latest possible start time at which a first real-time request must start service to timely complete all actual and anticipated real-time requests, otherwise granting the first real real-time request access to the resource.

Abstract: Described are techniques for performing recovery processing in a data storage system. A providing a flash-based memory is provided with includes cached write data that has not been destaged to a data storage device. It is determined whether said flash-based memory has a threshold amount of storage available thereon. If the flash-based memory does not have the threshold amount of storage available thereon, portions of the cache write data are destaged until said flash-based memory has a threshold amount of storage available thereon. Received data requests are processed in accordance with a first policy different from a second policy used in connection with processing received data requests if said flash-based memory has a threshold amount of storage available thereon.

Abstract: Improved approaches to manage cache data for applications operating in a data center environment are disclosed. Data requests incoming over a network are able to be responded to by an application in a consistent and rapid manner through intelligent management of cache data. When like applications are being concurrently operated, such as at a data center, cache data established by one application can be made available for use by another like application. As a result, cache data available to a given application is more likely to be useful to the application, particularly when the application has just been started (or restarted).

Abstract: In one embodiment, a processor may be configured to write ECC granular stores into the data cache, while non-ECC granular stores may be merged with cache data in a memory request buffer. In one embodiment, a processor may be configured to detect that a victim block writeback hits one or more stores in a memory request buffer (or vice versa) and may convert the victim block writeback to a fill. In one embodiment, a processor may speculatively issue stores that are subsequent to a load from a load/store queue, but prevent the update for the stores in response to a snoop hit on the load.

Abstract: There is provided a distributed data storage system for splitting content-data into a plurality of split data and storing a plurality of copy data corresponding to at least one of the plurality of split data in a plurality of memory devices. The system comprises a copying management information storing unit and a access location determining unit. The copying management information storing unit stores copying management information indicating a storage location of the copy data corresponding to the split data. The access location determining unit determines at least one of the plurality of memory devices storing the copy data corresponding to the split data as an access location for accessing split data.

Abstract: A storage device with self-status detection and an inspection method thereof are provided. The storage device includes a plurality of storage areas (i.e., block tables), a plurality of memory blocks, and a status detection unit. The storage areas respectively have a corresponding weight value, and the addresses of memory blocks which have the same number of error correct codes (ECCs) are recorded in the same storage area. The status detection unit obtains a status of the storage device according to the number of addresses of the memory blocks recorded in a storage area and the corresponding weight value of the storage area.

Abstract: An integrated device able to simplify interconnects up to memories, able to prevent a reduction of performance due to an increase of area and longer interconnects, and able to speed up memory access. An input/output port of a processing module, memory interfaces, and memory banks are connected by connection interconnects arranged in a matrix in a first direction and a second direction above an arrangement region of a plurality of memory macros. As connection interconnects, command information interconnects and data interconnects are included. The command information interconnects are formed by private interconnects, while the data interconnects are formed by private interconnects for at least the second direction interconnects.